dss_ctl2_val      910 drivers/gpu/drm/i915/display/intel_vdsc.c 	u32 dss_ctl2_val = 0;
dss_ctl2_val      930 drivers/gpu/drm/i915/display/intel_vdsc.c 	dss_ctl2_val |= LEFT_BRANCH_VDSC_ENABLE;
dss_ctl2_val      932 drivers/gpu/drm/i915/display/intel_vdsc.c 		dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE;
dss_ctl2_val      936 drivers/gpu/drm/i915/display/intel_vdsc.c 	I915_WRITE(dss_ctl2_reg, dss_ctl2_val);
dss_ctl2_val      945 drivers/gpu/drm/i915/display/intel_vdsc.c 	u32 dss_ctl1_val = 0, dss_ctl2_val = 0;
dss_ctl2_val      962 drivers/gpu/drm/i915/display/intel_vdsc.c 	dss_ctl2_val = I915_READ(dss_ctl2_reg);
dss_ctl2_val      963 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (dss_ctl2_val & LEFT_BRANCH_VDSC_ENABLE ||
dss_ctl2_val      964 drivers/gpu/drm/i915/display/intel_vdsc.c 	    dss_ctl2_val & RIGHT_BRANCH_VDSC_ENABLE)
dss_ctl2_val      965 drivers/gpu/drm/i915/display/intel_vdsc.c 		dss_ctl2_val &= ~(LEFT_BRANCH_VDSC_ENABLE |
dss_ctl2_val      967 drivers/gpu/drm/i915/display/intel_vdsc.c 	I915_WRITE(dss_ctl2_reg, dss_ctl2_val);