dspr               41 arch/mips/include/asm/dsp.h 	tsk->thread.dsp.dspr[0] = mfhi1();				\
dspr               42 arch/mips/include/asm/dsp.h 	tsk->thread.dsp.dspr[1] = mflo1();				\
dspr               43 arch/mips/include/asm/dsp.h 	tsk->thread.dsp.dspr[2] = mfhi2();				\
dspr               44 arch/mips/include/asm/dsp.h 	tsk->thread.dsp.dspr[3] = mflo2();				\
dspr               45 arch/mips/include/asm/dsp.h 	tsk->thread.dsp.dspr[4] = mfhi3();				\
dspr               46 arch/mips/include/asm/dsp.h 	tsk->thread.dsp.dspr[5] = mflo3();				\
dspr               58 arch/mips/include/asm/dsp.h 	mthi1(tsk->thread.dsp.dspr[0]);					\
dspr               59 arch/mips/include/asm/dsp.h 	mtlo1(tsk->thread.dsp.dspr[1]);					\
dspr               60 arch/mips/include/asm/dsp.h 	mthi2(tsk->thread.dsp.dspr[2]);					\
dspr               61 arch/mips/include/asm/dsp.h 	mtlo2(tsk->thread.dsp.dspr[3]);					\
dspr               62 arch/mips/include/asm/dsp.h 	mthi3(tsk->thread.dsp.dspr[4]);					\
dspr               63 arch/mips/include/asm/dsp.h 	mtlo3(tsk->thread.dsp.dspr[5]);					\
dspr               78 arch/mips/include/asm/dsp.h 	tsk->thread.dsp.dspr;						\
dspr              137 arch/mips/include/asm/processor.h 	dspreg_t	dspr[NUM_DSP_REGS];
dspr              345 arch/mips/include/asm/processor.h 		.dspr		= {0, },			\
dspr              776 arch/mips/kernel/ptrace.c 			dspregs[i] = target->thread.dsp.dspr[i];
dspr              817 arch/mips/kernel/ptrace.c 			target->thread.dsp.dspr[i] = (s32)dspregs[i];
dspr              856 arch/mips/kernel/ptrace.c 			dspregs[i] = target->thread.dsp.dspr[i];
dspr              897 arch/mips/kernel/ptrace.c 			target->thread.dsp.dspr[i] = dspregs[i];
dspr              341 drivers/gpu/drm/rcar-du/rcar_du_crtc.c 	u32 dspr = 0;
dspr              368 drivers/gpu/drm/rcar-du/rcar_du_crtc.c 		dspr |= (index + 1) << prio;
dspr              375 drivers/gpu/drm/rcar-du/rcar_du_crtc.c 			dspr |= (index + 1) << prio;
dspr              383 drivers/gpu/drm/rcar-du/rcar_du_crtc.c 			dspr = (rcrtc->index % 2) + 1;
dspr              386 drivers/gpu/drm/rcar-du/rcar_du_crtc.c 			dspr = (rcrtc->index % 2) ? 3 : 1;
dspr              421 drivers/gpu/drm/rcar-du/rcar_du_crtc.c 			    dspr);