dsi_pll          12827 drivers/gpu/drm/i915/display/intel_display.c 	PIPE_CONF_CHECK_X(dsi_pll.ctrl);
dsi_pll          12828 drivers/gpu/drm/i915/display/intel_display.c 	PIPE_CONF_CHECK_X(dsi_pll.div);
dsi_pll           857 drivers/gpu/drm/i915/display/intel_display_types.h 	} dsi_pll;
dsi_pll           104 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	config->dsi_pll.ctrl = 1 << (DSI_PLL_P1_POST_DIV_SHIFT + calc_p - 2);
dsi_pll           105 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	config->dsi_pll.div =
dsi_pll           134 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 		config->dsi_pll.ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL;
dsi_pll           137 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 		config->dsi_pll.ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL;
dsi_pll           139 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	config->dsi_pll.ctrl |= DSI_PLL_VCO_EN;
dsi_pll           142 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 		      config->dsi_pll.div, config->dsi_pll.ctrl);
dsi_pll           157 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_DIVIDER, config->dsi_pll.div);
dsi_pll           159 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 		      config->dsi_pll.ctrl & ~DSI_PLL_VCO_EN);
dsi_pll           166 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, config->dsi_pll.ctrl);
dsi_pll           273 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	config->dsi_pll.ctrl = pll_ctl & ~DSI_PLL_LOCK;
dsi_pll           274 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	config->dsi_pll.div = pll_div;
dsi_pll           328 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	config->dsi_pll.ctrl = I915_READ(BXT_DSI_PLL_CTL);
dsi_pll           330 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	dsi_ratio = config->dsi_pll.ctrl & BXT_DSI_PLL_RATIO_MASK;
dsi_pll           365 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	pll_ratio = config->dsi_pll.ctrl & BXT_DSI_PLL_RATIO_MASK;
dsi_pll           422 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	pll_ratio = config->dsi_pll.ctrl & BXT_DSI_PLL_RATIO_MASK;
dsi_pll           491 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	config->dsi_pll.ctrl = dsi_ratio | BXT_DSIA_16X_BY2 | BXT_DSIC_16X_BY2;
dsi_pll           497 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 		config->dsi_pll.ctrl |= BXT_DSI_PLL_PVD_RATIO_1;
dsi_pll           513 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	I915_WRITE(BXT_DSI_PLL_CTL, config->dsi_pll.ctrl);