dsi 653 arch/mips/include/asm/octeon/cvmx-pci-defs.h uint32_t dsi:1; dsi 665 arch/mips/include/asm/octeon/cvmx-pci-defs.h uint32_t dsi:1; dsi 366 drivers/gpu/drm/bridge/adv7511/adv7511.h struct mipi_dsi_device *dsi; dsi 29 drivers/gpu/drm/bridge/adv7511/adv7533.c struct mipi_dsi_device *dsi = adv->dsi; dsi 43 drivers/gpu/drm/bridge/adv7511/adv7533.c clock_div_by_lanes[dsi->lanes - 2] << 3); dsi 68 drivers/gpu/drm/bridge/adv7511/adv7533.c struct mipi_dsi_device *dsi = adv->dsi; dsi 74 drivers/gpu/drm/bridge/adv7511/adv7533.c regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4); dsi 105 drivers/gpu/drm/bridge/adv7511/adv7533.c struct mipi_dsi_device *dsi = adv->dsi; dsi 116 drivers/gpu/drm/bridge/adv7511/adv7533.c if (lanes != dsi->lanes) { dsi 117 drivers/gpu/drm/bridge/adv7511/adv7533.c mipi_dsi_detach(dsi); dsi 118 drivers/gpu/drm/bridge/adv7511/adv7533.c dsi->lanes = lanes; dsi 119 drivers/gpu/drm/bridge/adv7511/adv7533.c ret = mipi_dsi_attach(dsi); dsi 121 drivers/gpu/drm/bridge/adv7511/adv7533.c dev_err(&dsi->dev, "failed to change host lanes\n"); dsi 143 drivers/gpu/drm/bridge/adv7511/adv7533.c struct mipi_dsi_device *dsi; dsi 156 drivers/gpu/drm/bridge/adv7511/adv7533.c dsi = mipi_dsi_device_register_full(host, &info); dsi 157 drivers/gpu/drm/bridge/adv7511/adv7533.c if (IS_ERR(dsi)) { dsi 159 drivers/gpu/drm/bridge/adv7511/adv7533.c ret = PTR_ERR(dsi); dsi 163 drivers/gpu/drm/bridge/adv7511/adv7533.c adv->dsi = dsi; dsi 165 drivers/gpu/drm/bridge/adv7511/adv7533.c dsi->lanes = adv->num_dsi_lanes; dsi 166 drivers/gpu/drm/bridge/adv7511/adv7533.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 167 drivers/gpu/drm/bridge/adv7511/adv7533.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | dsi 170 drivers/gpu/drm/bridge/adv7511/adv7533.c ret = mipi_dsi_attach(dsi); dsi 179 drivers/gpu/drm/bridge/adv7511/adv7533.c mipi_dsi_device_unregister(dsi); dsi 186 drivers/gpu/drm/bridge/adv7511/adv7533.c mipi_dsi_detach(adv->dsi); dsi 187 drivers/gpu/drm/bridge/adv7511/adv7533.c mipi_dsi_device_unregister(adv->dsi); dsi 507 drivers/gpu/drm/bridge/cdns-dsi.c static int cdns_dsi_mode2cfg(struct cdns_dsi *dsi, dsi 512 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_output *output = &dsi->output; dsi 554 drivers/gpu/drm/bridge/cdns-dsi.c static int cdns_dsi_adjust_phy_config(struct cdns_dsi *dsi, dsi 560 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_output *output = &dsi->output; dsi 603 drivers/gpu/drm/bridge/cdns-dsi.c static int cdns_dsi_check_conf(struct cdns_dsi *dsi, dsi 608 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_output *output = &dsi->output; dsi 614 drivers/gpu/drm/bridge/cdns-dsi.c ret = cdns_dsi_mode2cfg(dsi, mode, dsi_cfg, mode_valid_check); dsi 622 drivers/gpu/drm/bridge/cdns-dsi.c ret = cdns_dsi_adjust_phy_config(dsi, dsi_cfg, phy_cfg, mode, mode_valid_check); dsi 626 drivers/gpu/drm/bridge/cdns-dsi.c ret = phy_validate(dsi->dphy, PHY_MODE_MIPI_DPHY, 0, &output->phy_opts); dsi 651 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = input_to_dsi(input); dsi 652 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_output *output = &dsi->output; dsi 655 drivers/gpu/drm/bridge/cdns-dsi.c dev_err(dsi->base.dev, dsi 668 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = input_to_dsi(input); dsi 669 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_output *output = &dsi->output; dsi 689 drivers/gpu/drm/bridge/cdns-dsi.c ret = cdns_dsi_check_conf(dsi, mode, &dsi_cfg, true); dsi 699 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = input_to_dsi(input); dsi 702 drivers/gpu/drm/bridge/cdns-dsi.c val = readl(dsi->regs + MCTL_MAIN_DATA_CTL); dsi 705 drivers/gpu/drm/bridge/cdns-dsi.c writel(val, dsi->regs + MCTL_MAIN_DATA_CTL); dsi 707 drivers/gpu/drm/bridge/cdns-dsi.c val = readl(dsi->regs + MCTL_MAIN_EN) & ~IF_EN(input->id); dsi 708 drivers/gpu/drm/bridge/cdns-dsi.c writel(val, dsi->regs + MCTL_MAIN_EN); dsi 709 drivers/gpu/drm/bridge/cdns-dsi.c pm_runtime_put(dsi->base.dev); dsi 712 drivers/gpu/drm/bridge/cdns-dsi.c static void cdns_dsi_hs_init(struct cdns_dsi *dsi) dsi 714 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_output *output = &dsi->output; dsi 723 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + MCTL_DPHY_CFG0); dsi 725 drivers/gpu/drm/bridge/cdns-dsi.c phy_init(dsi->dphy); dsi 726 drivers/gpu/drm/bridge/cdns-dsi.c phy_set_mode(dsi->dphy, PHY_MODE_MIPI_DPHY); dsi 727 drivers/gpu/drm/bridge/cdns-dsi.c phy_configure(dsi->dphy, &output->phy_opts); dsi 728 drivers/gpu/drm/bridge/cdns-dsi.c phy_power_on(dsi->dphy); dsi 731 drivers/gpu/drm/bridge/cdns-dsi.c writel(PLL_LOCKED, dsi->regs + MCTL_MAIN_STS_CLR); dsi 733 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + MCTL_DPHY_CFG0); dsi 734 drivers/gpu/drm/bridge/cdns-dsi.c WARN_ON_ONCE(readl_poll_timeout(dsi->regs + MCTL_MAIN_STS, status, dsi 739 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + MCTL_DPHY_CFG0); dsi 742 drivers/gpu/drm/bridge/cdns-dsi.c static void cdns_dsi_init_link(struct cdns_dsi *dsi) dsi 744 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_output *output = &dsi->output; dsi 749 drivers/gpu/drm/bridge/cdns-dsi.c if (dsi->link_initialized) dsi 759 drivers/gpu/drm/bridge/cdns-dsi.c writel(val, dsi->regs + MCTL_MAIN_PHY_CTL); dsi 762 drivers/gpu/drm/bridge/cdns-dsi.c sysclk_period = NSEC_PER_SEC / clk_get_rate(dsi->dsi_sys_clk); dsi 765 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + MCTL_ULPOUT_TIME); dsi 767 drivers/gpu/drm/bridge/cdns-dsi.c writel(LINK_EN, dsi->regs + MCTL_MAIN_DATA_CTL); dsi 773 drivers/gpu/drm/bridge/cdns-dsi.c writel(val, dsi->regs + MCTL_MAIN_EN); dsi 775 drivers/gpu/drm/bridge/cdns-dsi.c dsi->link_initialized = true; dsi 781 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = input_to_dsi(input); dsi 782 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_output *output = &dsi->output; dsi 790 drivers/gpu/drm/bridge/cdns-dsi.c if (WARN_ON(pm_runtime_get_sync(dsi->base.dev) < 0)) dsi 797 drivers/gpu/drm/bridge/cdns-dsi.c WARN_ON_ONCE(cdns_dsi_check_conf(dsi, mode, &dsi_cfg, false)); dsi 799 drivers/gpu/drm/bridge/cdns-dsi.c cdns_dsi_hs_init(dsi); dsi 800 drivers/gpu/drm/bridge/cdns-dsi.c cdns_dsi_init_link(dsi); dsi 803 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + VID_HSIZE1); dsi 805 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + VID_HSIZE2); dsi 810 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + VID_VSIZE1); dsi 811 drivers/gpu/drm/bridge/cdns-dsi.c writel(mode->crtc_vdisplay, dsi->regs + VID_VSIZE2); dsi 816 drivers/gpu/drm/bridge/cdns-dsi.c writel(BLK_LINE_PULSE_PKT_LEN(tmp), dsi->regs + VID_BLKSIZE2); dsi 819 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + VID_VCA_SETTING2); dsi 823 drivers/gpu/drm/bridge/cdns-dsi.c writel(BLK_LINE_EVENT_PKT_LEN(tmp), dsi->regs + VID_BLKSIZE1); dsi 826 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + VID_VCA_SETTING2); dsi 838 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + VID_DPHY_TIME); dsi 859 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + MCTL_DPHY_TIMEOUT1); dsi 861 drivers/gpu/drm/bridge/cdns-dsi.c writel(LPRX_TIMEOUT(tmp), dsi->regs + MCTL_DPHY_TIMEOUT2); dsi 886 drivers/gpu/drm/bridge/cdns-dsi.c dev_err(dsi->base.dev, "Unsupported DSI format\n"); dsi 898 drivers/gpu/drm/bridge/cdns-dsi.c writel(tmp, dsi->regs + VID_MAIN_CTL); dsi 901 drivers/gpu/drm/bridge/cdns-dsi.c tmp = readl(dsi->regs + MCTL_MAIN_DATA_CTL); dsi 910 drivers/gpu/drm/bridge/cdns-dsi.c writel(tmp, dsi->regs + MCTL_MAIN_DATA_CTL); dsi 912 drivers/gpu/drm/bridge/cdns-dsi.c tmp = readl(dsi->regs + MCTL_MAIN_EN) | IF_EN(input->id); dsi 913 drivers/gpu/drm/bridge/cdns-dsi.c writel(tmp, dsi->regs + MCTL_MAIN_EN); dsi 926 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = to_cdns_dsi(host); dsi 927 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_output *output = &dsi->output; dsi 928 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_input *input = &dsi->input; dsi 952 drivers/gpu/drm/bridge/cdns-dsi.c np = of_graph_get_remote_node(dsi->base.dev->of_node, DSI_OUTPUT_PORT, dsi 992 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = to_cdns_dsi(host); dsi 993 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_output *output = &dsi->output; dsi 994 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi_input *input = &dsi->input; dsi 1005 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = data; dsi 1009 drivers/gpu/drm/bridge/cdns-dsi.c flag = readl(dsi->regs + DIRECT_CMD_STS_FLAG); dsi 1011 drivers/gpu/drm/bridge/cdns-dsi.c ctl = readl(dsi->regs + DIRECT_CMD_STS_CTL); dsi 1013 drivers/gpu/drm/bridge/cdns-dsi.c writel(ctl, dsi->regs + DIRECT_CMD_STS_CTL); dsi 1014 drivers/gpu/drm/bridge/cdns-dsi.c complete(&dsi->direct_cmd_comp); dsi 1024 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = to_cdns_dsi(host); dsi 1033 drivers/gpu/drm/bridge/cdns-dsi.c cdns_dsi_init_link(dsi); dsi 1049 drivers/gpu/drm/bridge/cdns-dsi.c if (tx_len > dsi->direct_cmd_fifo_depth) { dsi 1055 drivers/gpu/drm/bridge/cdns-dsi.c if (rx_len > dsi->rx_fifo_depth) { dsi 1079 drivers/gpu/drm/bridge/cdns-dsi.c writel(readl(dsi->regs + MCTL_MAIN_DATA_CTL) | ctl, dsi 1080 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + MCTL_MAIN_DATA_CTL); dsi 1082 drivers/gpu/drm/bridge/cdns-dsi.c writel(cmd, dsi->regs + DIRECT_CMD_MAIN_SETTINGS); dsi 1092 drivers/gpu/drm/bridge/cdns-dsi.c writel(val, dsi->regs + DIRECT_CMD_WRDATA); dsi 1096 drivers/gpu/drm/bridge/cdns-dsi.c writel(wait, dsi->regs + DIRECT_CMD_STS_CLR); dsi 1097 drivers/gpu/drm/bridge/cdns-dsi.c writel(wait, dsi->regs + DIRECT_CMD_STS_CTL); dsi 1098 drivers/gpu/drm/bridge/cdns-dsi.c reinit_completion(&dsi->direct_cmd_comp); dsi 1099 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + DIRECT_CMD_SEND); dsi 1101 drivers/gpu/drm/bridge/cdns-dsi.c wait_for_completion_timeout(&dsi->direct_cmd_comp, dsi 1104 drivers/gpu/drm/bridge/cdns-dsi.c sts = readl(dsi->regs + DIRECT_CMD_STS); dsi 1105 drivers/gpu/drm/bridge/cdns-dsi.c writel(wait, dsi->regs + DIRECT_CMD_STS_CLR); dsi 1106 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + DIRECT_CMD_STS_CTL); dsi 1108 drivers/gpu/drm/bridge/cdns-dsi.c writel(readl(dsi->regs + MCTL_MAIN_DATA_CTL) & ~ctl, dsi 1109 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs + MCTL_MAIN_DATA_CTL); dsi 1127 drivers/gpu/drm/bridge/cdns-dsi.c val = readl(dsi->regs + DIRECT_CMD_RDDATA); dsi 1145 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = dev_get_drvdata(dev); dsi 1147 drivers/gpu/drm/bridge/cdns-dsi.c reset_control_deassert(dsi->dsi_p_rst); dsi 1148 drivers/gpu/drm/bridge/cdns-dsi.c clk_prepare_enable(dsi->dsi_p_clk); dsi 1149 drivers/gpu/drm/bridge/cdns-dsi.c clk_prepare_enable(dsi->dsi_sys_clk); dsi 1156 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = dev_get_drvdata(dev); dsi 1158 drivers/gpu/drm/bridge/cdns-dsi.c clk_disable_unprepare(dsi->dsi_sys_clk); dsi 1159 drivers/gpu/drm/bridge/cdns-dsi.c clk_disable_unprepare(dsi->dsi_p_clk); dsi 1160 drivers/gpu/drm/bridge/cdns-dsi.c reset_control_assert(dsi->dsi_p_rst); dsi 1161 drivers/gpu/drm/bridge/cdns-dsi.c dsi->link_initialized = false; dsi 1170 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi; dsi 1176 drivers/gpu/drm/bridge/cdns-dsi.c dsi = devm_kzalloc(&pdev->dev, sizeof(*dsi), GFP_KERNEL); dsi 1177 drivers/gpu/drm/bridge/cdns-dsi.c if (!dsi) dsi 1180 drivers/gpu/drm/bridge/cdns-dsi.c platform_set_drvdata(pdev, dsi); dsi 1182 drivers/gpu/drm/bridge/cdns-dsi.c input = &dsi->input; dsi 1185 drivers/gpu/drm/bridge/cdns-dsi.c dsi->regs = devm_ioremap_resource(&pdev->dev, res); dsi 1186 drivers/gpu/drm/bridge/cdns-dsi.c if (IS_ERR(dsi->regs)) dsi 1187 drivers/gpu/drm/bridge/cdns-dsi.c return PTR_ERR(dsi->regs); dsi 1189 drivers/gpu/drm/bridge/cdns-dsi.c dsi->dsi_p_clk = devm_clk_get(&pdev->dev, "dsi_p_clk"); dsi 1190 drivers/gpu/drm/bridge/cdns-dsi.c if (IS_ERR(dsi->dsi_p_clk)) dsi 1191 drivers/gpu/drm/bridge/cdns-dsi.c return PTR_ERR(dsi->dsi_p_clk); dsi 1193 drivers/gpu/drm/bridge/cdns-dsi.c dsi->dsi_p_rst = devm_reset_control_get_optional_exclusive(&pdev->dev, dsi 1195 drivers/gpu/drm/bridge/cdns-dsi.c if (IS_ERR(dsi->dsi_p_rst)) dsi 1196 drivers/gpu/drm/bridge/cdns-dsi.c return PTR_ERR(dsi->dsi_p_rst); dsi 1198 drivers/gpu/drm/bridge/cdns-dsi.c dsi->dsi_sys_clk = devm_clk_get(&pdev->dev, "dsi_sys_clk"); dsi 1199 drivers/gpu/drm/bridge/cdns-dsi.c if (IS_ERR(dsi->dsi_sys_clk)) dsi 1200 drivers/gpu/drm/bridge/cdns-dsi.c return PTR_ERR(dsi->dsi_sys_clk); dsi 1206 drivers/gpu/drm/bridge/cdns-dsi.c dsi->dphy = devm_phy_get(&pdev->dev, "dphy"); dsi 1207 drivers/gpu/drm/bridge/cdns-dsi.c if (IS_ERR(dsi->dphy)) dsi 1208 drivers/gpu/drm/bridge/cdns-dsi.c return PTR_ERR(dsi->dphy); dsi 1210 drivers/gpu/drm/bridge/cdns-dsi.c ret = clk_prepare_enable(dsi->dsi_p_clk); dsi 1214 drivers/gpu/drm/bridge/cdns-dsi.c val = readl(dsi->regs + ID_REG); dsi 1221 drivers/gpu/drm/bridge/cdns-dsi.c val = readl(dsi->regs + IP_CONF); dsi 1222 drivers/gpu/drm/bridge/cdns-dsi.c dsi->direct_cmd_fifo_depth = 1 << (DIRCMD_FIFO_DEPTH(val) + 2); dsi 1223 drivers/gpu/drm/bridge/cdns-dsi.c dsi->rx_fifo_depth = RX_FIFO_DEPTH(val); dsi 1224 drivers/gpu/drm/bridge/cdns-dsi.c init_completion(&dsi->direct_cmd_comp); dsi 1226 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + MCTL_MAIN_DATA_CTL); dsi 1227 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + MCTL_MAIN_EN); dsi 1228 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + MCTL_MAIN_PHY_CTL); dsi 1239 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + MCTL_MAIN_STS_CTL); dsi 1240 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + MCTL_DPHY_ERR_CTL1); dsi 1241 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + CMD_MODE_STS_CTL); dsi 1242 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + DIRECT_CMD_STS_CTL); dsi 1243 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + DIRECT_CMD_RD_STS_CTL); dsi 1244 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + VID_MODE_STS_CTL); dsi 1245 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + TVG_STS_CTL); dsi 1246 drivers/gpu/drm/bridge/cdns-dsi.c writel(0, dsi->regs + DPI_IRQ_EN); dsi 1248 drivers/gpu/drm/bridge/cdns-dsi.c dev_name(&pdev->dev), dsi); dsi 1253 drivers/gpu/drm/bridge/cdns-dsi.c dsi->base.dev = &pdev->dev; dsi 1254 drivers/gpu/drm/bridge/cdns-dsi.c dsi->base.ops = &cdns_dsi_ops; dsi 1256 drivers/gpu/drm/bridge/cdns-dsi.c ret = mipi_dsi_host_register(&dsi->base); dsi 1260 drivers/gpu/drm/bridge/cdns-dsi.c clk_disable_unprepare(dsi->dsi_p_clk); dsi 1268 drivers/gpu/drm/bridge/cdns-dsi.c clk_disable_unprepare(dsi->dsi_p_clk); dsi 1275 drivers/gpu/drm/bridge/cdns-dsi.c struct cdns_dsi *dsi = platform_get_drvdata(pdev); dsi 1277 drivers/gpu/drm/bridge/cdns-dsi.c mipi_dsi_host_unregister(&dsi->base); dsi 255 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static inline bool dw_mipi_is_dual_mode(struct dw_mipi_dsi *dsi) dsi 257 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return dsi->slave || dsi->master; dsi 283 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val) dsi 285 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c writel(val, dsi->base + reg); dsi 288 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg) dsi 290 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return readl(dsi->base + reg); dsi 296 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c struct dw_mipi_dsi *dsi = host_to_dsi(host); dsi 297 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data; dsi 302 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (device->lanes > dsi->plat_data->max_data_lanes) { dsi 303 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dev_err(dsi->dev, "the number of data lanes(%u) is too many\n", dsi 308 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->lanes = device->lanes; dsi 309 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->channel = device->channel; dsi 310 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->format = device->format; dsi 311 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->mode_flags = device->mode_flags; dsi 324 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->panel_bridge = bridge; dsi 326 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c drm_bridge_add(&dsi->bridge); dsi 340 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c struct dw_mipi_dsi *dsi = host_to_dsi(host); dsi 341 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data; dsi 352 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c drm_bridge_remove(&dsi->bridge); dsi 357 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, dsi 368 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); dsi 369 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_CMD_MODE_CFG, val); dsi 372 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val) dsi 377 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, dsi 381 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dev_err(dsi->dev, "failed to get available command FIFO\n"); dsi 385 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_GEN_HDR, hdr_val); dsi 388 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, dsi 392 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dev_err(dsi->dev, "failed to write command FIFO\n"); dsi 399 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static int dw_mipi_dsi_write(struct dw_mipi_dsi *dsi, dsi 411 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_GEN_PLD_DATA, le32_to_cpu(word)); dsi 415 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_GEN_PLD_DATA, le32_to_cpu(word)); dsi 420 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, dsi 424 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dev_err(dsi->dev, dsi 432 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return dw_mipi_dsi_gen_pkt_hdr_write(dsi, le32_to_cpu(word)); dsi 435 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static int dw_mipi_dsi_read(struct dw_mipi_dsi *dsi, dsi 443 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, dsi 447 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dev_err(dsi->dev, "Timeout during read operation\n"); dsi 453 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, dsi 457 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dev_err(dsi->dev, "Read payload FIFO is empty\n"); dsi 461 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c val = dsi_read(dsi, DSI_GEN_PLD_DATA); dsi 472 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c struct dw_mipi_dsi *dsi = host_to_dsi(host); dsi 478 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dev_err(dsi->dev, "failed to create packet: %d\n", ret); dsi 482 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_message_config(dsi, msg); dsi 483 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (dsi->slave) dsi 484 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_message_config(dsi->slave, msg); dsi 486 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = dw_mipi_dsi_write(dsi, &packet); dsi 489 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (dsi->slave) { dsi 490 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = dw_mipi_dsi_write(dsi->slave, &packet); dsi 496 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = dw_mipi_dsi_read(dsi, msg); dsi 513 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi) dsi 524 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) dsi 526 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) dsi 532 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (dsi->vpg) { dsi 534 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c val |= dsi->vpg_horizontal ? VID_MODE_VPG_HORIZONTAL : 0; dsi 538 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_VID_MODE_CFG, val); dsi 541 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi, dsi 544 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PWR_UP, RESET); dsi 547 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE); dsi 548 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_video_mode_config(dsi); dsi 549 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); dsi 551 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE); dsi 554 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PWR_UP, POWERUP); dsi 557 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi) dsi 559 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PWR_UP, RESET); dsi 560 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_RSTZ, PHY_RSTZ); dsi 563 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi) dsi 573 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c u32 esc_clk_division = (dsi->lane_mbps >> 3) / 20 + 1; dsi 575 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PWR_UP, RESET); dsi 582 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVISION(10) | dsi 586 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi, dsi 591 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c switch (dsi->format) { dsi 611 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_DPI_VCID, DPI_VCID(dsi->channel)); dsi 612 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_DPI_COLOR_CODING, color); dsi 613 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_DPI_CFG_POL, val); dsi 620 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_DPI_LP_CMD_TIM, OUTVACT_LPCMD_TIME(4) dsi 624 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi) dsi 626 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PCKHDL_CFG, CRC_RX_EN | ECC_RX_EN | BTA_EN); dsi 629 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi, dsi 640 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_VID_PKT_SIZE, dsi 641 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_is_dual_mode(dsi) ? dsi 646 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi) dsi 653 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000)); dsi 659 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00); dsi 660 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE); dsi 664 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi, dsi 670 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8; dsi 680 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi, dsi 693 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, htotal); dsi 694 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc); dsi 696 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hsa); dsi 697 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_VID_HSA_TIME, lbcc); dsi 699 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hbp); dsi 700 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_VID_HBP_TIME, lbcc); dsi 703 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi, dsi 713 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_VID_VACTIVE_LINES, vactive); dsi 714 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_VID_VSA_LINES, vsa); dsi 715 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_VID_VFP_LINES, vfp); dsi 716 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_VID_VBP_LINES, vbp); dsi 719 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_dphy_timing_config(struct dw_mipi_dsi *dsi) dsi 731 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c hw_version = dsi_read(dsi, DSI_VERSION) & VERSION; dsi 734 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_TMR_CFG, PHY_HS2LP_TIME_V131(0x40) | dsi 736 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_TMR_RD_CFG, MAX_RD_TIME_V131(10000)); dsi 738 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_TMR_CFG, PHY_HS2LP_TIME(0x40) | dsi 742 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_TMR_LPCLK_CFG, PHY_CLKHS2LP_TIME(0x40) dsi 746 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_dphy_interface_config(struct dw_mipi_dsi *dsi) dsi 753 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_IF_CFG, PHY_STOP_WAIT_TIME(0x20) | dsi 754 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c N_LANES(dsi->lanes)); dsi 757 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_dphy_init(struct dw_mipi_dsi *dsi) dsi 760 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK dsi 762 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); dsi 763 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR); dsi 764 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); dsi 767 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_dphy_enable(struct dw_mipi_dsi *dsi) dsi 772 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK | dsi 775 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val, dsi 780 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, dsi 787 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi) dsi 789 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_read(dsi, DSI_INT_ST0); dsi 790 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_read(dsi, DSI_INT_ST1); dsi 791 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_INT_MSK0, 0); dsi 792 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi_write(dsi, DSI_INT_MSK1, 0); dsi 797 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); dsi 798 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; dsi 801 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c phy_ops->power_off(dsi->plat_data->priv_data); dsi 809 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_set_mode(dsi, 0); dsi 817 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->panel_bridge->funcs->post_disable(dsi->panel_bridge); dsi 819 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (dsi->slave) { dsi 820 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_disable(dsi->slave); dsi 821 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c clk_disable_unprepare(dsi->slave->pclk); dsi 822 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c pm_runtime_put(dsi->slave->dev); dsi 824 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_disable(dsi); dsi 826 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c clk_disable_unprepare(dsi->pclk); dsi 827 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c pm_runtime_put(dsi->dev); dsi 830 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static unsigned int dw_mipi_dsi_get_lanes(struct dw_mipi_dsi *dsi) dsi 833 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (dsi->master) dsi 834 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return dsi->master->lanes + dsi->lanes; dsi 837 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (dsi->slave) dsi 838 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return dsi->lanes + dsi->slave->lanes; dsi 841 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return dsi->lanes; dsi 844 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_mode_set(struct dw_mipi_dsi *dsi, dsi 847 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; dsi 848 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c void *priv_data = dsi->plat_data->priv_data; dsi 850 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c u32 lanes = dw_mipi_dsi_get_lanes(dsi); dsi 852 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c clk_prepare_enable(dsi->pclk); dsi 854 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = phy_ops->get_lane_mbps(priv_data, adjusted_mode, dsi->mode_flags, dsi 855 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c lanes, dsi->format, &dsi->lane_mbps); dsi 859 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c pm_runtime_get_sync(dsi->dev); dsi 860 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_init(dsi); dsi 861 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_dpi_config(dsi, adjusted_mode); dsi 862 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_packet_handler_config(dsi); dsi 863 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_video_mode_config(dsi); dsi 864 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_video_packet_config(dsi, adjusted_mode); dsi 865 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_command_mode_config(dsi); dsi 866 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_line_timer_config(dsi, adjusted_mode); dsi 867 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_vertical_timing_config(dsi, adjusted_mode); dsi 869 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_dphy_init(dsi); dsi 870 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_dphy_timing_config(dsi); dsi 871 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_dphy_interface_config(dsi); dsi 873 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_clear_err(dsi); dsi 879 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_dphy_enable(dsi); dsi 884 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_set_mode(dsi, 0); dsi 891 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); dsi 893 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_mode_set(dsi, adjusted_mode); dsi 894 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (dsi->slave) dsi 895 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_mode_set(dsi->slave, adjusted_mode); dsi 900 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); dsi 901 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; dsi 904 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_set_mode(dsi, MIPI_DSI_MODE_VIDEO); dsi 905 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (dsi->slave) dsi 906 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_set_mode(dsi->slave, MIPI_DSI_MODE_VIDEO); dsi 909 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c phy_ops->power_on(dsi->plat_data->priv_data); dsi 916 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); dsi 917 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data; dsi 928 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); dsi 939 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return drm_bridge_attach(bridge->encoder, dsi->panel_bridge, bridge); dsi 952 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_debugfs_init(struct dw_mipi_dsi *dsi) dsi 954 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->debugfs = debugfs_create_dir(dev_name(dsi->dev), NULL); dsi 955 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (IS_ERR(dsi->debugfs)) { dsi 956 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dev_err(dsi->dev, "failed to create debugfs root\n"); dsi 960 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c debugfs_create_bool("vpg", 0660, dsi->debugfs, &dsi->vpg); dsi 961 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c debugfs_create_bool("vpg_horizontal", 0660, dsi->debugfs, dsi 962 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c &dsi->vpg_horizontal); dsi 965 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_debugfs_remove(struct dw_mipi_dsi *dsi) dsi 967 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c debugfs_remove_recursive(dsi->debugfs); dsi 972 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_debugfs_init(struct dw_mipi_dsi *dsi) { } dsi 973 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void dw_mipi_dsi_debugfs_remove(struct dw_mipi_dsi *dsi) { } dsi 983 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c struct dw_mipi_dsi *dsi; dsi 987 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); dsi 988 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (!dsi) dsi 991 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->dev = dev; dsi 992 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->plat_data = plat_data; dsi 1004 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->base = devm_ioremap_resource(dev, res); dsi 1005 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (IS_ERR(dsi->base)) dsi 1009 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->base = plat_data->base; dsi 1012 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->pclk = devm_clk_get(dev, "pclk"); dsi 1013 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c if (IS_ERR(dsi->pclk)) { dsi 1014 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = PTR_ERR(dsi->pclk); dsi 1034 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = clk_prepare_enable(dsi->pclk); dsi 1044 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c clk_disable_unprepare(dsi->pclk); dsi 1047 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_debugfs_init(dsi); dsi 1050 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->dsi_host.ops = &dw_mipi_dsi_host_ops; dsi 1051 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->dsi_host.dev = dev; dsi 1052 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = mipi_dsi_host_register(&dsi->dsi_host); dsi 1055 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_debugfs_remove(dsi); dsi 1059 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->bridge.driver_private = dsi; dsi 1060 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->bridge.funcs = &dw_mipi_dsi_bridge_funcs; dsi 1062 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->bridge.of_node = pdev->dev.of_node; dsi 1065 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c return dsi; dsi 1068 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c static void __dw_mipi_dsi_remove(struct dw_mipi_dsi *dsi) dsi 1070 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c mipi_dsi_host_unregister(&dsi->dsi_host); dsi 1072 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c pm_runtime_disable(dsi->dev); dsi 1073 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dw_mipi_dsi_debugfs_remove(dsi); dsi 1076 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c void dw_mipi_dsi_set_slave(struct dw_mipi_dsi *dsi, struct dw_mipi_dsi *slave) dsi 1079 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->slave = slave; dsi 1080 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->slave->master = dsi; dsi 1083 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->slave->lanes = dsi->lanes; dsi 1084 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->slave->channel = dsi->channel; dsi 1085 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->slave->format = dsi->format; dsi 1086 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c dsi->slave->mode_flags = dsi->mode_flags; dsi 1101 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c void dw_mipi_dsi_remove(struct dw_mipi_dsi *dsi) dsi 1103 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c __dw_mipi_dsi_remove(dsi); dsi 1110 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c int dw_mipi_dsi_bind(struct dw_mipi_dsi *dsi, struct drm_encoder *encoder) dsi 1114 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c ret = drm_bridge_attach(encoder, &dsi->bridge, NULL); dsi 1124 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c void dw_mipi_dsi_unbind(struct dw_mipi_dsi *dsi) dsi 172 drivers/gpu/drm/bridge/tc358764.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 179 drivers/gpu/drm/bridge/tc358764.c ret = mipi_dsi_generic_read(dsi, &addr, sizeof(addr), val, sizeof(*val)); dsi 188 drivers/gpu/drm/bridge/tc358764.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 202 drivers/gpu/drm/bridge/tc358764.c ret = mipi_dsi_generic_write(dsi, data, sizeof(data)); dsi 432 drivers/gpu/drm/bridge/tc358764.c static int tc358764_probe(struct mipi_dsi_device *dsi) dsi 434 drivers/gpu/drm/bridge/tc358764.c struct device *dev = &dsi->dev; dsi 442 drivers/gpu/drm/bridge/tc358764.c mipi_dsi_set_drvdata(dsi, ctx); dsi 446 drivers/gpu/drm/bridge/tc358764.c dsi->lanes = 4; dsi 447 drivers/gpu/drm/bridge/tc358764.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 448 drivers/gpu/drm/bridge/tc358764.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST dsi 464 drivers/gpu/drm/bridge/tc358764.c ret = mipi_dsi_attach(dsi); dsi 473 drivers/gpu/drm/bridge/tc358764.c static int tc358764_remove(struct mipi_dsi_device *dsi) dsi 475 drivers/gpu/drm/bridge/tc358764.c struct tc358764 *ctx = mipi_dsi_get_drvdata(dsi); dsi 477 drivers/gpu/drm/bridge/tc358764.c mipi_dsi_detach(dsi); dsi 97 drivers/gpu/drm/bridge/ti-sn65dsi86.c struct mipi_dsi_device *dsi; dsi 271 drivers/gpu/drm/bridge/ti-sn65dsi86.c struct mipi_dsi_device *dsi; dsi 307 drivers/gpu/drm/bridge/ti-sn65dsi86.c dsi = mipi_dsi_device_register_full(host, &info); dsi 308 drivers/gpu/drm/bridge/ti-sn65dsi86.c if (IS_ERR(dsi)) { dsi 310 drivers/gpu/drm/bridge/ti-sn65dsi86.c ret = PTR_ERR(dsi); dsi 315 drivers/gpu/drm/bridge/ti-sn65dsi86.c dsi->lanes = 4; dsi 316 drivers/gpu/drm/bridge/ti-sn65dsi86.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 317 drivers/gpu/drm/bridge/ti-sn65dsi86.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO; dsi 324 drivers/gpu/drm/bridge/ti-sn65dsi86.c dsi->mode_flags |= MIPI_DSI_CLOCK_NON_CONTINUOUS; dsi 326 drivers/gpu/drm/bridge/ti-sn65dsi86.c ret = mipi_dsi_attach(dsi); dsi 331 drivers/gpu/drm/bridge/ti-sn65dsi86.c pdata->dsi = dsi; dsi 339 drivers/gpu/drm/bridge/ti-sn65dsi86.c mipi_dsi_device_unregister(dsi); dsi 368 drivers/gpu/drm/bridge/ti-sn65dsi86.c mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); dsi 369 drivers/gpu/drm/bridge/ti-sn65dsi86.c clk_freq_khz = bit_rate_khz / (pdata->dsi->lanes * 2); dsi 437 drivers/gpu/drm/bridge/ti-sn65dsi86.c mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); dsi 438 drivers/gpu/drm/bridge/ti-sn65dsi86.c clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2); dsi 446 drivers/gpu/drm/bridge/ti-sn65dsi86.c dp_rate_mhz = ((bit_rate_mhz / pdata->dsi->lanes) * DP_CLK_FUDGE_NUM) / dsi 502 drivers/gpu/drm/bridge/ti-sn65dsi86.c val = CHA_DSI_LANES(4 - pdata->dsi->lanes); dsi 507 drivers/gpu/drm/bridge/ti-sn65dsi86.c val = DP_NUM_LANES(pdata->dsi->lanes - 1); dsi 790 drivers/gpu/drm/bridge/ti-sn65dsi86.c if (pdata->dsi) { dsi 791 drivers/gpu/drm/bridge/ti-sn65dsi86.c mipi_dsi_detach(pdata->dsi); dsi 792 drivers/gpu/drm/bridge/ti-sn65dsi86.c mipi_dsi_device_unregister(pdata->dsi); dsi 50 drivers/gpu/drm/drm_mipi_dsi.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); dsi 57 drivers/gpu/drm/drm_mipi_dsi.c if (!strcmp(dsi->name, drv->name)) dsi 65 drivers/gpu/drm/drm_mipi_dsi.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); dsi 73 drivers/gpu/drm/drm_mipi_dsi.c dsi->name); dsi 116 drivers/gpu/drm/drm_mipi_dsi.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); dsi 119 drivers/gpu/drm/drm_mipi_dsi.c kfree(dsi); dsi 128 drivers/gpu/drm/drm_mipi_dsi.c struct mipi_dsi_device *dsi; dsi 130 drivers/gpu/drm/drm_mipi_dsi.c dsi = kzalloc(sizeof(*dsi), GFP_KERNEL); dsi 131 drivers/gpu/drm/drm_mipi_dsi.c if (!dsi) dsi 134 drivers/gpu/drm/drm_mipi_dsi.c dsi->host = host; dsi 135 drivers/gpu/drm/drm_mipi_dsi.c dsi->dev.bus = &mipi_dsi_bus_type; dsi 136 drivers/gpu/drm/drm_mipi_dsi.c dsi->dev.parent = host->dev; dsi 137 drivers/gpu/drm/drm_mipi_dsi.c dsi->dev.type = &mipi_dsi_device_type; dsi 139 drivers/gpu/drm/drm_mipi_dsi.c device_initialize(&dsi->dev); dsi 141 drivers/gpu/drm/drm_mipi_dsi.c return dsi; dsi 144 drivers/gpu/drm/drm_mipi_dsi.c static int mipi_dsi_device_add(struct mipi_dsi_device *dsi) dsi 146 drivers/gpu/drm/drm_mipi_dsi.c struct mipi_dsi_host *host = dsi->host; dsi 148 drivers/gpu/drm/drm_mipi_dsi.c dev_set_name(&dsi->dev, "%s.%d", dev_name(host->dev), dsi->channel); dsi 150 drivers/gpu/drm/drm_mipi_dsi.c return device_add(&dsi->dev); dsi 203 drivers/gpu/drm/drm_mipi_dsi.c struct mipi_dsi_device *dsi; dsi 217 drivers/gpu/drm/drm_mipi_dsi.c dsi = mipi_dsi_device_alloc(host); dsi 218 drivers/gpu/drm/drm_mipi_dsi.c if (IS_ERR(dsi)) { dsi 220 drivers/gpu/drm/drm_mipi_dsi.c PTR_ERR(dsi)); dsi 221 drivers/gpu/drm/drm_mipi_dsi.c return dsi; dsi 224 drivers/gpu/drm/drm_mipi_dsi.c dsi->dev.of_node = info->node; dsi 225 drivers/gpu/drm/drm_mipi_dsi.c dsi->channel = info->channel; dsi 226 drivers/gpu/drm/drm_mipi_dsi.c strlcpy(dsi->name, info->type, sizeof(dsi->name)); dsi 228 drivers/gpu/drm/drm_mipi_dsi.c ret = mipi_dsi_device_add(dsi); dsi 231 drivers/gpu/drm/drm_mipi_dsi.c kfree(dsi); dsi 235 drivers/gpu/drm/drm_mipi_dsi.c return dsi; dsi 243 drivers/gpu/drm/drm_mipi_dsi.c void mipi_dsi_device_unregister(struct mipi_dsi_device *dsi) dsi 245 drivers/gpu/drm/drm_mipi_dsi.c device_unregister(&dsi->dev); dsi 301 drivers/gpu/drm/drm_mipi_dsi.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); dsi 303 drivers/gpu/drm/drm_mipi_dsi.c mipi_dsi_device_unregister(dsi); dsi 322 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_attach(struct mipi_dsi_device *dsi) dsi 324 drivers/gpu/drm/drm_mipi_dsi.c const struct mipi_dsi_host_ops *ops = dsi->host->ops; dsi 329 drivers/gpu/drm/drm_mipi_dsi.c return ops->attach(dsi->host, dsi); dsi 337 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_detach(struct mipi_dsi_device *dsi) dsi 339 drivers/gpu/drm/drm_mipi_dsi.c const struct mipi_dsi_host_ops *ops = dsi->host->ops; dsi 344 drivers/gpu/drm/drm_mipi_dsi.c return ops->detach(dsi->host, dsi); dsi 348 drivers/gpu/drm/drm_mipi_dsi.c static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi, dsi 351 drivers/gpu/drm/drm_mipi_dsi.c const struct mipi_dsi_host_ops *ops = dsi->host->ops; dsi 356 drivers/gpu/drm/drm_mipi_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_LPM) dsi 359 drivers/gpu/drm/drm_mipi_dsi.c return ops->transfer(dsi->host, msg); dsi 490 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi) dsi 493 drivers/gpu/drm/drm_mipi_dsi.c .channel = dsi->channel, dsi 498 drivers/gpu/drm/drm_mipi_dsi.c int ret = mipi_dsi_device_transfer(dsi, &msg); dsi 510 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi) dsi 513 drivers/gpu/drm/drm_mipi_dsi.c .channel = dsi->channel, dsi 518 drivers/gpu/drm/drm_mipi_dsi.c int ret = mipi_dsi_device_transfer(dsi, &msg); dsi 533 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi, dsi 538 drivers/gpu/drm/drm_mipi_dsi.c .channel = dsi->channel, dsi 543 drivers/gpu/drm/drm_mipi_dsi.c int ret = mipi_dsi_device_transfer(dsi, &msg); dsi 561 drivers/gpu/drm/drm_mipi_dsi.c ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload, dsi 565 drivers/gpu/drm/drm_mipi_dsi.c .channel = dsi->channel, dsi 588 drivers/gpu/drm/drm_mipi_dsi.c return mipi_dsi_device_transfer(dsi, &msg); dsi 606 drivers/gpu/drm/drm_mipi_dsi.c ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params, dsi 610 drivers/gpu/drm/drm_mipi_dsi.c .channel = dsi->channel, dsi 634 drivers/gpu/drm/drm_mipi_dsi.c return mipi_dsi_device_transfer(dsi, &msg); dsi 650 drivers/gpu/drm/drm_mipi_dsi.c ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi, dsi 654 drivers/gpu/drm/drm_mipi_dsi.c .channel = dsi->channel, dsi 676 drivers/gpu/drm/drm_mipi_dsi.c return mipi_dsi_device_transfer(dsi, &msg); dsi 693 drivers/gpu/drm/drm_mipi_dsi.c ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd, dsi 715 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write_buffer(dsi, tx, size); dsi 733 drivers/gpu/drm/drm_mipi_dsi.c ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data, dsi 737 drivers/gpu/drm/drm_mipi_dsi.c .channel = dsi->channel, dsi 745 drivers/gpu/drm/drm_mipi_dsi.c return mipi_dsi_device_transfer(dsi, &msg); dsi 755 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi) dsi 759 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, NULL, 0); dsi 773 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi) dsi 777 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SOFT_RESET, NULL, 0); dsi 793 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode) dsi 797 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_POWER_MODE, mode, dsi 818 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format) dsi 822 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_PIXEL_FORMAT, format, dsi 842 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi) dsi 846 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_ENTER_SLEEP_MODE, NULL, 0); dsi 861 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi) dsi 865 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_EXIT_SLEEP_MODE, NULL, 0); dsi 880 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi) dsi 884 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_OFF, NULL, 0); dsi 899 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi) dsi 903 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_ON, NULL, 0); dsi 920 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start, dsi 926 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_COLUMN_ADDRESS, payload, dsi 944 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start, dsi 950 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_PAGE_ADDRESS, payload, dsi 966 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi) dsi 970 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_TEAR_OFF, NULL, 0); dsi 986 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi, dsi 992 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_TEAR_ON, &value, dsi 1009 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format) dsi 1013 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_PIXEL_FORMAT, &format, dsi 1030 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline) dsi 1036 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_generic_write(dsi, payload, sizeof(payload)); dsi 1052 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi, dsi 1058 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_BRIGHTNESS, dsi 1075 drivers/gpu/drm/drm_mipi_dsi.c int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi, dsi 1080 drivers/gpu/drm/drm_mipi_dsi.c err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_DISPLAY_BRIGHTNESS, dsi 1096 drivers/gpu/drm/drm_mipi_dsi.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); dsi 1098 drivers/gpu/drm/drm_mipi_dsi.c return drv->probe(dsi); dsi 1104 drivers/gpu/drm/drm_mipi_dsi.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); dsi 1106 drivers/gpu/drm/drm_mipi_dsi.c return drv->remove(dsi); dsi 1112 drivers/gpu/drm/drm_mipi_dsi.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); dsi 1114 drivers/gpu/drm/drm_mipi_dsi.c drv->shutdown(dsi); dsi 318 drivers/gpu/drm/exynos/exynos_drm_dsi.c static inline void exynos_dsi_write(struct exynos_dsi *dsi, enum reg_idx idx, dsi 322 drivers/gpu/drm/exynos/exynos_drm_dsi.c writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]); dsi 325 drivers/gpu/drm/exynos/exynos_drm_dsi.c static inline u32 exynos_dsi_read(struct exynos_dsi *dsi, enum reg_idx idx) dsi 327 drivers/gpu/drm/exynos/exynos_drm_dsi.c return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]); dsi 520 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_wait_for_reset(struct exynos_dsi *dsi) dsi 522 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (wait_for_completion_timeout(&dsi->completed, msecs_to_jiffies(300))) dsi 525 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "timeout waiting for reset\n"); dsi 528 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_reset(struct exynos_dsi *dsi) dsi 530 drivers/gpu/drm/exynos/exynos_drm_dsi.c u32 reset_val = dsi->driver_data->reg_values[RESET_TYPE]; dsi 532 drivers/gpu/drm/exynos/exynos_drm_dsi.c reinit_completion(&dsi->completed); dsi 533 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_SWRST_REG, reset_val); dsi 540 drivers/gpu/drm/exynos/exynos_drm_dsi.c static unsigned long exynos_dsi_pll_find_pms(struct exynos_dsi *dsi, dsi 543 drivers/gpu/drm/exynos/exynos_drm_dsi.c const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; dsi 594 drivers/gpu/drm/exynos/exynos_drm_dsi.c static unsigned long exynos_dsi_set_pll(struct exynos_dsi *dsi, dsi 597 drivers/gpu/drm/exynos/exynos_drm_dsi.c const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; dsi 604 drivers/gpu/drm/exynos/exynos_drm_dsi.c fin = dsi->pll_clk_rate; dsi 605 drivers/gpu/drm/exynos/exynos_drm_dsi.c fout = exynos_dsi_pll_find_pms(dsi, fin, freq, &p, &m, &s); dsi 607 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, dsi 611 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_dbg(dsi->dev, "PLL freq %lu, (p %d, m %d, s %d)\n", fout, p, m, s); dsi 614 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->reg_base + driver_data->plltmr_reg); dsi 631 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_dbg(dsi->dev, "band %d\n", band); dsi 636 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_PLLCTRL_REG, reg); dsi 641 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "PLL failed to stabilize\n"); dsi 644 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_STATUS_REG); dsi 650 drivers/gpu/drm/exynos/exynos_drm_dsi.c static int exynos_dsi_enable_clock(struct exynos_dsi *dsi) dsi 656 drivers/gpu/drm/exynos/exynos_drm_dsi.c hs_clk = exynos_dsi_set_pll(dsi, dsi->burst_clk_rate); dsi 658 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "failed to configure DSI PLL\n"); dsi 663 drivers/gpu/drm/exynos/exynos_drm_dsi.c esc_div = DIV_ROUND_UP(byte_clk, dsi->esc_clk_rate); dsi 671 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_dbg(dsi->dev, "hs_clk = %lu, byte_clk = %lu, esc_clk = %lu\n", dsi 674 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_CLKCTRL_REG); dsi 681 drivers/gpu/drm/exynos/exynos_drm_dsi.c | DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi->lanes) - 1) dsi 684 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_CLKCTRL_REG, reg); dsi 689 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_set_phy_ctrl(struct exynos_dsi *dsi) dsi 691 drivers/gpu/drm/exynos/exynos_drm_dsi.c const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; dsi 701 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_PHYCTRL_REG, reg); dsi 709 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_PHYTIMING_REG, reg); dsi 729 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_PHYTIMING1_REG, reg); dsi 742 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_PHYTIMING2_REG, reg); dsi 745 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_disable_clock(struct exynos_dsi *dsi) dsi 749 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_CLKCTRL_REG); dsi 752 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_CLKCTRL_REG, reg); dsi 754 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_PLLCTRL_REG); dsi 756 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_PLLCTRL_REG, reg); dsi 759 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_enable_lane(struct exynos_dsi *dsi, u32 lane) dsi 761 drivers/gpu/drm/exynos/exynos_drm_dsi.c u32 reg = exynos_dsi_read(dsi, DSIM_CONFIG_REG); dsi 762 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg |= (DSIM_NUM_OF_DATA_LANE(dsi->lanes - 1) | DSIM_LANE_EN_CLK | dsi 764 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_CONFIG_REG, reg); dsi 767 drivers/gpu/drm/exynos/exynos_drm_dsi.c static int exynos_dsi_init_link(struct exynos_dsi *dsi) dsi 769 drivers/gpu/drm/exynos/exynos_drm_dsi.c const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; dsi 775 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_FIFOCTRL_REG); dsi 777 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_FIFOCTRL_REG, reg); dsi 782 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_FIFOCTRL_REG, reg); dsi 793 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { dsi 800 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!(dsi->mode_flags & MIPI_DSI_MODE_VSYNC_FLUSH)) dsi 802 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) dsi 804 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) dsi 806 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_AUTO_VERT) dsi 808 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HSE) dsi 810 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)) dsi 812 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HBP)) dsi 814 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HSA)) dsi 818 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!(dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) dsi 821 drivers/gpu/drm/exynos/exynos_drm_dsi.c switch (dsi->format) { dsi 835 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "invalid pixel format\n"); dsi 848 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { dsi 851 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_CONFIG_REG, reg); dsi 853 drivers/gpu/drm/exynos/exynos_drm_dsi.c lanes_mask = BIT(dsi->lanes) - 1; dsi 854 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_enable_lane(dsi, lanes_mask); dsi 860 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "waiting for bus lanes timed out\n"); dsi 864 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_STATUS_REG); dsi 870 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_ESCMODE_REG); dsi 873 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_ESCMODE_REG, reg); dsi 876 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_TIMEOUT_REG, reg); dsi 881 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_set_display_mode(struct exynos_dsi *dsi) dsi 883 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct drm_display_mode *m = &dsi->encoder.crtc->state->adjusted_mode; dsi 884 drivers/gpu/drm/exynos/exynos_drm_dsi.c unsigned int num_bits_resol = dsi->driver_data->num_bits_resol; dsi 887 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { dsi 891 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_MVPORCH_REG, reg); dsi 895 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_MHPORCH_REG, reg); dsi 899 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_MSYNC_REG, reg); dsi 904 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_MDRESOL_REG, reg); dsi 906 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_dbg(dsi->dev, "LCD size = %dx%d\n", m->hdisplay, m->vdisplay); dsi 909 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_set_display_enable(struct exynos_dsi *dsi, bool enable) dsi 913 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_MDRESOL_REG); dsi 918 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_MDRESOL_REG, reg); dsi 921 drivers/gpu/drm/exynos/exynos_drm_dsi.c static int exynos_dsi_wait_for_hdr_fifo(struct exynos_dsi *dsi) dsi 926 drivers/gpu/drm/exynos/exynos_drm_dsi.c u32 reg = exynos_dsi_read(dsi, DSIM_FIFOCTRL_REG); dsi 938 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_set_cmd_lpm(struct exynos_dsi *dsi, bool lpm) dsi 940 drivers/gpu/drm/exynos/exynos_drm_dsi.c u32 v = exynos_dsi_read(dsi, DSIM_ESCMODE_REG); dsi 947 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_ESCMODE_REG, v); dsi 950 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_force_bta(struct exynos_dsi *dsi) dsi 952 drivers/gpu/drm/exynos/exynos_drm_dsi.c u32 v = exynos_dsi_read(dsi, DSIM_ESCMODE_REG); dsi 954 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_ESCMODE_REG, v); dsi 957 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_send_to_fifo(struct exynos_dsi *dsi, dsi 960 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct device *dev = dsi->dev; dsi 978 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg); dsi 993 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg); dsi 1002 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (exynos_dsi_wait_for_hdr_fifo(dsi)) { dsi 1008 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->state & DSIM_STATE_CMD_LPM)) { dsi 1009 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_set_cmd_lpm(dsi, xfer->flags & MIPI_DSI_MSG_USE_LPM); dsi 1010 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->state ^= DSIM_STATE_CMD_LPM; dsi 1013 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_PKTHDR_REG, reg); dsi 1016 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_force_bta(dsi); dsi 1019 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_read_from_fifo(struct exynos_dsi *dsi, dsi 1024 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct device *dev = dsi->dev; dsi 1029 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_RXFIFO_REG); dsi 1068 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_RXFIFO_REG); dsi 1078 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_RXFIFO_REG); dsi 1097 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = exynos_dsi_read(dsi, DSIM_RXFIFO_REG); dsi 1103 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_transfer_start(struct exynos_dsi *dsi) dsi 1110 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_lock_irqsave(&dsi->transfer_lock, flags); dsi 1112 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (list_empty(&dsi->transfer_list)) { dsi 1113 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_unlock_irqrestore(&dsi->transfer_lock, flags); dsi 1117 drivers/gpu/drm/exynos/exynos_drm_dsi.c xfer = list_first_entry(&dsi->transfer_list, dsi 1120 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_unlock_irqrestore(&dsi->transfer_lock, flags); dsi 1127 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_send_to_fifo(dsi, xfer); dsi 1135 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_lock_irqsave(&dsi->transfer_lock, flags); dsi 1138 drivers/gpu/drm/exynos/exynos_drm_dsi.c start = !list_empty(&dsi->transfer_list); dsi 1140 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_unlock_irqrestore(&dsi->transfer_lock, flags); dsi 1146 drivers/gpu/drm/exynos/exynos_drm_dsi.c static bool exynos_dsi_transfer_finish(struct exynos_dsi *dsi) dsi 1152 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_lock_irqsave(&dsi->transfer_lock, flags); dsi 1154 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (list_empty(&dsi->transfer_list)) { dsi 1155 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_unlock_irqrestore(&dsi->transfer_lock, flags); dsi 1159 drivers/gpu/drm/exynos/exynos_drm_dsi.c xfer = list_first_entry(&dsi->transfer_list, dsi 1162 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_unlock_irqrestore(&dsi->transfer_lock, flags); dsi 1164 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_dbg(dsi->dev, dsi 1173 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_read_from_fifo(dsi, xfer); dsi 1178 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_lock_irqsave(&dsi->transfer_lock, flags); dsi 1181 drivers/gpu/drm/exynos/exynos_drm_dsi.c start = !list_empty(&dsi->transfer_list); dsi 1183 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_unlock_irqrestore(&dsi->transfer_lock, flags); dsi 1192 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_remove_transfer(struct exynos_dsi *dsi, dsi 1198 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_lock_irqsave(&dsi->transfer_lock, flags); dsi 1200 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!list_empty(&dsi->transfer_list) && dsi 1201 drivers/gpu/drm/exynos/exynos_drm_dsi.c xfer == list_first_entry(&dsi->transfer_list, dsi 1204 drivers/gpu/drm/exynos/exynos_drm_dsi.c start = !list_empty(&dsi->transfer_list); dsi 1205 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_unlock_irqrestore(&dsi->transfer_lock, flags); dsi 1207 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_transfer_start(dsi); dsi 1213 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_unlock_irqrestore(&dsi->transfer_lock, flags); dsi 1216 drivers/gpu/drm/exynos/exynos_drm_dsi.c static int exynos_dsi_transfer(struct exynos_dsi *dsi, dsi 1227 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_lock_irqsave(&dsi->transfer_lock, flags); dsi 1229 drivers/gpu/drm/exynos/exynos_drm_dsi.c stopped = list_empty(&dsi->transfer_list); dsi 1230 drivers/gpu/drm/exynos/exynos_drm_dsi.c list_add_tail(&xfer->list, &dsi->transfer_list); dsi 1232 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_unlock_irqrestore(&dsi->transfer_lock, flags); dsi 1235 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_transfer_start(dsi); dsi 1241 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_remove_transfer(dsi, xfer); dsi 1242 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "xfer timed out: %*ph %*ph\n", 4, pkt->header, dsi 1253 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = dev_id; dsi 1256 drivers/gpu/drm/exynos/exynos_drm_dsi.c status = exynos_dsi_read(dsi, DSIM_INTSRC_REG); dsi 1260 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_warn(dsi->dev, "spurious interrupt\n"); dsi 1263 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_INTSRC_REG, status); dsi 1269 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_write(dsi, DSIM_INTMSK_REG, mask); dsi 1270 drivers/gpu/drm/exynos/exynos_drm_dsi.c complete(&dsi->completed); dsi 1278 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (exynos_dsi_transfer_finish(dsi)) dsi 1279 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_transfer_start(dsi); dsi 1286 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = (struct exynos_dsi *)dev_id; dsi 1287 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct drm_encoder *encoder = &dsi->encoder; dsi 1289 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->state & DSIM_STATE_VIDOUT_AVAILABLE) dsi 1295 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_enable_irq(struct exynos_dsi *dsi) dsi 1297 drivers/gpu/drm/exynos/exynos_drm_dsi.c enable_irq(dsi->irq); dsi 1299 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (gpio_is_valid(dsi->te_gpio)) dsi 1300 drivers/gpu/drm/exynos/exynos_drm_dsi.c enable_irq(gpio_to_irq(dsi->te_gpio)); dsi 1303 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_disable_irq(struct exynos_dsi *dsi) dsi 1305 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (gpio_is_valid(dsi->te_gpio)) dsi 1306 drivers/gpu/drm/exynos/exynos_drm_dsi.c disable_irq(gpio_to_irq(dsi->te_gpio)); dsi 1308 drivers/gpu/drm/exynos/exynos_drm_dsi.c disable_irq(dsi->irq); dsi 1311 drivers/gpu/drm/exynos/exynos_drm_dsi.c static int exynos_dsi_init(struct exynos_dsi *dsi) dsi 1313 drivers/gpu/drm/exynos/exynos_drm_dsi.c const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; dsi 1315 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_reset(dsi); dsi 1316 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_enable_irq(dsi); dsi 1319 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_enable_lane(dsi, BIT(dsi->lanes) - 1); dsi 1321 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_enable_clock(dsi); dsi 1323 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_wait_for_reset(dsi); dsi 1324 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_set_phy_ctrl(dsi); dsi 1325 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_init_link(dsi); dsi 1330 drivers/gpu/drm/exynos/exynos_drm_dsi.c static int exynos_dsi_register_te_irq(struct exynos_dsi *dsi, dsi 1336 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->te_gpio = of_get_named_gpio(panel->of_node, "te-gpios", 0); dsi 1337 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->te_gpio == -ENOENT) dsi 1340 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!gpio_is_valid(dsi->te_gpio)) { dsi 1341 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = dsi->te_gpio; dsi 1342 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "cannot get te-gpios, %d\n", ret); dsi 1346 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = gpio_request(dsi->te_gpio, "te_gpio"); dsi 1348 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "gpio request failed with %d\n", ret); dsi 1352 drivers/gpu/drm/exynos/exynos_drm_dsi.c te_gpio_irq = gpio_to_irq(dsi->te_gpio); dsi 1356 drivers/gpu/drm/exynos/exynos_drm_dsi.c IRQF_TRIGGER_RISING, "TE", dsi); dsi 1358 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "request interrupt failed with %d\n", ret); dsi 1359 drivers/gpu/drm/exynos/exynos_drm_dsi.c gpio_free(dsi->te_gpio); dsi 1367 drivers/gpu/drm/exynos/exynos_drm_dsi.c static void exynos_dsi_unregister_te_irq(struct exynos_dsi *dsi) dsi 1369 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (gpio_is_valid(dsi->te_gpio)) { dsi 1370 drivers/gpu/drm/exynos/exynos_drm_dsi.c free_irq(gpio_to_irq(dsi->te_gpio), dsi); dsi 1371 drivers/gpu/drm/exynos/exynos_drm_dsi.c gpio_free(dsi->te_gpio); dsi 1372 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->te_gpio = -ENOENT; dsi 1378 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = encoder_to_dsi(encoder); dsi 1381 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->state & DSIM_STATE_ENABLED) dsi 1384 drivers/gpu/drm/exynos/exynos_drm_dsi.c pm_runtime_get_sync(dsi->dev); dsi 1385 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->state |= DSIM_STATE_ENABLED; dsi 1387 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->panel) { dsi 1388 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = drm_panel_prepare(dsi->panel); dsi 1392 drivers/gpu/drm/exynos/exynos_drm_dsi.c drm_bridge_pre_enable(dsi->out_bridge); dsi 1395 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_set_display_mode(dsi); dsi 1396 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_set_display_enable(dsi, true); dsi 1398 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->panel) { dsi 1399 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = drm_panel_enable(dsi->panel); dsi 1403 drivers/gpu/drm/exynos/exynos_drm_dsi.c drm_bridge_enable(dsi->out_bridge); dsi 1406 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->state |= DSIM_STATE_VIDOUT_AVAILABLE; dsi 1410 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_set_display_enable(dsi, false); dsi 1411 drivers/gpu/drm/exynos/exynos_drm_dsi.c drm_panel_unprepare(dsi->panel); dsi 1414 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->state &= ~DSIM_STATE_ENABLED; dsi 1415 drivers/gpu/drm/exynos/exynos_drm_dsi.c pm_runtime_put(dsi->dev); dsi 1420 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = encoder_to_dsi(encoder); dsi 1422 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!(dsi->state & DSIM_STATE_ENABLED)) dsi 1425 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE; dsi 1427 drivers/gpu/drm/exynos/exynos_drm_dsi.c drm_panel_disable(dsi->panel); dsi 1428 drivers/gpu/drm/exynos/exynos_drm_dsi.c drm_bridge_disable(dsi->out_bridge); dsi 1429 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_set_display_enable(dsi, false); dsi 1430 drivers/gpu/drm/exynos/exynos_drm_dsi.c drm_panel_unprepare(dsi->panel); dsi 1431 drivers/gpu/drm/exynos/exynos_drm_dsi.c drm_bridge_post_disable(dsi->out_bridge); dsi 1432 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->state &= ~DSIM_STATE_ENABLED; dsi 1433 drivers/gpu/drm/exynos/exynos_drm_dsi.c pm_runtime_put_sync(dsi->dev); dsi 1460 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = connector_to_dsi(connector); dsi 1462 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->panel) dsi 1463 drivers/gpu/drm/exynos/exynos_drm_dsi.c return dsi->panel->funcs->get_modes(dsi->panel); dsi 1474 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = encoder_to_dsi(encoder); dsi 1475 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct drm_connector *connector = &dsi->connector; dsi 1484 drivers/gpu/drm/exynos/exynos_drm_dsi.c DRM_DEV_ERROR(dsi->dev, dsi 1515 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = host_to_dsi(host); dsi 1516 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct drm_encoder *encoder = &dsi->encoder; dsi 1523 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->out_bridge = out_bridge; dsi 1529 drivers/gpu/drm/exynos/exynos_drm_dsi.c DRM_DEV_ERROR(dsi->dev, dsi 1536 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->panel = of_drm_find_panel(device->dev.of_node); dsi 1537 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (IS_ERR(dsi->panel)) { dsi 1538 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->panel = NULL; dsi 1540 drivers/gpu/drm/exynos/exynos_drm_dsi.c drm_panel_attach(dsi->panel, &dsi->connector); dsi 1541 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->connector.status = connector_status_connected; dsi 1552 drivers/gpu/drm/exynos/exynos_drm_dsi.c int ret = exynos_dsi_register_te_irq(dsi, &device->dev); dsi 1559 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->lanes = device->lanes; dsi 1560 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->format = device->format; dsi 1561 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->mode_flags = device->mode_flags; dsi 1563 drivers/gpu/drm/exynos/exynos_drm_dsi.c !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); dsi 1576 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = host_to_dsi(host); dsi 1577 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct drm_device *drm = dsi->encoder.dev; dsi 1579 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->panel) { dsi 1581 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_disable(&dsi->encoder); dsi 1582 drivers/gpu/drm/exynos/exynos_drm_dsi.c drm_panel_detach(dsi->panel); dsi 1583 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->panel = NULL; dsi 1584 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->connector.status = connector_status_disconnected; dsi 1587 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->out_bridge->funcs->detach) dsi 1588 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->out_bridge->funcs->detach(dsi->out_bridge); dsi 1589 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->out_bridge = NULL; dsi 1595 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_unregister_te_irq(dsi); dsi 1603 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = host_to_dsi(host); dsi 1607 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!(dsi->state & DSIM_STATE_ENABLED)) dsi 1610 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!(dsi->state & DSIM_STATE_INITIALIZED)) { dsi 1611 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = exynos_dsi_init(dsi); dsi 1614 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->state |= DSIM_STATE_INITIALIZED; dsi 1625 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = exynos_dsi_transfer(dsi, &xfer); dsi 1651 drivers/gpu/drm/exynos/exynos_drm_dsi.c static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) dsi 1653 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct device *dev = dsi->dev; dsi 1658 drivers/gpu/drm/exynos/exynos_drm_dsi.c &dsi->pll_clk_rate); dsi 1663 drivers/gpu/drm/exynos/exynos_drm_dsi.c &dsi->burst_clk_rate); dsi 1668 drivers/gpu/drm/exynos/exynos_drm_dsi.c &dsi->esc_clk_rate); dsi 1672 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->in_bridge_node = of_graph_get_remote_node(node, DSI_PORT_IN, 0); dsi 1681 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = encoder_to_dsi(encoder); dsi 1695 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->in_bridge_node) { dsi 1696 drivers/gpu/drm/exynos/exynos_drm_dsi.c in_bridge = of_drm_find_bridge(dsi->in_bridge_node); dsi 1701 drivers/gpu/drm/exynos/exynos_drm_dsi.c return mipi_dsi_host_register(&dsi->dsi_host); dsi 1708 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = encoder_to_dsi(encoder); dsi 1712 drivers/gpu/drm/exynos/exynos_drm_dsi.c mipi_dsi_host_unregister(&dsi->dsi_host); dsi 1724 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi; dsi 1727 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); dsi 1728 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!dsi) dsi 1732 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->te_gpio = -ENOENT; dsi 1734 drivers/gpu/drm/exynos/exynos_drm_dsi.c init_completion(&dsi->completed); dsi 1735 drivers/gpu/drm/exynos/exynos_drm_dsi.c spin_lock_init(&dsi->transfer_lock); dsi 1736 drivers/gpu/drm/exynos/exynos_drm_dsi.c INIT_LIST_HEAD(&dsi->transfer_list); dsi 1738 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->dsi_host.ops = &exynos_dsi_ops; dsi 1739 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->dsi_host.dev = dev; dsi 1741 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->dev = dev; dsi 1742 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->driver_data = of_device_get_match_data(dev); dsi 1744 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = exynos_dsi_parse_dt(dsi); dsi 1748 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->supplies[0].supply = "vddcore"; dsi 1749 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->supplies[1].supply = "vddio"; dsi 1750 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(dsi->supplies), dsi 1751 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->supplies); dsi 1758 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->clks = devm_kcalloc(dev, dsi 1759 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->driver_data->num_clks, sizeof(*dsi->clks), dsi 1761 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!dsi->clks) dsi 1764 drivers/gpu/drm/exynos/exynos_drm_dsi.c for (i = 0; i < dsi->driver_data->num_clks; i++) { dsi 1765 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->clks[i] = devm_clk_get(dev, clk_names[i]); dsi 1766 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (IS_ERR(dsi->clks[i])) { dsi 1768 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->clks[i] = devm_clk_get(dev, dsi 1770 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (!IS_ERR(dsi->clks[i])) dsi 1776 drivers/gpu/drm/exynos/exynos_drm_dsi.c return PTR_ERR(dsi->clks[i]); dsi 1781 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->reg_base = devm_ioremap_resource(dev, res); dsi 1782 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (IS_ERR(dsi->reg_base)) { dsi 1784 drivers/gpu/drm/exynos/exynos_drm_dsi.c return PTR_ERR(dsi->reg_base); dsi 1787 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->phy = devm_phy_get(dev, "dsim"); dsi 1788 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (IS_ERR(dsi->phy)) { dsi 1790 drivers/gpu/drm/exynos/exynos_drm_dsi.c return PTR_ERR(dsi->phy); dsi 1793 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->irq = platform_get_irq(pdev, 0); dsi 1794 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->irq < 0) { dsi 1796 drivers/gpu/drm/exynos/exynos_drm_dsi.c return dsi->irq; dsi 1799 drivers/gpu/drm/exynos/exynos_drm_dsi.c irq_set_status_flags(dsi->irq, IRQ_NOAUTOEN); dsi 1800 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = devm_request_threaded_irq(dev, dsi->irq, NULL, dsi 1802 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_name(dev), dsi); dsi 1808 drivers/gpu/drm/exynos/exynos_drm_dsi.c platform_set_drvdata(pdev, &dsi->encoder); dsi 1817 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = platform_get_drvdata(pdev); dsi 1819 drivers/gpu/drm/exynos/exynos_drm_dsi.c of_node_put(dsi->in_bridge_node); dsi 1831 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = encoder_to_dsi(encoder); dsi 1832 drivers/gpu/drm/exynos/exynos_drm_dsi.c const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; dsi 1837 drivers/gpu/drm/exynos/exynos_drm_dsi.c if (dsi->state & DSIM_STATE_INITIALIZED) { dsi 1838 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->state &= ~DSIM_STATE_INITIALIZED; dsi 1840 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_disable_clock(dsi); dsi 1842 drivers/gpu/drm/exynos/exynos_drm_dsi.c exynos_dsi_disable_irq(dsi); dsi 1845 drivers/gpu/drm/exynos/exynos_drm_dsi.c dsi->state &= ~DSIM_STATE_CMD_LPM; dsi 1847 drivers/gpu/drm/exynos/exynos_drm_dsi.c phy_power_off(dsi->phy); dsi 1850 drivers/gpu/drm/exynos/exynos_drm_dsi.c clk_disable_unprepare(dsi->clks[i]); dsi 1852 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies); dsi 1854 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "cannot disable regulators %d\n", ret); dsi 1862 drivers/gpu/drm/exynos/exynos_drm_dsi.c struct exynos_dsi *dsi = encoder_to_dsi(encoder); dsi 1863 drivers/gpu/drm/exynos/exynos_drm_dsi.c const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; dsi 1866 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = regulator_bulk_enable(ARRAY_SIZE(dsi->supplies), dsi->supplies); dsi 1868 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "cannot enable regulators %d\n", ret); dsi 1873 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = clk_prepare_enable(dsi->clks[i]); dsi 1878 drivers/gpu/drm/exynos/exynos_drm_dsi.c ret = phy_power_on(dsi->phy); dsi 1880 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_err(dsi->dev, "cannot enable phy %d\n", ret); dsi 1888 drivers/gpu/drm/exynos/exynos_drm_dsi.c clk_disable_unprepare(dsi->clks[i]); dsi 1889 drivers/gpu/drm/exynos/exynos_drm_dsi.c regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies); dsi 96 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dw_dsi dsi; dsi 536 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c static void dsi_mipi_init(struct dw_dsi *dsi) dsi 538 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dsi_hw_ctx *ctx = dsi->ctx; dsi 539 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct mipi_phy_params *phy = &dsi->phy; dsi 540 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct drm_display_mode *mode = &dsi->cur_mode; dsi 541 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c u32 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format); dsi 548 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dphy_req_kHz = mode->clock * bpp / dsi->lanes; dsi 555 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy(base, phy, dsi->lanes); dsi 558 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mode_timing(base, phy->lane_byte_clk_kHz, mode, dsi->format); dsi 561 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_video_mode(base, dsi->mode_flags); dsi 567 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi->lanes, mode->clock, phy->lane_byte_clk_kHz); dsi 572 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dw_dsi *dsi = encoder_to_dsi(encoder); dsi 573 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dsi_hw_ctx *ctx = dsi->ctx; dsi 576 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c if (!dsi->enable) dsi 584 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi->enable = false; dsi 589 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dw_dsi *dsi = encoder_to_dsi(encoder); dsi 590 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dsi_hw_ctx *ctx = dsi->ctx; dsi 593 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c if (dsi->enable) dsi 602 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_mipi_init(dsi); dsi 604 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi->enable = true; dsi 611 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dw_dsi *dsi = encoder_to_dsi(encoder); dsi 613 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c u32 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format); dsi 618 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c req_kHz = mode->clock * bpp / dsi->lanes; dsi 630 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c if (mode->clock/dsi->lanes == lane_byte_clk_kHz/3) { dsi 677 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dw_dsi *dsi = encoder_to_dsi(encoder); dsi 679 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c drm_mode_copy(&dsi->cur_mode, adj_mode); dsi 730 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dw_dsi *dsi = host_to_dsi(host); dsi 737 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi->lanes = mdsi->lanes; dsi 738 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi->format = mdsi->format; dsi 739 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi->mode_flags = mdsi->mode_flags; dsi 756 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c static int dsi_host_init(struct device *dev, struct dw_dsi *dsi) dsi 758 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct mipi_dsi_host *host = &dsi->host; dsi 772 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c static int dsi_bridge_init(struct drm_device *dev, struct dw_dsi *dsi) dsi 774 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct drm_encoder *encoder = &dsi->encoder; dsi 775 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct drm_bridge *bridge = dsi->bridge; dsi 791 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dw_dsi *dsi = &ddata->dsi; dsi 795 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c ret = dw_drm_encoder_init(dev, drm_dev, &dsi->encoder); dsi 799 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c ret = dsi_host_init(dev, dsi); dsi 803 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c ret = dsi_bridge_init(drm_dev, dsi); dsi 820 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c static int dsi_parse_dt(struct platform_device *pdev, struct dw_dsi *dsi) dsi 822 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dsi_hw_ctx *ctx = dsi->ctx; dsi 831 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c ret = drm_of_find_panel_or_bridge(np, 1, 0, NULL, &dsi->bridge); dsi 854 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c struct dw_dsi *dsi; dsi 863 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi = &data->dsi; dsi 865 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi->ctx = ctx; dsi 867 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c ret = dsi_parse_dt(pdev, dsi); dsi 80 drivers/gpu/drm/i915/display/icl_dsi.c struct mipi_dsi_device *dsi; dsi 94 drivers/gpu/drm/i915/display/icl_dsi.c dsi = intel_dsi->dsi_hosts[port]->device; dsi 95 drivers/gpu/drm/i915/display/icl_dsi.c dsi->mode_flags |= MIPI_DSI_MODE_LPM; dsi 96 drivers/gpu/drm/i915/display/icl_dsi.c dsi->channel = 0; dsi 97 drivers/gpu/drm/i915/display/icl_dsi.c ret = mipi_dsi_dcs_nop(dsi); dsi 992 drivers/gpu/drm/i915/display/icl_dsi.c struct mipi_dsi_device *dsi; dsi 1010 drivers/gpu/drm/i915/display/icl_dsi.c dsi = intel_dsi->dsi_hosts[port]->device; dsi 1011 drivers/gpu/drm/i915/display/icl_dsi.c ret = mipi_dsi_set_maximum_return_packet_size(dsi, tmp); dsi 1368 drivers/gpu/drm/i915/display/icl_dsi.c struct mipi_dsi_device *dsi) dsi 1374 drivers/gpu/drm/i915/display/icl_dsi.c struct mipi_dsi_device *dsi) dsi 1431 drivers/gpu/drm/i915/display/icl_dsi.c struct mipi_config *mipi_config = dev_priv->vbt.dsi.config; dsi 1615 drivers/gpu/drm/i915/display/icl_dsi.c if (dev_priv->vbt.dsi.config->dual_link) dsi 1620 drivers/gpu/drm/i915/display/icl_dsi.c intel_dsi->dcs_backlight_ports = dev_priv->vbt.dsi.bl_ports; dsi 1621 drivers/gpu/drm/i915/display/icl_dsi.c intel_dsi->dcs_cabc_ports = dev_priv->vbt.dsi.cabc_ports; dsi 797 drivers/gpu/drm/i915/display/intel_bios.c if (!dev_priv->vbt.dsi.config->dual_link || version < 197) { dsi 798 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.bl_ports = BIT(port); dsi 799 drivers/gpu/drm/i915/display/intel_bios.c if (dev_priv->vbt.dsi.config->cabc_supported) dsi 800 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.cabc_ports = BIT(port); dsi 805 drivers/gpu/drm/i915/display/intel_bios.c switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) { dsi 807 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.bl_ports = BIT(PORT_A); dsi 810 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.bl_ports = BIT(PORT_C); dsi 814 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); dsi 818 drivers/gpu/drm/i915/display/intel_bios.c if (!dev_priv->vbt.dsi.config->cabc_supported) dsi 821 drivers/gpu/drm/i915/display/intel_bios.c switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) { dsi 823 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A); dsi 826 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C); dsi 830 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.cabc_ports = dsi 851 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; dsi 878 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); dsi 879 drivers/gpu/drm/i915/display/intel_bios.c if (!dev_priv->vbt.dsi.config) dsi 882 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); dsi 883 drivers/gpu/drm/i915/display/intel_bios.c if (!dev_priv->vbt.dsi.pps) { dsi 884 drivers/gpu/drm/i915/display/intel_bios.c kfree(dev_priv->vbt.dsi.config); dsi 897 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.orientation = dsi 901 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.orientation = dsi 905 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.orientation = dsi 909 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.orientation = dsi 915 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; dsi 1080 drivers/gpu/drm/i915/display/intel_bios.c const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; dsi 1083 drivers/gpu/drm/i915/display/intel_bios.c if (WARN_ON(!data || dev_priv->vbt.dsi.seq_version != 1)) dsi 1121 drivers/gpu/drm/i915/display/intel_bios.c if (dev_priv->vbt.dsi.config->is_cmd_mode || dsi 1122 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.seq_version != 1) dsi 1126 drivers/gpu/drm/i915/display/intel_bios.c if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || dsi 1127 drivers/gpu/drm/i915/display/intel_bios.c !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || dsi 1128 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) dsi 1139 drivers/gpu/drm/i915/display/intel_bios.c init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; dsi 1140 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); dsi 1141 drivers/gpu/drm/i915/display/intel_bios.c if (!dev_priv->vbt.dsi.deassert_seq) dsi 1143 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; dsi 1144 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; dsi 1146 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = dsi 1147 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.deassert_seq; dsi 1151 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; dsi 1166 drivers/gpu/drm/i915/display/intel_bios.c if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) dsi 1207 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.sequence[seq_id] = data + index; dsi 1219 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.data = data; dsi 1220 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.size = seq_size; dsi 1221 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.seq_version = sequence->version; dsi 1230 drivers/gpu/drm/i915/display/intel_bios.c memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); dsi 1912 drivers/gpu/drm/i915/display/intel_bios.c kfree(dev_priv->vbt.dsi.data); dsi 1913 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.data = NULL; dsi 1914 drivers/gpu/drm/i915/display/intel_bios.c kfree(dev_priv->vbt.dsi.pps); dsi 1915 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.pps = NULL; dsi 1916 drivers/gpu/drm/i915/display/intel_bios.c kfree(dev_priv->vbt.dsi.config); dsi 1917 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.config = NULL; dsi 1918 drivers/gpu/drm/i915/display/intel_bios.c kfree(dev_priv->vbt.dsi.deassert_seq); dsi 1919 drivers/gpu/drm/i915/display/intel_bios.c dev_priv->vbt.dsi.deassert_seq = NULL; dsi 119 drivers/gpu/drm/i915/display/intel_dsi.c orientation = dev_priv->vbt.dsi.orientation; dsi 231 drivers/gpu/drm/i915/display/intel_dsi_vbt.c if (dev_priv->vbt.dsi.seq_version >= 3) { dsi 268 drivers/gpu/drm/i915/display/intel_dsi_vbt.c if (dev_priv->vbt.dsi.seq_version >= 3) { dsi 352 drivers/gpu/drm/i915/display/intel_dsi_vbt.c if (dev_priv->vbt.dsi.seq_version >= 3) dsi 358 drivers/gpu/drm/i915/display/intel_dsi_vbt.c if (dev_priv->vbt.dsi.seq_version == 2) dsi 463 drivers/gpu/drm/i915/display/intel_dsi_vbt.c if (WARN_ON(seq_id >= ARRAY_SIZE(dev_priv->vbt.dsi.sequence))) dsi 466 drivers/gpu/drm/i915/display/intel_dsi_vbt.c data = dev_priv->vbt.dsi.sequence[seq_id]; dsi 479 drivers/gpu/drm/i915/display/intel_dsi_vbt.c if (dev_priv->vbt.dsi.seq_version >= 3) dsi 495 drivers/gpu/drm/i915/display/intel_dsi_vbt.c if (dev_priv->vbt.dsi.seq_version >= 3) dsi 527 drivers/gpu/drm/i915/display/intel_dsi_vbt.c if (is_vid_mode(intel_dsi) && dev_priv->vbt.dsi.seq_version >= 3) dsi 575 drivers/gpu/drm/i915/display/intel_dsi_vbt.c struct mipi_config *mipi_config = dev_priv->vbt.dsi.config; dsi 576 drivers/gpu/drm/i915/display/intel_dsi_vbt.c struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps; dsi 190 drivers/gpu/drm/i915/display/vlv_dsi.c struct mipi_dsi_device *dsi) dsi 196 drivers/gpu/drm/i915/display/vlv_dsi.c struct mipi_dsi_device *dsi) dsi 1655 drivers/gpu/drm/i915/display/vlv_dsi.c struct mipi_config *mipi_config = dev_priv->vbt.dsi.config; dsi 1879 drivers/gpu/drm/i915/display/vlv_dsi.c if (dev_priv->vbt.dsi.config->dual_link) dsi 1884 drivers/gpu/drm/i915/display/vlv_dsi.c intel_dsi->dcs_backlight_ports = dev_priv->vbt.dsi.bl_ports; dsi 1885 drivers/gpu/drm/i915/display/vlv_dsi.c intel_dsi->dcs_cabc_ports = dev_priv->vbt.dsi.cabc_ports; dsi 1925 drivers/gpu/drm/i915/display/vlv_dsi.c (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC)) { dsi 812 drivers/gpu/drm/i915/i915_drv.h } dsi; dsi 196 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_mask(struct mtk_dsi *dsi, u32 offset, u32 mask, u32 data) dsi 198 drivers/gpu/drm/mediatek/mtk_dsi.c u32 temp = readl(dsi->regs + offset); dsi 200 drivers/gpu/drm/mediatek/mtk_dsi.c writel((temp & ~mask) | (data & mask), dsi->regs + offset); dsi 203 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi) dsi 208 drivers/gpu/drm/mediatek/mtk_dsi.c ui = 1000 / dsi->data_rate + 0x01; dsi 209 drivers/gpu/drm/mediatek/mtk_dsi.c cycle_time = 8000 / dsi->data_rate + 0x01; dsi 219 drivers/gpu/drm/mediatek/mtk_dsi.c writel(timcon0, dsi->regs + DSI_PHY_TIMECON0); dsi 220 drivers/gpu/drm/mediatek/mtk_dsi.c writel(timcon1, dsi->regs + DSI_PHY_TIMECON1); dsi 221 drivers/gpu/drm/mediatek/mtk_dsi.c writel(timcon2, dsi->regs + DSI_PHY_TIMECON2); dsi 222 drivers/gpu/drm/mediatek/mtk_dsi.c writel(timcon3, dsi->regs + DSI_PHY_TIMECON3); dsi 225 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_enable(struct mtk_dsi *dsi) dsi 227 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_CON_CTRL, DSI_EN, DSI_EN); dsi 230 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_disable(struct mtk_dsi *dsi) dsi 232 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_CON_CTRL, DSI_EN, 0); dsi 235 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_reset_engine(struct mtk_dsi *dsi) dsi 237 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_CON_CTRL, DSI_RESET, DSI_RESET); dsi 238 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_CON_CTRL, DSI_RESET, 0); dsi 241 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_clk_ulp_mode_enter(struct mtk_dsi *dsi) dsi 243 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_HS_TX_EN, 0); dsi 244 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_ULPM_EN, 0); dsi 247 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_clk_ulp_mode_leave(struct mtk_dsi *dsi) dsi 249 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_ULPM_EN, 0); dsi 250 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_WAKEUP_EN, LC_WAKEUP_EN); dsi 251 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_WAKEUP_EN, 0); dsi 254 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_lane0_ulp_mode_enter(struct mtk_dsi *dsi) dsi 256 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LD0CON, LD0_HS_TX_EN, 0); dsi 257 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LD0CON, LD0_ULPM_EN, 0); dsi 260 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_lane0_ulp_mode_leave(struct mtk_dsi *dsi) dsi 262 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LD0CON, LD0_ULPM_EN, 0); dsi 263 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LD0CON, LD0_WAKEUP_EN, LD0_WAKEUP_EN); dsi 264 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LD0CON, LD0_WAKEUP_EN, 0); dsi 267 drivers/gpu/drm/mediatek/mtk_dsi.c static bool mtk_dsi_clk_hs_state(struct mtk_dsi *dsi) dsi 271 drivers/gpu/drm/mediatek/mtk_dsi.c tmp_reg1 = readl(dsi->regs + DSI_PHY_LCCON); dsi 275 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_clk_hs_mode(struct mtk_dsi *dsi, bool enter) dsi 277 drivers/gpu/drm/mediatek/mtk_dsi.c if (enter && !mtk_dsi_clk_hs_state(dsi)) dsi 278 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_HS_TX_EN, LC_HS_TX_EN); dsi 279 drivers/gpu/drm/mediatek/mtk_dsi.c else if (!enter && mtk_dsi_clk_hs_state(dsi)) dsi 280 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_HS_TX_EN, 0); dsi 283 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_set_mode(struct mtk_dsi *dsi) dsi 287 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { dsi 288 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) dsi 290 drivers/gpu/drm/mediatek/mtk_dsi.c else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) dsi 296 drivers/gpu/drm/mediatek/mtk_dsi.c writel(vid_mode, dsi->regs + DSI_MODE_CTRL); dsi 299 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_set_vm_cmd(struct mtk_dsi *dsi) dsi 301 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_VM_CMD_CON, VM_CMD_EN, VM_CMD_EN); dsi 302 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_VM_CMD_CON, TS_VFP_EN, TS_VFP_EN); dsi 305 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_ps_control_vact(struct mtk_dsi *dsi) dsi 307 drivers/gpu/drm/mediatek/mtk_dsi.c struct videomode *vm = &dsi->vm; dsi 311 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->format == MIPI_DSI_FMT_RGB565) dsi 319 drivers/gpu/drm/mediatek/mtk_dsi.c switch (dsi->format) { dsi 334 drivers/gpu/drm/mediatek/mtk_dsi.c writel(vm->vactive, dsi->regs + DSI_VACT_NL); dsi 335 drivers/gpu/drm/mediatek/mtk_dsi.c writel(ps_bpp_mode, dsi->regs + DSI_PSCTRL); dsi 336 drivers/gpu/drm/mediatek/mtk_dsi.c writel(ps_wc, dsi->regs + DSI_HSTX_CKL_WC); dsi 339 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_rxtx_control(struct mtk_dsi *dsi) dsi 343 drivers/gpu/drm/mediatek/mtk_dsi.c switch (dsi->lanes) { dsi 361 drivers/gpu/drm/mediatek/mtk_dsi.c tmp_reg |= (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) << 6; dsi 362 drivers/gpu/drm/mediatek/mtk_dsi.c tmp_reg |= (dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET) >> 3; dsi 364 drivers/gpu/drm/mediatek/mtk_dsi.c writel(tmp_reg, dsi->regs + DSI_TXRX_CTRL); dsi 367 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_ps_control(struct mtk_dsi *dsi) dsi 372 drivers/gpu/drm/mediatek/mtk_dsi.c switch (dsi->format) { dsi 395 drivers/gpu/drm/mediatek/mtk_dsi.c tmp_reg += dsi->vm.hactive * dsi_tmp_buf_bpp & DSI_PS_WC; dsi 396 drivers/gpu/drm/mediatek/mtk_dsi.c writel(tmp_reg, dsi->regs + DSI_PSCTRL); dsi 399 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) dsi 406 drivers/gpu/drm/mediatek/mtk_dsi.c struct videomode *vm = &dsi->vm; dsi 408 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->format == MIPI_DSI_FMT_RGB565) dsi 413 drivers/gpu/drm/mediatek/mtk_dsi.c writel(vm->vsync_len, dsi->regs + DSI_VSA_NL); dsi 414 drivers/gpu/drm/mediatek/mtk_dsi.c writel(vm->vback_porch, dsi->regs + DSI_VBP_NL); dsi 415 drivers/gpu/drm/mediatek/mtk_dsi.c writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL); dsi 416 drivers/gpu/drm/mediatek/mtk_dsi.c writel(vm->vactive, dsi->regs + DSI_VACT_NL); dsi 420 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) dsi 429 drivers/gpu/drm/mediatek/mtk_dsi.c writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); dsi 430 drivers/gpu/drm/mediatek/mtk_dsi.c writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); dsi 431 drivers/gpu/drm/mediatek/mtk_dsi.c writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); dsi 433 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_ps_control(dsi); dsi 436 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_start(struct mtk_dsi *dsi) dsi 438 drivers/gpu/drm/mediatek/mtk_dsi.c writel(0, dsi->regs + DSI_START); dsi 439 drivers/gpu/drm/mediatek/mtk_dsi.c writel(1, dsi->regs + DSI_START); dsi 442 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_stop(struct mtk_dsi *dsi) dsi 444 drivers/gpu/drm/mediatek/mtk_dsi.c writel(0, dsi->regs + DSI_START); dsi 447 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_set_cmd_mode(struct mtk_dsi *dsi) dsi 449 drivers/gpu/drm/mediatek/mtk_dsi.c writel(CMD_MODE, dsi->regs + DSI_MODE_CTRL); dsi 452 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_set_interrupt_enable(struct mtk_dsi *dsi) dsi 456 drivers/gpu/drm/mediatek/mtk_dsi.c writel(inten, dsi->regs + DSI_INTEN); dsi 459 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_irq_data_set(struct mtk_dsi *dsi, u32 irq_bit) dsi 461 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->irq_data |= irq_bit; dsi 464 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit) dsi 466 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->irq_data &= ~irq_bit; dsi 469 drivers/gpu/drm/mediatek/mtk_dsi.c static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag, dsi 475 drivers/gpu/drm/mediatek/mtk_dsi.c ret = wait_event_interruptible_timeout(dsi->irq_wait_queue, dsi 476 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->irq_data & irq_flag, dsi 481 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_enable(dsi); dsi 482 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_reset_engine(dsi); dsi 490 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = dev_id; dsi 494 drivers/gpu/drm/mediatek/mtk_dsi.c status = readl(dsi->regs + DSI_INTSTA) & flag; dsi 498 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_RACK, RACK, RACK); dsi 499 drivers/gpu/drm/mediatek/mtk_dsi.c tmp = readl(dsi->regs + DSI_INTSTA); dsi 502 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_INTSTA, status, 0); dsi 503 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_irq_data_set(dsi, status); dsi 504 drivers/gpu/drm/mediatek/mtk_dsi.c wake_up_interruptible(&dsi->irq_wait_queue); dsi 510 drivers/gpu/drm/mediatek/mtk_dsi.c static s32 mtk_dsi_switch_to_cmd_mode(struct mtk_dsi *dsi, u8 irq_flag, u32 t) dsi 512 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_irq_data_clear(dsi, irq_flag); dsi 513 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_set_cmd_mode(dsi); dsi 515 drivers/gpu/drm/mediatek/mtk_dsi.c if (!mtk_dsi_wait_for_irq_done(dsi, irq_flag, t)) { dsi 523 drivers/gpu/drm/mediatek/mtk_dsi.c static int mtk_dsi_poweron(struct mtk_dsi *dsi) dsi 525 drivers/gpu/drm/mediatek/mtk_dsi.c struct device *dev = dsi->dev; dsi 530 drivers/gpu/drm/mediatek/mtk_dsi.c if (++dsi->refcount != 1) dsi 533 drivers/gpu/drm/mediatek/mtk_dsi.c switch (dsi->format) { dsi 553 drivers/gpu/drm/mediatek/mtk_dsi.c pixel_clock = dsi->vm.pixelclock; dsi 554 drivers/gpu/drm/mediatek/mtk_dsi.c htotal = dsi->vm.hactive + dsi->vm.hback_porch + dsi->vm.hfront_porch + dsi 555 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->vm.hsync_len; dsi 560 drivers/gpu/drm/mediatek/mtk_dsi.c overhead_bits = overhead_cycles * dsi->lanes * 8; dsi 563 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->data_rate = DIV_ROUND_UP_ULL(pixel_clock * total_bits, dsi 564 drivers/gpu/drm/mediatek/mtk_dsi.c htotal * dsi->lanes); dsi 566 drivers/gpu/drm/mediatek/mtk_dsi.c ret = clk_set_rate(dsi->hs_clk, dsi->data_rate); dsi 572 drivers/gpu/drm/mediatek/mtk_dsi.c phy_power_on(dsi->phy); dsi 574 drivers/gpu/drm/mediatek/mtk_dsi.c ret = clk_prepare_enable(dsi->engine_clk); dsi 580 drivers/gpu/drm/mediatek/mtk_dsi.c ret = clk_prepare_enable(dsi->digital_clk); dsi 586 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_enable(dsi); dsi 587 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_reset_engine(dsi); dsi 588 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_phy_timconfig(dsi); dsi 590 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_rxtx_control(dsi); dsi 591 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_ps_control_vact(dsi); dsi 592 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_set_vm_cmd(dsi); dsi 593 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_config_vdo_timing(dsi); dsi 594 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_set_interrupt_enable(dsi); dsi 596 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_clk_ulp_mode_leave(dsi); dsi 597 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_lane0_ulp_mode_leave(dsi); dsi 598 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_clk_hs_mode(dsi, 0); dsi 600 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->panel) { dsi 601 drivers/gpu/drm/mediatek/mtk_dsi.c if (drm_panel_prepare(dsi->panel)) { dsi 609 drivers/gpu/drm/mediatek/mtk_dsi.c clk_disable_unprepare(dsi->digital_clk); dsi 611 drivers/gpu/drm/mediatek/mtk_dsi.c clk_disable_unprepare(dsi->engine_clk); dsi 613 drivers/gpu/drm/mediatek/mtk_dsi.c phy_power_off(dsi->phy); dsi 615 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->refcount--; dsi 619 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_poweroff(struct mtk_dsi *dsi) dsi 621 drivers/gpu/drm/mediatek/mtk_dsi.c if (WARN_ON(dsi->refcount == 0)) dsi 624 drivers/gpu/drm/mediatek/mtk_dsi.c if (--dsi->refcount != 0) dsi 634 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_stop(dsi); dsi 636 drivers/gpu/drm/mediatek/mtk_dsi.c if (!mtk_dsi_switch_to_cmd_mode(dsi, VM_DONE_INT_FLAG, 500)) { dsi 637 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->panel) { dsi 638 drivers/gpu/drm/mediatek/mtk_dsi.c if (drm_panel_unprepare(dsi->panel)) { dsi 645 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_reset_engine(dsi); dsi 646 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_lane0_ulp_mode_enter(dsi); dsi 647 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_clk_ulp_mode_enter(dsi); dsi 649 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_disable(dsi); dsi 651 drivers/gpu/drm/mediatek/mtk_dsi.c clk_disable_unprepare(dsi->engine_clk); dsi 652 drivers/gpu/drm/mediatek/mtk_dsi.c clk_disable_unprepare(dsi->digital_clk); dsi 654 drivers/gpu/drm/mediatek/mtk_dsi.c phy_power_off(dsi->phy); dsi 657 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_output_dsi_enable(struct mtk_dsi *dsi) dsi 661 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->enabled) dsi 664 drivers/gpu/drm/mediatek/mtk_dsi.c ret = mtk_dsi_poweron(dsi); dsi 670 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_set_mode(dsi); dsi 671 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_clk_hs_mode(dsi, 1); dsi 673 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_start(dsi); dsi 675 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->panel) { dsi 676 drivers/gpu/drm/mediatek/mtk_dsi.c if (drm_panel_enable(dsi->panel)) { dsi 682 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->enabled = true; dsi 686 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_stop(dsi); dsi 687 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_poweroff(dsi); dsi 690 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_output_dsi_disable(struct mtk_dsi *dsi) dsi 692 drivers/gpu/drm/mediatek/mtk_dsi.c if (!dsi->enabled) dsi 695 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->panel) { dsi 696 drivers/gpu/drm/mediatek/mtk_dsi.c if (drm_panel_disable(dsi->panel)) { dsi 702 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_poweroff(dsi); dsi 704 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->enabled = false; dsi 727 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = encoder_to_dsi(encoder); dsi 729 drivers/gpu/drm/mediatek/mtk_dsi.c drm_display_mode_to_videomode(adjusted, &dsi->vm); dsi 734 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = encoder_to_dsi(encoder); dsi 736 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_output_dsi_disable(dsi); dsi 741 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = encoder_to_dsi(encoder); dsi 743 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_output_dsi_enable(dsi); dsi 748 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = connector_to_dsi(connector); dsi 750 drivers/gpu/drm/mediatek/mtk_dsi.c return drm_panel_get_modes(dsi->panel); dsi 773 drivers/gpu/drm/mediatek/mtk_dsi.c static int mtk_dsi_create_connector(struct drm_device *drm, struct mtk_dsi *dsi) dsi 777 drivers/gpu/drm/mediatek/mtk_dsi.c ret = drm_connector_init(drm, &dsi->conn, &mtk_dsi_connector_funcs, dsi 784 drivers/gpu/drm/mediatek/mtk_dsi.c drm_connector_helper_add(&dsi->conn, &mtk_dsi_connector_helper_funcs); dsi 786 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->conn.dpms = DRM_MODE_DPMS_OFF; dsi 787 drivers/gpu/drm/mediatek/mtk_dsi.c drm_connector_attach_encoder(&dsi->conn, &dsi->encoder); dsi 789 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->panel) { dsi 790 drivers/gpu/drm/mediatek/mtk_dsi.c ret = drm_panel_attach(dsi->panel, &dsi->conn); dsi 800 drivers/gpu/drm/mediatek/mtk_dsi.c drm_connector_cleanup(&dsi->conn); dsi 804 drivers/gpu/drm/mediatek/mtk_dsi.c static int mtk_dsi_create_conn_enc(struct drm_device *drm, struct mtk_dsi *dsi) dsi 808 drivers/gpu/drm/mediatek/mtk_dsi.c ret = drm_encoder_init(drm, &dsi->encoder, &mtk_dsi_encoder_funcs, dsi 814 drivers/gpu/drm/mediatek/mtk_dsi.c drm_encoder_helper_add(&dsi->encoder, &mtk_dsi_encoder_helper_funcs); dsi 820 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->encoder.possible_crtcs = 1; dsi 823 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->bridge) { dsi 824 drivers/gpu/drm/mediatek/mtk_dsi.c ret = drm_bridge_attach(&dsi->encoder, dsi->bridge, NULL); dsi 831 drivers/gpu/drm/mediatek/mtk_dsi.c ret = mtk_dsi_create_connector(drm, dsi); dsi 839 drivers/gpu/drm/mediatek/mtk_dsi.c drm_encoder_cleanup(&dsi->encoder); dsi 843 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_destroy_conn_enc(struct mtk_dsi *dsi) dsi 845 drivers/gpu/drm/mediatek/mtk_dsi.c drm_encoder_cleanup(&dsi->encoder); dsi 847 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->conn.dev) dsi 848 drivers/gpu/drm/mediatek/mtk_dsi.c drm_connector_cleanup(&dsi->conn); dsi 849 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->panel) dsi 850 drivers/gpu/drm/mediatek/mtk_dsi.c drm_panel_detach(dsi->panel); dsi 855 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = container_of(comp, struct mtk_dsi, ddp_comp); dsi 857 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_poweron(dsi); dsi 862 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = container_of(comp, struct mtk_dsi, ddp_comp); dsi 864 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_poweroff(dsi); dsi 875 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = host_to_dsi(host); dsi 877 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->lanes = device->lanes; dsi 878 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->format = device->format; dsi 879 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->mode_flags = device->mode_flags; dsi 881 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->conn.dev) dsi 882 drivers/gpu/drm/mediatek/mtk_dsi.c drm_helper_hpd_irq_event(dsi->conn.dev); dsi 890 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = host_to_dsi(host); dsi 892 drivers/gpu/drm/mediatek/mtk_dsi.c if (dsi->conn.dev) dsi 893 drivers/gpu/drm/mediatek/mtk_dsi.c drm_helper_hpd_irq_event(dsi->conn.dev); dsi 898 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_wait_for_idle(struct mtk_dsi *dsi) dsi 903 drivers/gpu/drm/mediatek/mtk_dsi.c ret = readl_poll_timeout(dsi->regs + DSI_INTSTA, val, !(val & DSI_BUSY), dsi 908 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_enable(dsi); dsi 909 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_reset_engine(dsi); dsi 936 drivers/gpu/drm/mediatek/mtk_dsi.c static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg) dsi 960 drivers/gpu/drm/mediatek/mtk_dsi.c writeb(tx_buf[i], dsi->regs + DSI_CMDQ0 + cmdq_off + i); dsi 962 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_CMDQ0, cmdq_mask, reg_val); dsi 963 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE, cmdq_size); dsi 966 drivers/gpu/drm/mediatek/mtk_dsi.c static ssize_t mtk_dsi_host_send_cmd(struct mtk_dsi *dsi, dsi 969 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_wait_for_idle(dsi); dsi 970 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_irq_data_clear(dsi, flag); dsi 971 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_cmdq(dsi, msg); dsi 972 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_start(dsi); dsi 974 drivers/gpu/drm/mediatek/mtk_dsi.c if (!mtk_dsi_wait_for_irq_done(dsi, flag, 2000)) dsi 983 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = host_to_dsi(host); dsi 989 drivers/gpu/drm/mediatek/mtk_dsi.c if (readl(dsi->regs + DSI_MODE_CTRL) & MODE) { dsi 997 drivers/gpu/drm/mediatek/mtk_dsi.c if (mtk_dsi_host_send_cmd(dsi, msg, irq_flag) < 0) dsi 1009 drivers/gpu/drm/mediatek/mtk_dsi.c *(read_data + i) = readb(dsi->regs + DSI_RX_DATA0 + i); dsi 1043 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = dev_get_drvdata(dev); dsi 1045 drivers/gpu/drm/mediatek/mtk_dsi.c ret = mtk_ddp_comp_register(drm, &dsi->ddp_comp); dsi 1052 drivers/gpu/drm/mediatek/mtk_dsi.c ret = mipi_dsi_host_register(&dsi->host); dsi 1058 drivers/gpu/drm/mediatek/mtk_dsi.c ret = mtk_dsi_create_conn_enc(drm, dsi); dsi 1067 drivers/gpu/drm/mediatek/mtk_dsi.c mipi_dsi_host_unregister(&dsi->host); dsi 1069 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_ddp_comp_unregister(drm, &dsi->ddp_comp); dsi 1077 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = dev_get_drvdata(dev); dsi 1079 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_dsi_destroy_conn_enc(dsi); dsi 1080 drivers/gpu/drm/mediatek/mtk_dsi.c mipi_dsi_host_unregister(&dsi->host); dsi 1081 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_ddp_comp_unregister(drm, &dsi->ddp_comp); dsi 1091 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi; dsi 1098 drivers/gpu/drm/mediatek/mtk_dsi.c dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); dsi 1099 drivers/gpu/drm/mediatek/mtk_dsi.c if (!dsi) dsi 1102 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->host.ops = &mtk_dsi_ops; dsi 1103 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->host.dev = dev; dsi 1106 drivers/gpu/drm/mediatek/mtk_dsi.c &dsi->panel, &dsi->bridge); dsi 1110 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->engine_clk = devm_clk_get(dev, "engine"); dsi 1111 drivers/gpu/drm/mediatek/mtk_dsi.c if (IS_ERR(dsi->engine_clk)) { dsi 1112 drivers/gpu/drm/mediatek/mtk_dsi.c ret = PTR_ERR(dsi->engine_clk); dsi 1117 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->digital_clk = devm_clk_get(dev, "digital"); dsi 1118 drivers/gpu/drm/mediatek/mtk_dsi.c if (IS_ERR(dsi->digital_clk)) { dsi 1119 drivers/gpu/drm/mediatek/mtk_dsi.c ret = PTR_ERR(dsi->digital_clk); dsi 1124 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->hs_clk = devm_clk_get(dev, "hs"); dsi 1125 drivers/gpu/drm/mediatek/mtk_dsi.c if (IS_ERR(dsi->hs_clk)) { dsi 1126 drivers/gpu/drm/mediatek/mtk_dsi.c ret = PTR_ERR(dsi->hs_clk); dsi 1132 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->regs = devm_ioremap_resource(dev, regs); dsi 1133 drivers/gpu/drm/mediatek/mtk_dsi.c if (IS_ERR(dsi->regs)) { dsi 1134 drivers/gpu/drm/mediatek/mtk_dsi.c ret = PTR_ERR(dsi->regs); dsi 1139 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->phy = devm_phy_get(dev, "dphy"); dsi 1140 drivers/gpu/drm/mediatek/mtk_dsi.c if (IS_ERR(dsi->phy)) { dsi 1141 drivers/gpu/drm/mediatek/mtk_dsi.c ret = PTR_ERR(dsi->phy); dsi 1152 drivers/gpu/drm/mediatek/mtk_dsi.c ret = mtk_ddp_comp_init(dev, dev->of_node, &dsi->ddp_comp, comp_id, dsi 1167 drivers/gpu/drm/mediatek/mtk_dsi.c IRQF_TRIGGER_LOW, dev_name(&pdev->dev), dsi); dsi 1173 drivers/gpu/drm/mediatek/mtk_dsi.c init_waitqueue_head(&dsi->irq_wait_queue); dsi 1175 drivers/gpu/drm/mediatek/mtk_dsi.c platform_set_drvdata(pdev, dsi); dsi 1182 drivers/gpu/drm/mediatek/mtk_dsi.c struct mtk_dsi *dsi = platform_get_drvdata(pdev); dsi 1184 drivers/gpu/drm/mediatek/mtk_dsi.c mtk_output_dsi_disable(dsi); dsi 415 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!(priv->dsi[0] || priv->dsi[1])) dsi 427 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c for (i = 0; i < ARRAY_SIZE(priv->dsi); i++) { dsi 428 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (!priv->dsi[i]) dsi 431 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c rc = msm_dsi_modeset_init(priv->dsi[i], dev, encoder); dsi 661 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c for (i = 0; i < ARRAY_SIZE(priv->dsi); i++) { dsi 662 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c if (priv->dsi[i]) { dsi 305 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c if (!priv->dsi[dsi_id]) dsi 320 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c ret = msm_dsi_modeset_init(priv->dsi[dsi_id], dev, encoder); dsi 431 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c if ((dsi_id >= ARRAY_SIZE(priv->dsi)) || (dsi_id < 0)) { dsi 438 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c if (!priv->dsi[dsi_id]) dsi 453 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c ret = msm_dsi_modeset_init(priv->dsi[dsi_id], dev, encoder); dsi 121 drivers/gpu/drm/msm/dsi/dsi.c priv->dsi[msm_dsi->id] = msm_dsi; dsi 134 drivers/gpu/drm/msm/dsi/dsi.c if (priv->dsi[id]) { dsi 136 drivers/gpu/drm/msm/dsi/dsi.c priv->dsi[id] = NULL; dsi 1582 drivers/gpu/drm/msm/dsi/dsi_host.c struct mipi_dsi_device *dsi) dsi 1587 drivers/gpu/drm/msm/dsi/dsi_host.c if (dsi->lanes > msm_host->num_data_lanes) dsi 1590 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->channel = dsi->channel; dsi 1591 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->lanes = dsi->lanes; dsi 1592 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->format = dsi->format; dsi 1593 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->mode_flags = dsi->mode_flags; dsi 1596 drivers/gpu/drm/msm/dsi/dsi_host.c ret = dsi_host_init_panel_gpios(msm_host, &dsi->dev); dsi 1608 drivers/gpu/drm/msm/dsi/dsi_host.c struct mipi_dsi_device *dsi) dsi 22 drivers/gpu/drm/msm/dsi/dsi_manager.c struct msm_dsi *dsi[DSI_MAX]; dsi 37 drivers/gpu/drm/msm/dsi/dsi_manager.c return msm_dsim_glb.dsi[id]; dsi 42 drivers/gpu/drm/msm/dsi/dsi_manager.c return msm_dsim_glb.dsi[(id + 1) % DSI_MAX]; dsi 796 drivers/gpu/drm/msm/dsi/dsi_manager.c if (msm_dsim->dsi[id]) { dsi 801 drivers/gpu/drm/msm/dsi/dsi_manager.c msm_dsim->dsi[id] = msm_dsi; dsi 819 drivers/gpu/drm/msm/dsi/dsi_manager.c msm_dsim->dsi[id] = NULL; dsi 831 drivers/gpu/drm/msm/dsi/dsi_manager.c msm_dsim->dsi[msm_dsi->id] = NULL; dsi 160 drivers/gpu/drm/msm/msm_drv.h struct msm_dsi *dsi[2]; dsi 148 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.dcs_read(src, ddata->channel, dcs_cmd, buf, 1); dsi 162 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c return src->ops->dsi.dcs_write(src, ddata->channel, &dcs_cmd, 1); dsi 170 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c return src->ops->dsi.dcs_write(src, ddata->channel, buf, 2); dsi 183 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.dcs_write_nosync(src, ddata->channel, &cmd, 1); dsi 245 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.dcs_write_nosync(src, ddata->channel, buf, sizeof(buf)); dsi 255 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.dcs_write_nosync(src, ddata->channel, buf, sizeof(buf)); dsi 259 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bta_sync(src, ddata->channel); dsi 293 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.disable(src, false, true); dsi 319 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.enable_hs(src, ddata->channel, true); dsi 379 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 385 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 418 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 425 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 449 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 455 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 484 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 491 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 534 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 536 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 627 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.configure_pins(src, &ddata->pin_config); dsi 635 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.set_config(src, &dsi_config); dsi 645 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.enable_hs(src, ddata->channel, false); dsi 677 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.enable_video_output(src, ddata->channel); dsi 689 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.enable_hs(src, ddata->channel, true); dsi 697 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.disable(src, true, false); dsi 713 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.disable_video_output(src, ddata->channel); dsi 725 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.disable(src, true, false); dsi 751 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.request_vc(src, &ddata->channel); dsi 757 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.set_vc_id(src, ddata->channel, TCH); dsi 760 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.release_vc(src, ddata->channel); dsi 773 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.release_vc(src, ddata->channel); dsi 785 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 789 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 816 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 822 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 833 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 848 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.update(src, ddata->channel, dsicm_framedone_cb, dsi 857 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 870 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 883 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 905 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.update(src, ddata->channel, dsicm_framedone_cb, dsi 915 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 928 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 929 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 948 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.enable_te(src, enable); dsi 967 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 981 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 987 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 1029 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 1045 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.set_max_rx_packet_size(src, ddata->channel, plen); dsi 1053 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c r = src->ops->dsi.dcs_read(src, ddata->channel, dcs_cmd, dsi 1079 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.set_max_rx_packet_size(src, ddata->channel, 1); dsi 1081 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 1101 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_lock(src); dsi 1105 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c src->ops->dsi.bus_unlock(src); dsi 111 drivers/gpu/drm/omapdrm/dss/dsi.c #define REG_GET(dsi, idx, start, end) \ dsi 112 drivers/gpu/drm/omapdrm/dss/dsi.c FLD_GET(dsi_read_reg(dsi, idx), start, end) dsi 114 drivers/gpu/drm/omapdrm/dss/dsi.c #define REG_FLD_MOD(dsi, idx, val, start, end) \ dsi 115 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, idx, FLD_MOD(dsi_read_reg(dsi, idx), val, start, end)) dsi 207 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_display_init_dispc(struct dsi_data *dsi); dsi 208 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_display_uninit_dispc(struct dsi_data *dsi); dsi 210 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_send_null(struct dsi_data *dsi, int channel); dsi 273 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi; dsi 421 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi; dsi 435 drivers/gpu/drm/omapdrm/dss/dsi.c static inline void dsi_write_reg(struct dsi_data *dsi, dsi 441 drivers/gpu/drm/omapdrm/dss/dsi.c case DSI_PROTO: base = dsi->proto_base; break; dsi 442 drivers/gpu/drm/omapdrm/dss/dsi.c case DSI_PHY: base = dsi->phy_base; break; dsi 443 drivers/gpu/drm/omapdrm/dss/dsi.c case DSI_PLL: base = dsi->pll_base; break; dsi 450 drivers/gpu/drm/omapdrm/dss/dsi.c static inline u32 dsi_read_reg(struct dsi_data *dsi, const struct dsi_reg idx) dsi 455 drivers/gpu/drm/omapdrm/dss/dsi.c case DSI_PROTO: base = dsi->proto_base; break; dsi 456 drivers/gpu/drm/omapdrm/dss/dsi.c case DSI_PHY: base = dsi->phy_base; break; dsi 457 drivers/gpu/drm/omapdrm/dss/dsi.c case DSI_PLL: base = dsi->pll_base; break; dsi 466 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 468 drivers/gpu/drm/omapdrm/dss/dsi.c down(&dsi->bus_lock); dsi 473 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 475 drivers/gpu/drm/omapdrm/dss/dsi.c up(&dsi->bus_lock); dsi 478 drivers/gpu/drm/omapdrm/dss/dsi.c static bool dsi_bus_is_locked(struct dsi_data *dsi) dsi 480 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi->bus_lock.count == 0; dsi 488 drivers/gpu/drm/omapdrm/dss/dsi.c static inline bool wait_for_bit_change(struct dsi_data *dsi, dsi 499 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, idx, bitnum, bitnum) == value) dsi 506 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, idx, bitnum, bitnum) == value) dsi 534 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_perf_mark_setup(struct dsi_data *dsi) dsi 536 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->perf_setup_time = ktime_get(); dsi 539 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_perf_mark_start(struct dsi_data *dsi) dsi 541 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->perf_start_time = ktime_get(); dsi 544 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_perf_show(struct dsi_data *dsi, const char *name) dsi 555 drivers/gpu/drm/omapdrm/dss/dsi.c setup_time = ktime_sub(dsi->perf_start_time, dsi->perf_setup_time); dsi 560 drivers/gpu/drm/omapdrm/dss/dsi.c trans_time = ktime_sub(t, dsi->perf_start_time); dsi 567 drivers/gpu/drm/omapdrm/dss/dsi.c total_bytes = dsi->update_bytes; dsi 579 drivers/gpu/drm/omapdrm/dss/dsi.c static inline void dsi_perf_mark_setup(struct dsi_data *dsi) dsi 583 drivers/gpu/drm/omapdrm/dss/dsi.c static inline void dsi_perf_mark_start(struct dsi_data *dsi) dsi 587 drivers/gpu/drm/omapdrm/dss/dsi.c static inline void dsi_perf_show(struct dsi_data *dsi, const char *name) dsi 684 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_collect_irq_stats(struct dsi_data *dsi, u32 irqstatus, dsi 689 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock(&dsi->irq_stats_lock); dsi 691 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->irq_stats.irq_count++; dsi 692 drivers/gpu/drm/omapdrm/dss/dsi.c dss_collect_irq_stats(irqstatus, dsi->irq_stats.dsi_irqs); dsi 695 drivers/gpu/drm/omapdrm/dss/dsi.c dss_collect_irq_stats(vcstatus[i], dsi->irq_stats.vc_irqs[i]); dsi 697 drivers/gpu/drm/omapdrm/dss/dsi.c dss_collect_irq_stats(ciostatus, dsi->irq_stats.cio_irqs); dsi 699 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock(&dsi->irq_stats_lock); dsi 702 drivers/gpu/drm/omapdrm/dss/dsi.c #define dsi_collect_irq_stats(dsi, irqstatus, vcstatus, ciostatus) dsi 707 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_handle_irq_errors(struct dsi_data *dsi, u32 irqstatus, dsi 715 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock(&dsi->errors_lock); dsi 716 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->errors |= irqstatus & DSI_IRQ_ERROR_MASK; dsi 717 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock(&dsi->errors_lock); dsi 778 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = arg; dsi 782 drivers/gpu/drm/omapdrm/dss/dsi.c if (!dsi->is_enabled) dsi 785 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock(&dsi->irq_lock); dsi 787 drivers/gpu/drm/omapdrm/dss/dsi.c irqstatus = dsi_read_reg(dsi, DSI_IRQSTATUS); dsi 791 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock(&dsi->irq_lock); dsi 795 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK); dsi 797 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_read_reg(dsi, DSI_IRQSTATUS); dsi 805 drivers/gpu/drm/omapdrm/dss/dsi.c vcstatus[i] = dsi_read_reg(dsi, DSI_VC_IRQSTATUS(i)); dsi 807 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VC_IRQSTATUS(i), vcstatus[i]); dsi 809 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_read_reg(dsi, DSI_VC_IRQSTATUS(i)); dsi 813 drivers/gpu/drm/omapdrm/dss/dsi.c ciostatus = dsi_read_reg(dsi, DSI_COMPLEXIO_IRQ_STATUS); dsi 815 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_COMPLEXIO_IRQ_STATUS, ciostatus); dsi 817 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_read_reg(dsi, DSI_COMPLEXIO_IRQ_STATUS); dsi 824 drivers/gpu/drm/omapdrm/dss/dsi.c del_timer(&dsi->te_timer); dsi 829 drivers/gpu/drm/omapdrm/dss/dsi.c memcpy(&dsi->isr_tables_copy, &dsi->isr_tables, dsi 830 drivers/gpu/drm/omapdrm/dss/dsi.c sizeof(dsi->isr_tables)); dsi 832 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock(&dsi->irq_lock); dsi 834 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_handle_isrs(&dsi->isr_tables_copy, irqstatus, vcstatus, ciostatus); dsi 836 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_handle_irq_errors(dsi, irqstatus, vcstatus, ciostatus); dsi 838 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_collect_irq_stats(dsi, irqstatus, vcstatus, ciostatus); dsi 844 drivers/gpu/drm/omapdrm/dss/dsi.c static void _omap_dsi_configure_irqs(struct dsi_data *dsi, dsi 867 drivers/gpu/drm/omapdrm/dss/dsi.c old_mask = dsi_read_reg(dsi, enable_reg); dsi 869 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, status_reg, (mask ^ old_mask) & mask); dsi 870 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, enable_reg, mask); dsi 873 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_read_reg(dsi, enable_reg); dsi 874 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_read_reg(dsi, status_reg); dsi 878 drivers/gpu/drm/omapdrm/dss/dsi.c static void _omap_dsi_set_irqs(struct dsi_data *dsi) dsi 884 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_configure_irqs(dsi, dsi->isr_tables.isr_table, dsi 885 drivers/gpu/drm/omapdrm/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table), mask, dsi 890 drivers/gpu/drm/omapdrm/dss/dsi.c static void _omap_dsi_set_irqs_vc(struct dsi_data *dsi, int vc) dsi 892 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_configure_irqs(dsi, dsi->isr_tables.isr_table_vc[vc], dsi 893 drivers/gpu/drm/omapdrm/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc]), dsi 899 drivers/gpu/drm/omapdrm/dss/dsi.c static void _omap_dsi_set_irqs_cio(struct dsi_data *dsi) dsi 901 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_configure_irqs(dsi, dsi->isr_tables.isr_table_cio, dsi 902 drivers/gpu/drm/omapdrm/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_cio), dsi 907 drivers/gpu/drm/omapdrm/dss/dsi.c static void _dsi_initialize_irq(struct dsi_data *dsi) dsi 912 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 914 drivers/gpu/drm/omapdrm/dss/dsi.c memset(&dsi->isr_tables, 0, sizeof(dsi->isr_tables)); dsi 916 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_set_irqs(dsi); dsi 918 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_set_irqs_vc(dsi, vc); dsi 919 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_set_irqs_cio(dsi); dsi 921 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 980 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_register_isr(struct dsi_data *dsi, omap_dsi_isr_t isr, dsi 986 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 988 drivers/gpu/drm/omapdrm/dss/dsi.c r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table, dsi 989 drivers/gpu/drm/omapdrm/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table)); dsi 992 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_set_irqs(dsi); dsi 994 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 999 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_unregister_isr(struct dsi_data *dsi, omap_dsi_isr_t isr, dsi 1005 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1007 drivers/gpu/drm/omapdrm/dss/dsi.c r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table, dsi 1008 drivers/gpu/drm/omapdrm/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table)); dsi 1011 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_set_irqs(dsi); dsi 1013 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1018 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_register_isr_vc(struct dsi_data *dsi, int channel, dsi 1024 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1027 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->isr_tables.isr_table_vc[channel], dsi 1028 drivers/gpu/drm/omapdrm/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); dsi 1031 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_set_irqs_vc(dsi, channel); dsi 1033 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1038 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_unregister_isr_vc(struct dsi_data *dsi, int channel, dsi 1044 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1047 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->isr_tables.isr_table_vc[channel], dsi 1048 drivers/gpu/drm/omapdrm/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); dsi 1051 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_set_irqs_vc(dsi, channel); dsi 1053 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1058 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_register_isr_cio(struct dsi_data *dsi, omap_dsi_isr_t isr, dsi 1064 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1066 drivers/gpu/drm/omapdrm/dss/dsi.c r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, dsi 1067 drivers/gpu/drm/omapdrm/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); dsi 1070 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_set_irqs_cio(dsi); dsi 1072 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1077 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_unregister_isr_cio(struct dsi_data *dsi, omap_dsi_isr_t isr, dsi 1083 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1085 drivers/gpu/drm/omapdrm/dss/dsi.c r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, dsi 1086 drivers/gpu/drm/omapdrm/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); dsi 1089 drivers/gpu/drm/omapdrm/dss/dsi.c _omap_dsi_set_irqs_cio(dsi); dsi 1091 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1096 drivers/gpu/drm/omapdrm/dss/dsi.c static u32 dsi_get_errors(struct dsi_data *dsi) dsi 1101 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_irqsave(&dsi->errors_lock, flags); dsi 1102 drivers/gpu/drm/omapdrm/dss/dsi.c e = dsi->errors; dsi 1103 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->errors = 0; dsi 1104 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock_irqrestore(&dsi->errors_lock, flags); dsi 1108 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_runtime_get(struct dsi_data *dsi) dsi 1114 drivers/gpu/drm/omapdrm/dss/dsi.c r = pm_runtime_get_sync(dsi->dev); dsi 1119 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_runtime_put(struct dsi_data *dsi) dsi 1125 drivers/gpu/drm/omapdrm/dss/dsi.c r = pm_runtime_put_sync(dsi->dev); dsi 1129 drivers/gpu/drm/omapdrm/dss/dsi.c static void _dsi_print_reset_status(struct dsi_data *dsi) dsi 1137 drivers/gpu/drm/omapdrm/dss/dsi.c l = dsi_read_reg(dsi, DSI_DSIPHY_CFG5); dsi 1139 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->data->quirks & DSI_QUIRK_REVERSE_TXCLKESC) { dsi 1150 drivers/gpu/drm/omapdrm/dss/dsi.c FLD_GET(dsi_read_reg(dsi, DSI_##fld), start, end) dsi 1165 drivers/gpu/drm/omapdrm/dss/dsi.c static inline int dsi_if_enable(struct dsi_data *dsi, bool enable) dsi 1170 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CTRL, enable, 0, 0); /* IF_EN */ dsi 1172 drivers/gpu/drm/omapdrm/dss/dsi.c if (!wait_for_bit_change(dsi, DSI_CTRL, 0, enable)) { dsi 1180 drivers/gpu/drm/omapdrm/dss/dsi.c static unsigned long dsi_get_pll_hsdiv_dispc_rate(struct dsi_data *dsi) dsi 1182 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi->pll.cinfo.clkout[HSDIV_DISPC]; dsi 1185 drivers/gpu/drm/omapdrm/dss/dsi.c static unsigned long dsi_get_pll_hsdiv_dsi_rate(struct dsi_data *dsi) dsi 1187 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi->pll.cinfo.clkout[HSDIV_DSI]; dsi 1190 drivers/gpu/drm/omapdrm/dss/dsi.c static unsigned long dsi_get_txbyteclkhs(struct dsi_data *dsi) dsi 1192 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi->pll.cinfo.clkdco / 16; dsi 1195 drivers/gpu/drm/omapdrm/dss/dsi.c static unsigned long dsi_fclk_rate(struct dsi_data *dsi) dsi 1200 drivers/gpu/drm/omapdrm/dss/dsi.c source = dss_get_dsi_clk_source(dsi->dss, dsi->module_id); dsi 1203 drivers/gpu/drm/omapdrm/dss/dsi.c r = clk_get_rate(dsi->dss_clk); dsi 1206 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_get_pll_hsdiv_dsi_rate(dsi); dsi 1231 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_set_lp_clk_divisor(struct dsi_data *dsi) dsi 1236 drivers/gpu/drm/omapdrm/dss/dsi.c unsigned int lpdiv_max = dsi->data->max_pll_lpdiv; dsi 1239 drivers/gpu/drm/omapdrm/dss/dsi.c lp_clk_div = dsi->user_lp_cinfo.lp_clk_div; dsi 1244 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_fclk = dsi_fclk_rate(dsi); dsi 1249 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->current_lp_cinfo.lp_clk = lp_clk; dsi 1250 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->current_lp_cinfo.lp_clk_div = lp_clk_div; dsi 1253 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CLK_CTRL, lp_clk_div, 12, 0); dsi 1256 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CLK_CTRL, dsi_fclk > 30000000 ? 1 : 0, 21, 21); dsi 1261 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_enable_scp_clk(struct dsi_data *dsi) dsi 1263 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->scp_clk_refcount++ == 0) dsi 1264 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CLK_CTRL, 1, 14, 14); /* CIO_CLK_ICG */ dsi 1267 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_disable_scp_clk(struct dsi_data *dsi) dsi 1269 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(dsi->scp_clk_refcount == 0); dsi 1270 drivers/gpu/drm/omapdrm/dss/dsi.c if (--dsi->scp_clk_refcount == 0) dsi 1271 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CLK_CTRL, 0, 14, 14); /* CIO_CLK_ICG */ dsi 1281 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_pll_power(struct dsi_data *dsi, enum dsi_pll_power_state state) dsi 1286 drivers/gpu/drm/omapdrm/dss/dsi.c if ((dsi->data->quirks & DSI_QUIRK_PLL_PWR_BUG) && dsi 1291 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CLK_CTRL, state, 31, 30); dsi 1294 drivers/gpu/drm/omapdrm/dss/dsi.c while (FLD_GET(dsi_read_reg(dsi, DSI_CLK_CTRL), 29, 28) != state) { dsi 1307 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_pll_calc_dsi_fck(struct dsi_data *dsi, dsi 1312 drivers/gpu/drm/omapdrm/dss/dsi.c max_dsi_fck = dsi->data->max_fck_freq; dsi 1320 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = container_of(pll, struct dsi_data, pll); dsi 1325 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_runtime_get(dsi); dsi 1332 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_enable_scp_clk(dsi); dsi 1334 drivers/gpu/drm/omapdrm/dss/dsi.c r = regulator_enable(dsi->vdds_dsi_reg); dsi 1339 drivers/gpu/drm/omapdrm/dss/dsi.c dispc_pck_free_enable(dsi->dss->dispc, 1); dsi 1341 drivers/gpu/drm/omapdrm/dss/dsi.c if (!wait_for_bit_change(dsi, DSI_PLL_STATUS, 0, 1)) { dsi 1344 drivers/gpu/drm/omapdrm/dss/dsi.c dispc_pck_free_enable(dsi->dss->dispc, 0); dsi 1350 drivers/gpu/drm/omapdrm/dss/dsi.c dispc_pck_free_enable(dsi->dss->dispc, 0); dsi 1352 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_pll_power(dsi, DSI_PLL_POWER_ON_ALL); dsi 1361 drivers/gpu/drm/omapdrm/dss/dsi.c regulator_disable(dsi->vdds_dsi_reg); dsi 1363 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_disable_scp_clk(dsi); dsi 1364 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_runtime_put(dsi); dsi 1370 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = container_of(pll, struct dsi_data, pll); dsi 1372 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_pll_power(dsi, DSI_PLL_POWER_OFF); dsi 1374 drivers/gpu/drm/omapdrm/dss/dsi.c regulator_disable(dsi->vdds_dsi_reg); dsi 1376 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_disable_scp_clk(dsi); dsi 1377 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_runtime_put(dsi); dsi 1384 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = s->private; dsi 1385 drivers/gpu/drm/omapdrm/dss/dsi.c struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo; dsi 1387 drivers/gpu/drm/omapdrm/dss/dsi.c int dsi_module = dsi->module_id; dsi 1388 drivers/gpu/drm/omapdrm/dss/dsi.c struct dss_pll *pll = &dsi->pll; dsi 1390 drivers/gpu/drm/omapdrm/dss/dsi.c dispc_clk_src = dss_get_dispc_clk_source(dsi->dss); dsi 1391 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_clk_src = dss_get_dsi_clk_source(dsi->dss, dsi_module); dsi 1393 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi_runtime_get(dsi)) dsi 1428 drivers/gpu/drm/omapdrm/dss/dsi.c seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate(dsi)); dsi 1433 drivers/gpu/drm/omapdrm/dss/dsi.c seq_printf(s, "TxByteClkHS\t%lu\n", dsi_get_txbyteclkhs(dsi)); dsi 1435 drivers/gpu/drm/omapdrm/dss/dsi.c seq_printf(s, "LP_CLK\t\t%lu\n", dsi->current_lp_cinfo.lp_clk); dsi 1437 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_runtime_put(dsi); dsi 1445 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = s->private; dsi 1449 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_irqsave(&dsi->irq_stats_lock, flags); dsi 1451 drivers/gpu/drm/omapdrm/dss/dsi.c stats = dsi->irq_stats; dsi 1452 drivers/gpu/drm/omapdrm/dss/dsi.c memset(&dsi->irq_stats, 0, sizeof(dsi->irq_stats)); dsi 1453 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->irq_stats.last_reset = jiffies; dsi 1455 drivers/gpu/drm/omapdrm/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_stats_lock, flags); dsi 1464 drivers/gpu/drm/omapdrm/dss/dsi.c seq_printf(s, "-- DSI%d interrupts --\n", dsi->module_id + 1); dsi 1536 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = s->private; dsi 1538 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi_runtime_get(dsi)) dsi 1540 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_enable_scp_clk(dsi); dsi 1542 drivers/gpu/drm/omapdrm/dss/dsi.c #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsi, r)) dsi 1614 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_disable_scp_clk(dsi); dsi 1615 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_runtime_put(dsi); dsi 1626 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_cio_power(struct dsi_data *dsi, enum dsi_cio_power_state state) dsi 1631 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_COMPLEXIO_CFG1, state, 28, 27); dsi 1634 drivers/gpu/drm/omapdrm/dss/dsi.c while (FLD_GET(dsi_read_reg(dsi, DSI_COMPLEXIO_CFG1), dsi 1647 drivers/gpu/drm/omapdrm/dss/dsi.c static unsigned int dsi_get_line_buf_size(struct dsi_data *dsi) dsi 1655 drivers/gpu/drm/omapdrm/dss/dsi.c if (!(dsi->data->quirks & DSI_QUIRK_GNQ)) dsi 1658 drivers/gpu/drm/omapdrm/dss/dsi.c val = REG_GET(dsi, DSI_GNQ, 14, 12); /* VP1_LINE_BUFFER_SIZE */ dsi 1681 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_set_lane_config(struct dsi_data *dsi) dsi 1694 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_COMPLEXIO_CFG1); dsi 1696 drivers/gpu/drm/omapdrm/dss/dsi.c for (i = 0; i < dsi->num_lanes_used; ++i) { dsi 1701 drivers/gpu/drm/omapdrm/dss/dsi.c for (t = 0; t < dsi->num_lanes_supported; ++t) dsi 1702 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->lanes[t].function == functions[i]) dsi 1705 drivers/gpu/drm/omapdrm/dss/dsi.c if (t == dsi->num_lanes_supported) dsi 1709 drivers/gpu/drm/omapdrm/dss/dsi.c polarity = dsi->lanes[t].polarity; dsi 1716 drivers/gpu/drm/omapdrm/dss/dsi.c for (; i < dsi->num_lanes_supported; ++i) { dsi 1723 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_COMPLEXIO_CFG1, r); dsi 1728 drivers/gpu/drm/omapdrm/dss/dsi.c static inline unsigned int ns2ddr(struct dsi_data *dsi, unsigned int ns) dsi 1731 drivers/gpu/drm/omapdrm/dss/dsi.c unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; dsi 1736 drivers/gpu/drm/omapdrm/dss/dsi.c static inline unsigned int ddr2ns(struct dsi_data *dsi, unsigned int ddr) dsi 1738 drivers/gpu/drm/omapdrm/dss/dsi.c unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; dsi 1743 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_cio_timings(struct dsi_data *dsi) dsi 1755 drivers/gpu/drm/omapdrm/dss/dsi.c ths_prepare = ns2ddr(dsi, 70) + 2; dsi 1758 drivers/gpu/drm/omapdrm/dss/dsi.c ths_prepare_ths_zero = ns2ddr(dsi, 175) + 2; dsi 1761 drivers/gpu/drm/omapdrm/dss/dsi.c ths_trail = ns2ddr(dsi, 60) + 5; dsi 1764 drivers/gpu/drm/omapdrm/dss/dsi.c ths_exit = ns2ddr(dsi, 145); dsi 1767 drivers/gpu/drm/omapdrm/dss/dsi.c tlpx_half = ns2ddr(dsi, 25); dsi 1770 drivers/gpu/drm/omapdrm/dss/dsi.c tclk_trail = ns2ddr(dsi, 60) + 2; dsi 1773 drivers/gpu/drm/omapdrm/dss/dsi.c tclk_prepare = ns2ddr(dsi, 65); dsi 1776 drivers/gpu/drm/omapdrm/dss/dsi.c tclk_zero = ns2ddr(dsi, 260); dsi 1779 drivers/gpu/drm/omapdrm/dss/dsi.c ths_prepare, ddr2ns(dsi, ths_prepare), dsi 1780 drivers/gpu/drm/omapdrm/dss/dsi.c ths_prepare_ths_zero, ddr2ns(dsi, ths_prepare_ths_zero)); dsi 1782 drivers/gpu/drm/omapdrm/dss/dsi.c ths_trail, ddr2ns(dsi, ths_trail), dsi 1783 drivers/gpu/drm/omapdrm/dss/dsi.c ths_exit, ddr2ns(dsi, ths_exit)); dsi 1787 drivers/gpu/drm/omapdrm/dss/dsi.c tlpx_half, ddr2ns(dsi, tlpx_half), dsi 1788 drivers/gpu/drm/omapdrm/dss/dsi.c tclk_trail, ddr2ns(dsi, tclk_trail), dsi 1789 drivers/gpu/drm/omapdrm/dss/dsi.c tclk_zero, ddr2ns(dsi, tclk_zero)); dsi 1791 drivers/gpu/drm/omapdrm/dss/dsi.c tclk_prepare, ddr2ns(dsi, tclk_prepare)); dsi 1795 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_DSIPHY_CFG0); dsi 1800 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_DSIPHY_CFG0, r); dsi 1802 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_DSIPHY_CFG1); dsi 1807 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->data->quirks & DSI_QUIRK_PHY_DCC) { dsi 1813 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_DSIPHY_CFG1, r); dsi 1815 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_DSIPHY_CFG2); dsi 1817 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_DSIPHY_CFG2, r); dsi 1821 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_cio_enable_lane_override(struct dsi_data *dsi, dsi 1827 drivers/gpu/drm/omapdrm/dss/dsi.c u8 lptxscp_start = dsi->num_lanes_supported == 3 ? 22 : 26; dsi 1831 drivers/gpu/drm/omapdrm/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 1832 drivers/gpu/drm/omapdrm/dss/dsi.c unsigned int p = dsi->lanes[i].polarity; dsi 1853 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_DSIPHY_CFG10, l, lptxscp_start, 17); dsi 1858 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_DSIPHY_CFG10, 1, 27, 27); dsi 1861 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_cio_disable_lane_override(struct dsi_data *dsi) dsi 1864 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_DSIPHY_CFG10, 0, 27, 27); /* ENLPTXSCPDAT */ dsi 1867 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_DSIPHY_CFG10, 0, 22, 17); dsi 1870 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_cio_wait_tx_clk_esc_reset(struct dsi_data *dsi) dsi 1878 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->data->quirks & DSI_QUIRK_REVERSE_TXCLKESC) dsi 1883 drivers/gpu/drm/omapdrm/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) dsi 1884 drivers/gpu/drm/omapdrm/dss/dsi.c in_use[i] = dsi->lanes[i].function != DSI_LANE_UNUSED; dsi 1891 drivers/gpu/drm/omapdrm/dss/dsi.c l = dsi_read_reg(dsi, DSI_DSIPHY_CFG5); dsi 1894 drivers/gpu/drm/omapdrm/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 1899 drivers/gpu/drm/omapdrm/dss/dsi.c if (ok == dsi->num_lanes_supported) dsi 1903 drivers/gpu/drm/omapdrm/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 1918 drivers/gpu/drm/omapdrm/dss/dsi.c static unsigned int dsi_get_lane_mask(struct dsi_data *dsi) dsi 1923 drivers/gpu/drm/omapdrm/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 1924 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->lanes[i].function != DSI_LANE_UNUSED) dsi 1943 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_omap4_mux_pads(struct dsi_data *dsi, unsigned int lanes) dsi 1948 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->module_id == 0) { dsi 1953 drivers/gpu/drm/omapdrm/dss/dsi.c } else if (dsi->module_id == 1) { dsi 1962 drivers/gpu/drm/omapdrm/dss/dsi.c return regmap_update_bits(dsi->syscon, OMAP4_DSIPHY_SYSCON_OFFSET, dsi 1975 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_omap5_mux_pads(struct dsi_data *dsi, unsigned int lanes) dsi 1979 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->module_id == 0) dsi 1981 drivers/gpu/drm/omapdrm/dss/dsi.c else if (dsi->module_id == 1) dsi 1986 drivers/gpu/drm/omapdrm/dss/dsi.c return regmap_update_bits(dsi->syscon, OMAP5_DSIPHY_SYSCON_OFFSET, dsi 1991 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_enable_pads(struct dsi_data *dsi, unsigned int lane_mask) dsi 1993 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->data->model == DSI_MODEL_OMAP4) dsi 1994 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi_omap4_mux_pads(dsi, lane_mask); dsi 1995 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->data->model == DSI_MODEL_OMAP5) dsi 1996 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi_omap5_mux_pads(dsi, lane_mask); dsi 2000 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_disable_pads(struct dsi_data *dsi) dsi 2002 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->data->model == DSI_MODEL_OMAP4) dsi 2003 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_omap4_mux_pads(dsi, 0); dsi 2004 drivers/gpu/drm/omapdrm/dss/dsi.c else if (dsi->data->model == DSI_MODEL_OMAP5) dsi 2005 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_omap5_mux_pads(dsi, 0); dsi 2008 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_cio_init(struct dsi_data *dsi) dsi 2015 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_enable_pads(dsi, dsi_get_lane_mask(dsi)); dsi 2019 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_enable_scp_clk(dsi); dsi 2024 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_read_reg(dsi, DSI_DSIPHY_CFG5); dsi 2026 drivers/gpu/drm/omapdrm/dss/dsi.c if (!wait_for_bit_change(dsi, DSI_DSIPHY_CFG5, 30, 1)) { dsi 2032 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_set_lane_config(dsi); dsi 2037 drivers/gpu/drm/omapdrm/dss/dsi.c l = dsi_read_reg(dsi, DSI_TIMING1); dsi 2042 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_TIMING1, l); dsi 2044 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->ulps_enabled) { dsi 2061 drivers/gpu/drm/omapdrm/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 2062 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->lanes[i].function == DSI_LANE_UNUSED) dsi 2067 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_cio_enable_lane_override(dsi, mask_p, 0); dsi 2070 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_cio_power(dsi, DSI_COMPLEXIO_POWER_ON); dsi 2074 drivers/gpu/drm/omapdrm/dss/dsi.c if (!wait_for_bit_change(dsi, DSI_COMPLEXIO_CFG1, 29, 1)) { dsi 2080 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, true); dsi 2081 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, false); dsi 2082 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CLK_CTRL, 1, 20, 20); /* LP_CLK_ENABLE */ dsi 2084 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_cio_wait_tx_clk_esc_reset(dsi); dsi 2088 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->ulps_enabled) { dsi 2096 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_cio_disable_lane_override(dsi); dsi 2100 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_TIMING1, 0, 15, 15); dsi 2102 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_cio_timings(dsi); dsi 2104 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 2106 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CLK_CTRL, dsi 2107 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm_timings.ddr_clk_always_on, 13, 13); dsi 2110 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->ulps_enabled = false; dsi 2117 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CLK_CTRL, 0, 20, 20); /* LP_CLK_ENABLE */ dsi 2119 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_cio_power(dsi, DSI_COMPLEXIO_POWER_OFF); dsi 2121 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->ulps_enabled) dsi 2122 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_cio_disable_lane_override(dsi); dsi 2124 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_disable_scp_clk(dsi); dsi 2125 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_disable_pads(dsi); dsi 2129 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_cio_uninit(struct dsi_data *dsi) dsi 2132 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CLK_CTRL, 0, 13, 13); dsi 2134 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_cio_power(dsi, DSI_COMPLEXIO_POWER_OFF); dsi 2135 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_disable_scp_clk(dsi); dsi 2136 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_disable_pads(dsi); dsi 2139 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_config_tx_fifo(struct dsi_data *dsi, dsi 2147 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[0].tx_fifo_size = size1; dsi 2148 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[1].tx_fifo_size = size2; dsi 2149 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[2].tx_fifo_size = size3; dsi 2150 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[3].tx_fifo_size = size4; dsi 2154 drivers/gpu/drm/omapdrm/dss/dsi.c int size = dsi->vc[i].tx_fifo_size; dsi 2168 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_TX_FIFO_VC_SIZE, r); dsi 2171 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_config_rx_fifo(struct dsi_data *dsi, dsi 2179 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[0].rx_fifo_size = size1; dsi 2180 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[1].rx_fifo_size = size2; dsi 2181 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[2].rx_fifo_size = size3; dsi 2182 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[3].rx_fifo_size = size4; dsi 2186 drivers/gpu/drm/omapdrm/dss/dsi.c int size = dsi->vc[i].rx_fifo_size; dsi 2200 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_RX_FIFO_VC_SIZE, r); dsi 2203 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_force_tx_stop_mode_io(struct dsi_data *dsi) dsi 2207 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_TIMING1); dsi 2209 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_TIMING1, r); dsi 2211 drivers/gpu/drm/omapdrm/dss/dsi.c if (!wait_for_bit_change(dsi, DSI_TIMING1, 15, 0)) { dsi 2219 drivers/gpu/drm/omapdrm/dss/dsi.c static bool dsi_vc_is_enabled(struct dsi_data *dsi, int channel) dsi 2221 drivers/gpu/drm/omapdrm/dss/dsi.c return REG_GET(dsi, DSI_VC_CTRL(channel), 0, 0); dsi 2228 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = vp_data->dsi; dsi 2229 drivers/gpu/drm/omapdrm/dss/dsi.c const int channel = dsi->update_channel; dsi 2230 drivers/gpu/drm/omapdrm/dss/dsi.c u8 bit = dsi->te_enabled ? 30 : 31; dsi 2232 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, DSI_VC_TE(channel), bit, bit) == 0) dsi 2236 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_sync_vc_vp(struct dsi_data *dsi, int channel) dsi 2240 drivers/gpu/drm/omapdrm/dss/dsi.c .dsi = dsi, dsi 2246 drivers/gpu/drm/omapdrm/dss/dsi.c bit = dsi->te_enabled ? 30 : 31; dsi 2248 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_register_isr_vc(dsi, channel, dsi_packet_sent_handler_vp, dsi 2254 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, DSI_VC_TE(channel), bit, bit)) { dsi 2263 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_unregister_isr_vc(dsi, channel, dsi_packet_sent_handler_vp, dsi 2268 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_unregister_isr_vc(dsi, channel, dsi_packet_sent_handler_vp, dsi 2278 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = l4_data->dsi; dsi 2279 drivers/gpu/drm/omapdrm/dss/dsi.c const int channel = dsi->update_channel; dsi 2281 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, DSI_VC_CTRL(channel), 5, 5) == 0) dsi 2285 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_sync_vc_l4(struct dsi_data *dsi, int channel) dsi 2289 drivers/gpu/drm/omapdrm/dss/dsi.c .dsi = dsi, dsi 2294 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_register_isr_vc(dsi, channel, dsi_packet_sent_handler_l4, dsi 2300 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, DSI_VC_CTRL(channel), 5, 5)) { dsi 2309 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_unregister_isr_vc(dsi, channel, dsi_packet_sent_handler_l4, dsi 2314 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_unregister_isr_vc(dsi, channel, dsi_packet_sent_handler_l4, dsi 2320 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_sync_vc(struct dsi_data *dsi, int channel) dsi 2322 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(!dsi_bus_is_locked(dsi)); dsi 2326 drivers/gpu/drm/omapdrm/dss/dsi.c if (!dsi_vc_is_enabled(dsi, channel)) dsi 2329 drivers/gpu/drm/omapdrm/dss/dsi.c switch (dsi->vc[channel].source) { dsi 2331 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi_sync_vc_vp(dsi, channel); dsi 2333 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi_sync_vc_l4(dsi, channel); dsi 2340 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_enable(struct dsi_data *dsi, int channel, bool enable) dsi 2347 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_VC_CTRL(channel), enable, 0, 0); dsi 2349 drivers/gpu/drm/omapdrm/dss/dsi.c if (!wait_for_bit_change(dsi, DSI_VC_CTRL(channel), 0, enable)) { dsi 2357 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_vc_initial_config(struct dsi_data *dsi, int channel) dsi 2363 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_VC_CTRL(channel)); dsi 2376 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->data->quirks & DSI_QUIRK_VC_OCP_WIDTH) dsi 2382 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VC_CTRL(channel), r); dsi 2384 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[channel].source = DSI_VC_SOURCE_L4; dsi 2387 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_config_source(struct dsi_data *dsi, int channel, dsi 2390 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->vc[channel].source == source) dsi 2395 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_sync_vc(dsi, channel); dsi 2397 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, channel, 0); dsi 2400 drivers/gpu/drm/omapdrm/dss/dsi.c if (!wait_for_bit_change(dsi, DSI_VC_CTRL(channel), 15, 0)) { dsi 2406 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_VC_CTRL(channel), source, 1, 1); dsi 2409 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC) { dsi 2411 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_VC_CTRL(channel), enable, 30, 30); dsi 2414 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, channel, 1); dsi 2416 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[channel].source = source; dsi 2424 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 2428 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(!dsi_bus_is_locked(dsi)); dsi 2430 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, channel, 0); dsi 2431 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, 0); dsi 2433 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_VC_CTRL(channel), enable, 9, 9); dsi 2435 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, channel, 1); dsi 2436 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, 1); dsi 2438 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_force_tx_stop_mode_io(dsi); dsi 2441 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->vm_timings.ddr_clk_always_on && enable) dsi 2442 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_send_null(dsi, channel); dsi 2445 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_vc_flush_long_data(struct dsi_data *dsi, int channel) dsi 2447 drivers/gpu/drm/omapdrm/dss/dsi.c while (REG_GET(dsi, DSI_VC_CTRL(channel), 20, 20)) { dsi 2449 drivers/gpu/drm/omapdrm/dss/dsi.c val = dsi_read_reg(dsi, DSI_VC_SHORT_PACKET_HEADER(channel)); dsi 2495 drivers/gpu/drm/omapdrm/dss/dsi.c static u16 dsi_vc_flush_receive_data(struct dsi_data *dsi, int channel) dsi 2498 drivers/gpu/drm/omapdrm/dss/dsi.c while (REG_GET(dsi, DSI_VC_CTRL(channel), 20, 20)) { dsi 2501 drivers/gpu/drm/omapdrm/dss/dsi.c val = dsi_read_reg(dsi, DSI_VC_SHORT_PACKET_HEADER(channel)); dsi 2516 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_flush_long_data(dsi, channel); dsi 2524 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_send_bta(struct dsi_data *dsi, int channel) dsi 2526 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_write || dsi->debug_read) dsi 2529 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(!dsi_bus_is_locked(dsi)); dsi 2532 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, DSI_VC_CTRL(channel), 20, 20)) { dsi 2534 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_flush_receive_data(dsi, channel); dsi 2537 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_VC_CTRL(channel), 1, 6, 6); /* BTA_EN */ dsi 2540 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_read_reg(dsi, DSI_VC_CTRL(channel)); dsi 2547 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 2552 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_register_isr_vc(dsi, channel, dsi_completion_handler, dsi 2557 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_register_isr(dsi, dsi_completion_handler, &completion, dsi 2562 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_send_bta(dsi, channel); dsi 2573 drivers/gpu/drm/omapdrm/dss/dsi.c err = dsi_get_errors(dsi); dsi 2580 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_unregister_isr(dsi, dsi_completion_handler, &completion, dsi 2583 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_unregister_isr_vc(dsi, channel, dsi_completion_handler, dsi 2589 drivers/gpu/drm/omapdrm/dss/dsi.c static inline void dsi_vc_write_long_header(struct dsi_data *dsi, int channel, dsi 2595 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(!dsi_bus_is_locked(dsi)); dsi 2597 drivers/gpu/drm/omapdrm/dss/dsi.c data_id = data_type | dsi->vc[channel].vc_id << 6; dsi 2602 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VC_LONG_PACKET_HEADER(channel), val); dsi 2605 drivers/gpu/drm/omapdrm/dss/dsi.c static inline void dsi_vc_write_long_payload(struct dsi_data *dsi, int channel, dsi 2615 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VC_LONG_PACKET_PAYLOAD(channel), val); dsi 2618 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_send_long(struct dsi_data *dsi, int channel, u8 data_type, dsi 2627 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_write) dsi 2631 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->vc[channel].tx_fifo_size * 32 * 4 < len + 4) { dsi 2636 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_config_source(dsi, channel, DSI_VC_SOURCE_L4); dsi 2638 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_write_long_header(dsi, channel, data_type, len, ecc); dsi 2642 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_write) dsi 2650 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_write_long_payload(dsi, channel, b1, b2, b3, b4); dsi 2657 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_write) dsi 2675 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_write_long_payload(dsi, channel, b1, b2, b3, 0); dsi 2681 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_send_short(struct dsi_data *dsi, int channel, u8 data_type, dsi 2687 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(!dsi_bus_is_locked(dsi)); dsi 2689 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_write) dsi 2694 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_config_source(dsi, channel, DSI_VC_SOURCE_L4); dsi 2696 drivers/gpu/drm/omapdrm/dss/dsi.c if (FLD_GET(dsi_read_reg(dsi, DSI_VC_CTRL(channel)), 16, 16)) { dsi 2701 drivers/gpu/drm/omapdrm/dss/dsi.c data_id = data_type | dsi->vc[channel].vc_id << 6; dsi 2705 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VC_SHORT_PACKET_HEADER(channel), r); dsi 2710 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_send_null(struct dsi_data *dsi, int channel) dsi 2712 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi_vc_send_long(dsi, channel, MIPI_DSI_NULL_PACKET, NULL, 0, 0); dsi 2715 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_write_nosync_common(struct dsi_data *dsi, int channel, dsi 2723 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_send_short(dsi, channel, dsi 2726 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_send_short(dsi, channel, dsi 2731 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_send_short(dsi, channel, dsi 2737 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_send_long(dsi, channel, dsi 2749 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 2751 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi_vc_write_nosync_common(dsi, channel, data, len, dsi 2758 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 2760 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi_vc_write_nosync_common(dsi, channel, data, len, dsi 2768 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 2771 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_write_nosync_common(dsi, channel, data, len, type); dsi 2780 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, DSI_VC_CTRL(channel), 20, 20)) { dsi 2782 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_flush_receive_data(dsi, channel); dsi 2808 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_dcs_send_read_request(struct dsi_data *dsi, int channel, dsi 2813 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_read) dsi 2817 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_send_short(dsi, channel, MIPI_DSI_DCS_READ, dcs_cmd, 0); dsi 2827 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_generic_send_read_request(struct dsi_data *dsi, int channel, dsi 2834 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_read) dsi 2852 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_send_short(dsi, channel, data_type, data, 0); dsi 2862 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_vc_read_rx_fifo(struct dsi_data *dsi, int channel, u8 *buf, dsi 2870 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, DSI_VC_CTRL(channel), 20, 20) == 0) { dsi 2876 drivers/gpu/drm/omapdrm/dss/dsi.c val = dsi_read_reg(dsi, DSI_VC_SHORT_PACKET_HEADER(channel)); dsi 2877 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_read) dsi 2890 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_read) dsi 2907 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_read) dsi 2926 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_read) dsi 2939 drivers/gpu/drm/omapdrm/dss/dsi.c val = dsi_read_reg(dsi, dsi 2941 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->debug_read) dsi 2973 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 2976 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_dcs_send_read_request(dsi, channel, dcs_cmd); dsi 2984 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_read_rx_fifo(dsi, channel, buf, buflen, dsi 3003 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 3006 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_generic_send_read_request(dsi, channel, reqdata, reqlen); dsi 3014 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_vc_read_rx_fifo(dsi, channel, buf, buflen, dsi 3030 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 3032 drivers/gpu/drm/omapdrm/dss/dsi.c return dsi_vc_send_short(dsi, channel, dsi 3036 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_enter_ulps(struct dsi_data *dsi) dsi 3044 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(!dsi_bus_is_locked(dsi)); dsi 3046 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(dsi->ulps_enabled); dsi 3048 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->ulps_enabled) dsi 3052 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, DSI_CLK_CTRL, 13, 13)) { dsi 3053 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, 0); dsi 3054 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CLK_CTRL, 0, 13, 13); dsi 3055 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, 1); dsi 3058 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_sync_vc(dsi, 0); dsi 3059 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_sync_vc(dsi, 1); dsi 3060 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_sync_vc(dsi, 2); dsi 3061 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_sync_vc(dsi, 3); dsi 3063 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_force_tx_stop_mode_io(dsi); dsi 3065 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 0, false); dsi 3066 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 1, false); dsi 3067 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 2, false); dsi 3068 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 3, false); dsi 3070 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, DSI_COMPLEXIO_CFG2, 16, 16)) { /* HS_BUSY */ dsi 3075 drivers/gpu/drm/omapdrm/dss/dsi.c if (REG_GET(dsi, DSI_COMPLEXIO_CFG2, 17, 17)) { /* LP_BUSY */ dsi 3080 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_register_isr_cio(dsi, dsi_completion_handler, &completion, dsi 3087 drivers/gpu/drm/omapdrm/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 3088 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->lanes[i].function == DSI_LANE_UNUSED) dsi 3094 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_COMPLEXIO_CFG2, mask, 9, 5); dsi 3097 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_read_reg(dsi, DSI_COMPLEXIO_CFG2); dsi 3106 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_unregister_isr_cio(dsi, dsi_completion_handler, &completion, dsi 3110 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_COMPLEXIO_CFG2, 0, 9, 5); dsi 3113 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_read_reg(dsi, DSI_COMPLEXIO_CFG2); dsi 3115 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_cio_power(dsi, DSI_COMPLEXIO_POWER_ULPS); dsi 3117 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, false); dsi 3119 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->ulps_enabled = true; dsi 3124 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_unregister_isr_cio(dsi, dsi_completion_handler, &completion, dsi 3129 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_set_lp_rx_timeout(struct dsi_data *dsi, unsigned int ticks, dsi 3139 drivers/gpu/drm/omapdrm/dss/dsi.c fck = dsi_fclk_rate(dsi); dsi 3141 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_TIMING2); dsi 3146 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_TIMING2, r); dsi 3156 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_set_ta_timeout(struct dsi_data *dsi, unsigned int ticks, dsi 3166 drivers/gpu/drm/omapdrm/dss/dsi.c fck = dsi_fclk_rate(dsi); dsi 3168 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_TIMING1); dsi 3173 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_TIMING1, r); dsi 3183 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_set_stop_state_counter(struct dsi_data *dsi, unsigned int ticks, dsi 3193 drivers/gpu/drm/omapdrm/dss/dsi.c fck = dsi_fclk_rate(dsi); dsi 3195 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_TIMING1); dsi 3200 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_TIMING1, r); dsi 3210 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_set_hs_tx_timeout(struct dsi_data *dsi, unsigned int ticks, dsi 3220 drivers/gpu/drm/omapdrm/dss/dsi.c fck = dsi_get_txbyteclkhs(dsi); dsi 3222 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_TIMING2); dsi 3227 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_TIMING2, r); dsi 3237 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_config_vp_num_line_buffers(struct dsi_data *dsi) dsi 3241 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3242 drivers/gpu/drm/omapdrm/dss/dsi.c int bpp = dsi_get_pixel_size(dsi->pix_fmt); dsi 3243 drivers/gpu/drm/omapdrm/dss/dsi.c const struct videomode *vm = &dsi->vm; dsi 3248 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->line_buffer_size <= vm->hactive * bpp / 8) dsi 3258 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_CTRL, num_line_buffers, 13, 12); dsi 3261 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_config_vp_sync_events(struct dsi_data *dsi) dsi 3266 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE) dsi 3271 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_CTRL); dsi 3279 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_CTRL, r); dsi 3282 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_config_blanking_modes(struct dsi_data *dsi) dsi 3284 drivers/gpu/drm/omapdrm/dss/dsi.c int blanking_mode = dsi->vm_timings.blanking_mode; dsi 3285 drivers/gpu/drm/omapdrm/dss/dsi.c int hfp_blanking_mode = dsi->vm_timings.hfp_blanking_mode; dsi 3286 drivers/gpu/drm/omapdrm/dss/dsi.c int hbp_blanking_mode = dsi->vm_timings.hbp_blanking_mode; dsi 3287 drivers/gpu/drm/omapdrm/dss/dsi.c int hsa_blanking_mode = dsi->vm_timings.hsa_blanking_mode; dsi 3294 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_CTRL); dsi 3299 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_CTRL, r); dsi 3364 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_config_cmd_mode_interleaving(struct dsi_data *dsi) dsi 3372 drivers/gpu/drm/omapdrm/dss/dsi.c const struct videomode *vm = &dsi->vm; dsi 3373 drivers/gpu/drm/omapdrm/dss/dsi.c int bpp = dsi_get_pixel_size(dsi->pix_fmt); dsi 3374 drivers/gpu/drm/omapdrm/dss/dsi.c int ndl = dsi->num_lanes_used - 1; dsi 3375 drivers/gpu/drm/omapdrm/dss/dsi.c int dsi_fclk_hsdiv = dsi->user_dsi_cinfo.mX[HSDIV_DSI] + 1; dsi 3382 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_CTRL); dsi 3388 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_VM_TIMING1); dsi 3393 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_CLK_TIMING); dsi 3397 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_VM_TIMING7); dsi 3401 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_CLK_CTRL); dsi 3405 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_DSIPHY_CFG0); dsi 3408 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_DSIPHY_CFG1); dsi 3462 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_VM_TIMING4); dsi 3466 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VM_TIMING4, r); dsi 3468 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_VM_TIMING5); dsi 3472 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VM_TIMING5, r); dsi 3474 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_VM_TIMING6); dsi 3477 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VM_TIMING6, r); dsi 3480 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_proto_config(struct dsi_data *dsi) dsi 3485 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_config_tx_fifo(dsi, DSI_FIFO_SIZE_32, dsi 3490 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_config_rx_fifo(dsi, DSI_FIFO_SIZE_32, dsi 3496 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_set_stop_state_counter(dsi, 0x1000, false, false); dsi 3497 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_set_ta_timeout(dsi, 0x1fff, true, true); dsi 3498 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_set_lp_rx_timeout(dsi, 0x1fff, true, true); dsi 3499 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_set_hs_tx_timeout(dsi, 0x1fff, true, true); dsi 3501 drivers/gpu/drm/omapdrm/dss/dsi.c switch (dsi_get_pixel_size(dsi->pix_fmt)) { dsi 3516 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_CTRL); dsi 3525 drivers/gpu/drm/omapdrm/dss/dsi.c if (!(dsi->data->quirks & DSI_QUIRK_DCS_CMD_CONFIG_VC)) { dsi 3531 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_CTRL, r); dsi 3533 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_config_vp_num_line_buffers(dsi); dsi 3535 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3536 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_config_vp_sync_events(dsi); dsi 3537 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_config_blanking_modes(dsi); dsi 3538 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_config_cmd_mode_interleaving(dsi); dsi 3541 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_initial_config(dsi, 0); dsi 3542 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_initial_config(dsi, 1); dsi 3543 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_initial_config(dsi, 2); dsi 3544 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_initial_config(dsi, 3); dsi 3549 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_proto_timings(struct dsi_data *dsi) dsi 3558 drivers/gpu/drm/omapdrm/dss/dsi.c int ndl = dsi->num_lanes_used - 1; dsi 3561 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_DSIPHY_CFG0); dsi 3568 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_DSIPHY_CFG1); dsi 3573 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_DSIPHY_CFG2); dsi 3579 drivers/gpu/drm/omapdrm/dss/dsi.c tclk_post = ns2ddr(dsi, 60) + 26; dsi 3590 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_CLK_TIMING); dsi 3593 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_CLK_TIMING, r); dsi 3607 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VM_TIMING7, r); dsi 3612 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3614 drivers/gpu/drm/omapdrm/dss/dsi.c int hsa = dsi->vm_timings.hsa; dsi 3615 drivers/gpu/drm/omapdrm/dss/dsi.c int hfp = dsi->vm_timings.hfp; dsi 3616 drivers/gpu/drm/omapdrm/dss/dsi.c int hbp = dsi->vm_timings.hbp; dsi 3617 drivers/gpu/drm/omapdrm/dss/dsi.c int vsa = dsi->vm_timings.vsa; dsi 3618 drivers/gpu/drm/omapdrm/dss/dsi.c int vfp = dsi->vm_timings.vfp; dsi 3619 drivers/gpu/drm/omapdrm/dss/dsi.c int vbp = dsi->vm_timings.vbp; dsi 3620 drivers/gpu/drm/omapdrm/dss/dsi.c int window_sync = dsi->vm_timings.window_sync; dsi 3622 drivers/gpu/drm/omapdrm/dss/dsi.c const struct videomode *vm = &dsi->vm; dsi 3623 drivers/gpu/drm/omapdrm/dss/dsi.c int bpp = dsi_get_pixel_size(dsi->pix_fmt); dsi 3626 drivers/gpu/drm/omapdrm/dss/dsi.c hsync_end = dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE; dsi 3641 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_VM_TIMING1); dsi 3645 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VM_TIMING1, r); dsi 3647 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_VM_TIMING2); dsi 3652 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VM_TIMING2, r); dsi 3654 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_read_reg(dsi, DSI_VM_TIMING3); dsi 3657 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VM_TIMING3, r); dsi 3664 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 3682 drivers/gpu/drm/omapdrm/dss/dsi.c if (num_pins < 4 || num_pins > dsi->num_lanes_supported * 2 dsi 3698 drivers/gpu/drm/omapdrm/dss/dsi.c if (dx < 0 || dx >= dsi->num_lanes_supported * 2) dsi 3701 drivers/gpu/drm/omapdrm/dss/dsi.c if (dy < 0 || dy >= dsi->num_lanes_supported * 2) dsi 3721 drivers/gpu/drm/omapdrm/dss/dsi.c memcpy(dsi->lanes, lanes, sizeof(dsi->lanes)); dsi 3722 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->num_lanes_used = num_lanes; dsi 3729 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 3730 drivers/gpu/drm/omapdrm/dss/dsi.c int bpp = dsi_get_pixel_size(dsi->pix_fmt); dsi 3735 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_display_init_dispc(dsi); dsi 3739 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3740 drivers/gpu/drm/omapdrm/dss/dsi.c switch (dsi->pix_fmt) { dsi 3758 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, false); dsi 3759 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, channel, false); dsi 3762 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_VC_CTRL(channel), 1, 4, 4); dsi 3764 drivers/gpu/drm/omapdrm/dss/dsi.c word_count = DIV_ROUND_UP(dsi->vm.hactive * bpp, 8); dsi 3766 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_write_long_header(dsi, channel, data_type, dsi 3769 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, channel, true); dsi 3770 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, true); dsi 3773 drivers/gpu/drm/omapdrm/dss/dsi.c r = dss_mgr_enable(&dsi->output); dsi 3780 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3781 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, false); dsi 3782 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, channel, false); dsi 3785 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_display_uninit_dispc(dsi); dsi 3791 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 3793 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3794 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, false); dsi 3795 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, channel, false); dsi 3798 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_VC_CTRL(channel), 0, 4, 4); dsi 3800 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, channel, true); dsi 3801 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, true); dsi 3804 drivers/gpu/drm/omapdrm/dss/dsi.c dss_mgr_disable(&dsi->output); dsi 3806 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_display_uninit_dispc(dsi); dsi 3809 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_update_screen_dispc(struct dsi_data *dsi) dsi 3819 drivers/gpu/drm/omapdrm/dss/dsi.c const unsigned channel = dsi->update_channel; dsi 3820 drivers/gpu/drm/omapdrm/dss/dsi.c const unsigned int line_buf_size = dsi->line_buffer_size; dsi 3821 drivers/gpu/drm/omapdrm/dss/dsi.c u16 w = dsi->vm.hactive; dsi 3822 drivers/gpu/drm/omapdrm/dss/dsi.c u16 h = dsi->vm.vactive; dsi 3826 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_config_source(dsi, channel, DSI_VC_SOURCE_VP); dsi 3828 drivers/gpu/drm/omapdrm/dss/dsi.c bytespp = dsi_get_pixel_size(dsi->pix_fmt) / 8; dsi 3847 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VC_TE(channel), l); dsi 3849 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_write_long_header(dsi, channel, MIPI_DSI_DCS_LONG_WRITE, dsi 3852 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->te_enabled) dsi 3856 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_write_reg(dsi, DSI_VC_TE(channel), l); dsi 3864 drivers/gpu/drm/omapdrm/dss/dsi.c dispc_disable_sidle(dsi->dss->dispc); dsi 3866 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_perf_mark_start(dsi); dsi 3868 drivers/gpu/drm/omapdrm/dss/dsi.c r = schedule_delayed_work(&dsi->framedone_timeout_work, dsi 3872 drivers/gpu/drm/omapdrm/dss/dsi.c dss_mgr_start_update(&dsi->output); dsi 3874 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->te_enabled) { dsi 3877 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_TIMING2, 0, 15, 15); /* LP_RX_TO */ dsi 3879 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_send_bta(dsi, channel); dsi 3882 drivers/gpu/drm/omapdrm/dss/dsi.c mod_timer(&dsi->te_timer, jiffies + msecs_to_jiffies(250)); dsi 3894 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_handle_framedone(struct dsi_data *dsi, int error) dsi 3897 drivers/gpu/drm/omapdrm/dss/dsi.c dispc_enable_sidle(dsi->dss->dispc); dsi 3899 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->te_enabled) { dsi 3901 drivers/gpu/drm/omapdrm/dss/dsi.c REG_FLD_MOD(dsi, DSI_TIMING2, 1, 15, 15); /* LP_RX_TO */ dsi 3904 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->framedone_callback(error, dsi->framedone_data); dsi 3907 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_perf_show(dsi, "DISPC"); dsi 3912 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = container_of(work, struct dsi_data, dsi 3923 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_handle_framedone(dsi, -ETIMEDOUT); dsi 3928 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = data; dsi 3935 drivers/gpu/drm/omapdrm/dss/dsi.c cancel_delayed_work(&dsi->framedone_timeout_work); dsi 3937 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_handle_framedone(dsi, 0); dsi 3943 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 3946 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_perf_mark_setup(dsi); dsi 3948 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->update_channel = channel; dsi 3950 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->framedone_callback = callback; dsi 3951 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->framedone_data = data; dsi 3953 drivers/gpu/drm/omapdrm/dss/dsi.c dw = dsi->vm.hactive; dsi 3954 drivers/gpu/drm/omapdrm/dss/dsi.c dh = dsi->vm.vactive; dsi 3957 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->update_bytes = dw * dh * dsi 3958 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_get_pixel_size(dsi->pix_fmt) / 8; dsi 3960 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_update_screen_dispc(dsi); dsi 3967 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_configure_dispc_clocks(struct dsi_data *dsi) dsi 3973 drivers/gpu/drm/omapdrm/dss/dsi.c fck = dsi_get_pll_hsdiv_dispc_rate(dsi); dsi 3975 drivers/gpu/drm/omapdrm/dss/dsi.c dispc_cinfo.lck_div = dsi->user_dispc_cinfo.lck_div; dsi 3976 drivers/gpu/drm/omapdrm/dss/dsi.c dispc_cinfo.pck_div = dsi->user_dispc_cinfo.pck_div; dsi 3978 drivers/gpu/drm/omapdrm/dss/dsi.c r = dispc_calc_clock_rates(dsi->dss->dispc, fck, &dispc_cinfo); dsi 3984 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->mgr_config.clock_info = dispc_cinfo; dsi 3989 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_display_init_dispc(struct dsi_data *dsi) dsi 3991 drivers/gpu/drm/omapdrm/dss/dsi.c enum omap_channel channel = dsi->output.dispc_channel; dsi 3994 drivers/gpu/drm/omapdrm/dss/dsi.c dss_select_lcd_clk_source(dsi->dss, channel, dsi->module_id == 0 ? dsi 3998 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) { dsi 3999 drivers/gpu/drm/omapdrm/dss/dsi.c r = dss_mgr_register_framedone_handler(&dsi->output, dsi 4000 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_framedone_irq_callback, dsi); dsi 4006 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->mgr_config.stallmode = true; dsi 4007 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->mgr_config.fifohandcheck = true; dsi 4009 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->mgr_config.stallmode = false; dsi 4010 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->mgr_config.fifohandcheck = false; dsi 4013 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_configure_dispc_clocks(dsi); dsi 4017 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS; dsi 4018 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->mgr_config.video_port_width = dsi 4019 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_get_pixel_size(dsi->pix_fmt); dsi 4020 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->mgr_config.lcden_sig_polarity = 0; dsi 4022 drivers/gpu/drm/omapdrm/dss/dsi.c dss_mgr_set_lcd_config(&dsi->output, &dsi->mgr_config); dsi 4026 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) dsi 4027 drivers/gpu/drm/omapdrm/dss/dsi.c dss_mgr_unregister_framedone_handler(&dsi->output, dsi 4028 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_framedone_irq_callback, dsi); dsi 4030 drivers/gpu/drm/omapdrm/dss/dsi.c dss_select_lcd_clk_source(dsi->dss, channel, DSS_CLK_SRC_FCK); dsi 4034 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_display_uninit_dispc(struct dsi_data *dsi) dsi 4036 drivers/gpu/drm/omapdrm/dss/dsi.c enum omap_channel channel = dsi->output.dispc_channel; dsi 4038 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) dsi 4039 drivers/gpu/drm/omapdrm/dss/dsi.c dss_mgr_unregister_framedone_handler(&dsi->output, dsi 4040 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_framedone_irq_callback, dsi); dsi 4042 drivers/gpu/drm/omapdrm/dss/dsi.c dss_select_lcd_clk_source(dsi->dss, channel, DSS_CLK_SRC_FCK); dsi 4045 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_configure_dsi_clocks(struct dsi_data *dsi) dsi 4050 drivers/gpu/drm/omapdrm/dss/dsi.c cinfo = dsi->user_dsi_cinfo; dsi 4052 drivers/gpu/drm/omapdrm/dss/dsi.c r = dss_pll_set_config(&dsi->pll, &cinfo); dsi 4061 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_display_init_dsi(struct dsi_data *dsi) dsi 4065 drivers/gpu/drm/omapdrm/dss/dsi.c r = dss_pll_enable(&dsi->pll); dsi 4069 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_configure_dsi_clocks(dsi); dsi 4073 drivers/gpu/drm/omapdrm/dss/dsi.c dss_select_dsi_clk_source(dsi->dss, dsi->module_id, dsi 4074 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->module_id == 0 ? dsi 4079 drivers/gpu/drm/omapdrm/dss/dsi.c if (!dsi->vdds_dsi_enabled) { dsi 4080 drivers/gpu/drm/omapdrm/dss/dsi.c r = regulator_enable(dsi->vdds_dsi_reg); dsi 4084 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vdds_dsi_enabled = true; dsi 4087 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_cio_init(dsi); dsi 4091 drivers/gpu/drm/omapdrm/dss/dsi.c _dsi_print_reset_status(dsi); dsi 4093 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_proto_timings(dsi); dsi 4094 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_set_lp_clk_divisor(dsi); dsi 4097 drivers/gpu/drm/omapdrm/dss/dsi.c _dsi_print_reset_status(dsi); dsi 4099 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_proto_config(dsi); dsi 4104 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 0, 1); dsi 4105 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 1, 1); dsi 4106 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 2, 1); dsi 4107 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 3, 1); dsi 4108 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, 1); dsi 4109 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_force_tx_stop_mode_io(dsi); dsi 4113 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_cio_uninit(dsi); dsi 4115 drivers/gpu/drm/omapdrm/dss/dsi.c regulator_disable(dsi->vdds_dsi_reg); dsi 4116 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vdds_dsi_enabled = false; dsi 4118 drivers/gpu/drm/omapdrm/dss/dsi.c dss_select_dsi_clk_source(dsi->dss, dsi->module_id, DSS_CLK_SRC_FCK); dsi 4120 drivers/gpu/drm/omapdrm/dss/dsi.c dss_pll_disable(&dsi->pll); dsi 4125 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_display_uninit_dsi(struct dsi_data *dsi, bool disconnect_lanes, dsi 4128 drivers/gpu/drm/omapdrm/dss/dsi.c if (enter_ulps && !dsi->ulps_enabled) dsi 4129 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_enter_ulps(dsi); dsi 4132 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_if_enable(dsi, 0); dsi 4133 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 0, 0); dsi 4134 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 1, 0); dsi 4135 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 2, 0); dsi 4136 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_vc_enable(dsi, 3, 0); dsi 4138 drivers/gpu/drm/omapdrm/dss/dsi.c dss_select_dsi_clk_source(dsi->dss, dsi->module_id, DSS_CLK_SRC_FCK); dsi 4139 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_cio_uninit(dsi); dsi 4140 drivers/gpu/drm/omapdrm/dss/dsi.c dss_pll_disable(&dsi->pll); dsi 4143 drivers/gpu/drm/omapdrm/dss/dsi.c regulator_disable(dsi->vdds_dsi_reg); dsi 4144 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vdds_dsi_enabled = false; dsi 4150 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 4155 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(!dsi_bus_is_locked(dsi)); dsi 4157 drivers/gpu/drm/omapdrm/dss/dsi.c mutex_lock(&dsi->lock); dsi 4159 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_runtime_get(dsi); dsi 4163 drivers/gpu/drm/omapdrm/dss/dsi.c _dsi_initialize_irq(dsi); dsi 4165 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_display_init_dsi(dsi); dsi 4169 drivers/gpu/drm/omapdrm/dss/dsi.c mutex_unlock(&dsi->lock); dsi 4174 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_runtime_put(dsi); dsi 4176 drivers/gpu/drm/omapdrm/dss/dsi.c mutex_unlock(&dsi->lock); dsi 4183 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 4187 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(!dsi_bus_is_locked(dsi)); dsi 4189 drivers/gpu/drm/omapdrm/dss/dsi.c mutex_lock(&dsi->lock); dsi 4191 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_sync_vc(dsi, 0); dsi 4192 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_sync_vc(dsi, 1); dsi 4193 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_sync_vc(dsi, 2); dsi 4194 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_sync_vc(dsi, 3); dsi 4196 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_display_uninit_dsi(dsi, disconnect_lanes, enter_ulps); dsi 4198 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_runtime_put(dsi); dsi 4200 drivers/gpu/drm/omapdrm/dss/dsi.c mutex_unlock(&dsi->lock); dsi 4205 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 4207 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->te_enabled = enable; dsi 4326 drivers/gpu/drm/omapdrm/dss/dsi.c return dispc_div_calc(ctx->dsi->dss->dispc, dispc, dsi 4335 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = ctx->dsi; dsi 4343 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->data->max_fck_freq, dsi 4347 drivers/gpu/drm/omapdrm/dss/dsi.c static bool dsi_cm_calc(struct dsi_data *dsi, dsi 4356 drivers/gpu/drm/omapdrm/dss/dsi.c clkin = clk_get_rate(dsi->pll.clkin); dsi 4358 drivers/gpu/drm/omapdrm/dss/dsi.c ndl = dsi->num_lanes_used - 1; dsi 4371 drivers/gpu/drm/omapdrm/dss/dsi.c ctx->dsi = dsi; dsi 4372 drivers/gpu/drm/omapdrm/dss/dsi.c ctx->pll = &dsi->pll; dsi 4388 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = ctx->dsi; dsi 4391 drivers/gpu/drm/omapdrm/dss/dsi.c int ndl = dsi->num_lanes_used - 1; dsi 4428 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->line_buffer_size < xres * bitspp / 8) { dsi 4627 drivers/gpu/drm/omapdrm/dss/dsi.c return dispc_div_calc(ctx->dsi->dss->dispc, dispc, dsi 4636 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = ctx->dsi; dsi 4644 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->data->max_fck_freq, dsi 4648 drivers/gpu/drm/omapdrm/dss/dsi.c static bool dsi_vm_calc(struct dsi_data *dsi, dsi 4656 drivers/gpu/drm/omapdrm/dss/dsi.c int ndl = dsi->num_lanes_used - 1; dsi 4660 drivers/gpu/drm/omapdrm/dss/dsi.c clkin = clk_get_rate(dsi->pll.clkin); dsi 4663 drivers/gpu/drm/omapdrm/dss/dsi.c ctx->dsi = dsi; dsi 4664 drivers/gpu/drm/omapdrm/dss/dsi.c ctx->pll = &dsi->pll; dsi 4693 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 4698 drivers/gpu/drm/omapdrm/dss/dsi.c mutex_lock(&dsi->lock); dsi 4700 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->pix_fmt = config->pixel_format; dsi 4701 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->mode = config->mode; dsi 4704 drivers/gpu/drm/omapdrm/dss/dsi.c ok = dsi_vm_calc(dsi, config, &ctx); dsi 4706 drivers/gpu/drm/omapdrm/dss/dsi.c ok = dsi_cm_calc(dsi, config, &ctx); dsi 4714 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_pll_calc_dsi_fck(dsi, &ctx.dsi_cinfo); dsi 4717 drivers/gpu/drm/omapdrm/dss/dsi.c config->lp_clk_min, config->lp_clk_max, &dsi->user_lp_cinfo); dsi 4723 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->user_dsi_cinfo = ctx.dsi_cinfo; dsi 4724 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->user_dispc_cinfo = ctx.dispc_cinfo; dsi 4726 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm = ctx.vm; dsi 4732 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags &= ~DISPLAY_FLAGS_INTERLACED; dsi 4733 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags &= ~DISPLAY_FLAGS_HSYNC_LOW; dsi 4734 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags |= DISPLAY_FLAGS_HSYNC_HIGH; dsi 4735 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags &= ~DISPLAY_FLAGS_VSYNC_LOW; dsi 4736 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags |= DISPLAY_FLAGS_VSYNC_HIGH; dsi 4742 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags &= ~DISPLAY_FLAGS_PIXDATA_NEGEDGE; dsi 4743 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags |= DISPLAY_FLAGS_PIXDATA_POSEDGE; dsi 4744 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags &= ~DISPLAY_FLAGS_DE_LOW; dsi 4745 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags |= DISPLAY_FLAGS_DE_HIGH; dsi 4746 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags &= ~DISPLAY_FLAGS_SYNC_POSEDGE; dsi 4747 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm.flags |= DISPLAY_FLAGS_SYNC_NEGEDGE; dsi 4749 drivers/gpu/drm/omapdrm/dss/dsi.c dss_mgr_set_timings(&dsi->output, &dsi->vm); dsi 4751 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vm_timings = ctx.dsi_vm; dsi 4753 drivers/gpu/drm/omapdrm/dss/dsi.c mutex_unlock(&dsi->lock); dsi 4757 drivers/gpu/drm/omapdrm/dss/dsi.c mutex_unlock(&dsi->lock); dsi 4768 drivers/gpu/drm/omapdrm/dss/dsi.c static enum omap_channel dsi_get_channel(struct dsi_data *dsi) dsi 4770 drivers/gpu/drm/omapdrm/dss/dsi.c switch (dsi->data->model) { dsi 4775 drivers/gpu/drm/omapdrm/dss/dsi.c switch (dsi->module_id) { dsi 4786 drivers/gpu/drm/omapdrm/dss/dsi.c switch (dsi->module_id) { dsi 4804 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 4807 drivers/gpu/drm/omapdrm/dss/dsi.c for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { dsi 4808 drivers/gpu/drm/omapdrm/dss/dsi.c if (!dsi->vc[i].dssdev) { dsi 4809 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[i].dssdev = dssdev; dsi 4821 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 4833 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->vc[channel].dssdev != dssdev) { dsi 4839 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[channel].vc_id = vc_id; dsi 4846 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = to_dsi_data(dssdev); dsi 4849 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[channel].dssdev == dssdev) { dsi 4850 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[channel].dssdev = NULL; dsi 4851 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[channel].vc_id = 0; dsi 4856 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_get_clocks(struct dsi_data *dsi) dsi 4860 drivers/gpu/drm/omapdrm/dss/dsi.c clk = devm_clk_get(dsi->dev, "fck"); dsi 4866 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->dss_clk = clk; dsi 4888 drivers/gpu/drm/omapdrm/dss/dsi.c .dsi = { dsi 5015 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_init_pll_data(struct dss_device *dss, struct dsi_data *dsi) dsi 5017 drivers/gpu/drm/omapdrm/dss/dsi.c struct dss_pll *pll = &dsi->pll; dsi 5021 drivers/gpu/drm/omapdrm/dss/dsi.c clk = devm_clk_get(dsi->dev, "sys_clk"); dsi 5027 drivers/gpu/drm/omapdrm/dss/dsi.c pll->name = dsi->module_id == 0 ? "dsi0" : "dsi1"; dsi 5028 drivers/gpu/drm/omapdrm/dss/dsi.c pll->id = dsi->module_id == 0 ? DSS_PLL_DSI1 : DSS_PLL_DSI2; dsi 5030 drivers/gpu/drm/omapdrm/dss/dsi.c pll->base = dsi->pll_base; dsi 5031 drivers/gpu/drm/omapdrm/dss/dsi.c pll->hw = dsi->data->pll_hw; dsi 5048 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = dev_get_drvdata(dev); dsi 5053 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->dss = dss; dsi 5055 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_init_pll_data(dss, dsi); dsi 5057 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_runtime_get(dsi); dsi 5061 drivers/gpu/drm/omapdrm/dss/dsi.c rev = dsi_read_reg(dsi, DSI_REVISION); dsi 5065 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->line_buffer_size = dsi_get_line_buf_size(dsi); dsi 5067 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_runtime_put(dsi); dsi 5069 drivers/gpu/drm/omapdrm/dss/dsi.c snprintf(name, sizeof(name), "dsi%u_regs", dsi->module_id + 1); dsi 5070 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->debugfs.regs = dss_debugfs_create_file(dss, name, dsi 5071 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_dump_dsi_regs, dsi); dsi 5073 drivers/gpu/drm/omapdrm/dss/dsi.c snprintf(name, sizeof(name), "dsi%u_irqs", dsi->module_id + 1); dsi 5074 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->debugfs.irqs = dss_debugfs_create_file(dss, name, dsi 5075 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_dump_dsi_irqs, dsi); dsi 5077 drivers/gpu/drm/omapdrm/dss/dsi.c snprintf(name, sizeof(name), "dsi%u_clks", dsi->module_id + 1); dsi 5078 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->debugfs.clks = dss_debugfs_create_file(dss, name, dsi 5079 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_dump_dsi_clocks, dsi); dsi 5086 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = dev_get_drvdata(dev); dsi 5088 drivers/gpu/drm/omapdrm/dss/dsi.c dss_debugfs_remove_file(dsi->debugfs.clks); dsi 5089 drivers/gpu/drm/omapdrm/dss/dsi.c dss_debugfs_remove_file(dsi->debugfs.irqs); dsi 5090 drivers/gpu/drm/omapdrm/dss/dsi.c dss_debugfs_remove_file(dsi->debugfs.regs); dsi 5092 drivers/gpu/drm/omapdrm/dss/dsi.c WARN_ON(dsi->scp_clk_refcount > 0); dsi 5094 drivers/gpu/drm/omapdrm/dss/dsi.c dss_pll_unregister(&dsi->pll); dsi 5106 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_init_output(struct dsi_data *dsi) dsi 5108 drivers/gpu/drm/omapdrm/dss/dsi.c struct omap_dss_device *out = &dsi->output; dsi 5111 drivers/gpu/drm/omapdrm/dss/dsi.c out->dev = dsi->dev; dsi 5112 drivers/gpu/drm/omapdrm/dss/dsi.c out->id = dsi->module_id == 0 ? dsi 5116 drivers/gpu/drm/omapdrm/dss/dsi.c out->name = dsi->module_id == 0 ? "dsi.0" : "dsi.1"; dsi 5117 drivers/gpu/drm/omapdrm/dss/dsi.c out->dispc_channel = dsi_get_channel(dsi); dsi 5134 drivers/gpu/drm/omapdrm/dss/dsi.c static void dsi_uninit_output(struct dsi_data *dsi) dsi 5136 drivers/gpu/drm/omapdrm/dss/dsi.c struct omap_dss_device *out = &dsi->output; dsi 5142 drivers/gpu/drm/omapdrm/dss/dsi.c static int dsi_probe_of(struct dsi_data *dsi) dsi 5144 drivers/gpu/drm/omapdrm/dss/dsi.c struct device_node *node = dsi->dev->of_node; dsi 5158 drivers/gpu/drm/omapdrm/dss/dsi.c dev_err(dsi->dev, "failed to find lane data\n"); dsi 5166 drivers/gpu/drm/omapdrm/dss/dsi.c num_pins > dsi->num_lanes_supported * 2) { dsi 5167 drivers/gpu/drm/omapdrm/dss/dsi.c dev_err(dsi->dev, "bad number of lanes\n"); dsi 5174 drivers/gpu/drm/omapdrm/dss/dsi.c dev_err(dsi->dev, "failed to read lane data\n"); dsi 5182 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_configure_pins(&dsi->output, &pin_cfg); dsi 5184 drivers/gpu/drm/omapdrm/dss/dsi.c dev_err(dsi->dev, "failed to configure pins"); dsi 5267 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi; dsi 5273 drivers/gpu/drm/omapdrm/dss/dsi.c dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); dsi 5274 drivers/gpu/drm/omapdrm/dss/dsi.c if (!dsi) dsi 5277 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->dev = dev; dsi 5278 drivers/gpu/drm/omapdrm/dss/dsi.c dev_set_drvdata(dev, dsi); dsi 5280 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_init(&dsi->irq_lock); dsi 5281 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_init(&dsi->errors_lock); dsi 5282 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->errors = 0; dsi 5285 drivers/gpu/drm/omapdrm/dss/dsi.c spin_lock_init(&dsi->irq_stats_lock); dsi 5286 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->irq_stats.last_reset = jiffies; dsi 5289 drivers/gpu/drm/omapdrm/dss/dsi.c mutex_init(&dsi->lock); dsi 5290 drivers/gpu/drm/omapdrm/dss/dsi.c sema_init(&dsi->bus_lock, 1); dsi 5292 drivers/gpu/drm/omapdrm/dss/dsi.c INIT_DEFERRABLE_WORK(&dsi->framedone_timeout_work, dsi 5296 drivers/gpu/drm/omapdrm/dss/dsi.c timer_setup(&dsi->te_timer, dsi_te_timeout, 0); dsi 5300 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->proto_base = devm_ioremap_resource(dev, dsi_mem); dsi 5301 drivers/gpu/drm/omapdrm/dss/dsi.c if (IS_ERR(dsi->proto_base)) dsi 5302 drivers/gpu/drm/omapdrm/dss/dsi.c return PTR_ERR(dsi->proto_base); dsi 5305 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->phy_base = devm_ioremap_resource(dev, res); dsi 5306 drivers/gpu/drm/omapdrm/dss/dsi.c if (IS_ERR(dsi->phy_base)) dsi 5307 drivers/gpu/drm/omapdrm/dss/dsi.c return PTR_ERR(dsi->phy_base); dsi 5310 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->pll_base = devm_ioremap_resource(dev, res); dsi 5311 drivers/gpu/drm/omapdrm/dss/dsi.c if (IS_ERR(dsi->pll_base)) dsi 5312 drivers/gpu/drm/omapdrm/dss/dsi.c return PTR_ERR(dsi->pll_base); dsi 5314 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->irq = platform_get_irq(pdev, 0); dsi 5315 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->irq < 0) { dsi 5320 drivers/gpu/drm/omapdrm/dss/dsi.c r = devm_request_irq(dev, dsi->irq, omap_dsi_irq_handler, dsi 5321 drivers/gpu/drm/omapdrm/dss/dsi.c IRQF_SHARED, dev_name(dev), dsi); dsi 5327 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vdds_dsi_reg = devm_regulator_get(dev, "vdd"); dsi 5328 drivers/gpu/drm/omapdrm/dss/dsi.c if (IS_ERR(dsi->vdds_dsi_reg)) { dsi 5329 drivers/gpu/drm/omapdrm/dss/dsi.c if (PTR_ERR(dsi->vdds_dsi_reg) != -EPROBE_DEFER) dsi 5331 drivers/gpu/drm/omapdrm/dss/dsi.c return PTR_ERR(dsi->vdds_dsi_reg); dsi 5336 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->data = soc->data; dsi 5338 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->data = of_match_node(dsi_of_match, dev->of_node)->data; dsi 5340 drivers/gpu/drm/omapdrm/dss/dsi.c d = dsi->data->modules; dsi 5349 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->module_id = d->id; dsi 5351 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->data->model == DSI_MODEL_OMAP4 || dsi 5352 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->data->model == DSI_MODEL_OMAP5) { dsi 5360 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->data->model == DSI_MODEL_OMAP4 ? dsi 5365 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->syscon = syscon_node_to_regmap(np); dsi 5370 drivers/gpu/drm/omapdrm/dss/dsi.c for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { dsi 5371 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[i].source = DSI_VC_SOURCE_L4; dsi 5372 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[i].dssdev = NULL; dsi 5373 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vc[i].vc_id = 0; dsi 5376 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_get_clocks(dsi); dsi 5384 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->data->quirks & DSI_QUIRK_GNQ) { dsi 5385 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_runtime_get(dsi); dsi 5387 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->num_lanes_supported = 1 + REG_GET(dsi, DSI_GNQ, 11, 9); dsi 5388 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_runtime_put(dsi); dsi 5390 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->num_lanes_supported = 3; dsi 5399 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_init_output(dsi); dsi 5403 drivers/gpu/drm/omapdrm/dss/dsi.c r = dsi_probe_of(dsi); dsi 5416 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_uninit_output(dsi); dsi 5426 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = platform_get_drvdata(pdev); dsi 5430 drivers/gpu/drm/omapdrm/dss/dsi.c dsi_uninit_output(dsi); dsi 5436 drivers/gpu/drm/omapdrm/dss/dsi.c if (dsi->vdds_dsi_reg != NULL && dsi->vdds_dsi_enabled) { dsi 5437 drivers/gpu/drm/omapdrm/dss/dsi.c regulator_disable(dsi->vdds_dsi_reg); dsi 5438 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->vdds_dsi_enabled = false; dsi 5446 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = dev_get_drvdata(dev); dsi 5448 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->is_enabled = false; dsi 5452 drivers/gpu/drm/omapdrm/dss/dsi.c synchronize_irq(dsi->irq); dsi 5459 drivers/gpu/drm/omapdrm/dss/dsi.c struct dsi_data *dsi = dev_get_drvdata(dev); dsi 5461 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->is_enabled = true; dsi 377 drivers/gpu/drm/omapdrm/dss/omapdss.h const struct omapdss_dsi_ops dsi; dsi 23 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c struct mipi_dsi_device *dsi; dsi 53 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c struct mipi_dsi_device *dsi = ctx->dsi; dsi 88 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c ret = mipi_dsi_dcs_write_buffer(dsi, cmd->data, dsi 104 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c mipi_dsi_dcs_set_display_on(ctx->dsi); dsi 115 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c return mipi_dsi_dcs_set_display_off(ctx->dsi); dsi 123 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c ret = mipi_dsi_dcs_set_display_off(ctx->dsi); dsi 128 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c ret = mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); dsi 173 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", dsi 195 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c static int feiyang_dsi_probe(struct mipi_dsi_device *dsi) dsi 200 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL); dsi 204 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c mipi_dsi_set_drvdata(dsi, ctx); dsi 205 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c ctx->dsi = dsi; dsi 208 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c ctx->panel.dev = &dsi->dev; dsi 211 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c ctx->dvdd = devm_regulator_get(&dsi->dev, "dvdd"); dsi 213 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c DRM_DEV_ERROR(&dsi->dev, "Couldn't get dvdd regulator\n"); dsi 217 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c ctx->avdd = devm_regulator_get(&dsi->dev, "avdd"); dsi 219 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c DRM_DEV_ERROR(&dsi->dev, "Couldn't get avdd regulator\n"); dsi 223 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c ctx->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_LOW); dsi 225 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c DRM_DEV_ERROR(&dsi->dev, "Couldn't get our reset GPIO\n"); dsi 229 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c ctx->backlight = devm_of_find_backlight(&dsi->dev); dsi 237 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO_BURST; dsi 238 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 239 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c dsi->lanes = 4; dsi 241 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c return mipi_dsi_attach(dsi); dsi 244 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c static int feiyang_dsi_remove(struct mipi_dsi_device *dsi) dsi 246 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c struct feiyang *ctx = mipi_dsi_get_drvdata(dsi); dsi 248 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c mipi_dsi_detach(dsi); dsi 26 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c struct mipi_dsi_device *dsi; dsi 278 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c ret = mipi_dsi_dcs_write_buffer(ctx->dsi, buf, sizeof(buf)); dsi 290 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c ret = mipi_dsi_dcs_write_buffer(ctx->dsi, buf, sizeof(buf)); dsi 333 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c ret = mipi_dsi_dcs_set_tear_on(ctx->dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); dsi 337 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c ret = mipi_dsi_dcs_exit_sleep_mode(ctx->dsi); dsi 350 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c mipi_dsi_dcs_set_display_on(ctx->dsi); dsi 361 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c return mipi_dsi_dcs_set_display_off(ctx->dsi); dsi 368 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); dsi 398 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c dev_err(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", dsi 424 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c static int ili9881c_dsi_probe(struct mipi_dsi_device *dsi) dsi 430 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL); dsi 433 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c mipi_dsi_set_drvdata(dsi, ctx); dsi 434 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c ctx->dsi = dsi; dsi 437 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c ctx->panel.dev = &dsi->dev; dsi 440 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c ctx->power = devm_regulator_get(&dsi->dev, "power"); dsi 442 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c dev_err(&dsi->dev, "Couldn't get our power regulator\n"); dsi 446 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c ctx->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_LOW); dsi 448 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c dev_err(&dsi->dev, "Couldn't get our reset GPIO\n"); dsi 452 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c np = of_parse_phandle(dsi->dev.of_node, "backlight", 0); dsi 465 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE; dsi 466 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 467 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c dsi->lanes = 4; dsi 469 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c return mipi_dsi_attach(dsi); dsi 472 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c static int ili9881c_dsi_remove(struct mipi_dsi_device *dsi) dsi 474 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c struct ili9881c *ctx = mipi_dsi_get_drvdata(dsi); dsi 476 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c mipi_dsi_detach(dsi); dsi 451 drivers/gpu/drm/panel/panel-innolux-p079zca.c static int innolux_panel_add(struct mipi_dsi_device *dsi, dsi 455 drivers/gpu/drm/panel/panel-innolux-p079zca.c struct device *dev = &dsi->dev; dsi 498 drivers/gpu/drm/panel/panel-innolux-p079zca.c mipi_dsi_set_drvdata(dsi, innolux); dsi 499 drivers/gpu/drm/panel/panel-innolux-p079zca.c innolux->link = dsi; dsi 509 drivers/gpu/drm/panel/panel-innolux-p079zca.c static int innolux_panel_probe(struct mipi_dsi_device *dsi) dsi 514 drivers/gpu/drm/panel/panel-innolux-p079zca.c desc = of_device_get_match_data(&dsi->dev); dsi 515 drivers/gpu/drm/panel/panel-innolux-p079zca.c dsi->mode_flags = desc->flags; dsi 516 drivers/gpu/drm/panel/panel-innolux-p079zca.c dsi->format = desc->format; dsi 517 drivers/gpu/drm/panel/panel-innolux-p079zca.c dsi->lanes = desc->lanes; dsi 519 drivers/gpu/drm/panel/panel-innolux-p079zca.c err = innolux_panel_add(dsi, desc); dsi 523 drivers/gpu/drm/panel/panel-innolux-p079zca.c return mipi_dsi_attach(dsi); dsi 526 drivers/gpu/drm/panel/panel-innolux-p079zca.c static int innolux_panel_remove(struct mipi_dsi_device *dsi) dsi 528 drivers/gpu/drm/panel/panel-innolux-p079zca.c struct innolux_panel *innolux = mipi_dsi_get_drvdata(dsi); dsi 533 drivers/gpu/drm/panel/panel-innolux-p079zca.c DRM_DEV_ERROR(&dsi->dev, "failed to unprepare panel: %d\n", dsi 538 drivers/gpu/drm/panel/panel-innolux-p079zca.c DRM_DEV_ERROR(&dsi->dev, "failed to disable panel: %d\n", err); dsi 540 drivers/gpu/drm/panel/panel-innolux-p079zca.c err = mipi_dsi_detach(dsi); dsi 542 drivers/gpu/drm/panel/panel-innolux-p079zca.c DRM_DEV_ERROR(&dsi->dev, "failed to detach from DSI host: %d\n", dsi 550 drivers/gpu/drm/panel/panel-innolux-p079zca.c static void innolux_panel_shutdown(struct mipi_dsi_device *dsi) dsi 552 drivers/gpu/drm/panel/panel-innolux-p079zca.c struct innolux_panel *innolux = mipi_dsi_get_drvdata(dsi); dsi 35 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct mipi_dsi_device *dsi; dsi 57 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct mipi_dsi_device *dsi = jdi->dsi; dsi 58 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct device *dev = &jdi->dsi->dev; dsi 61 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->mode_flags |= MIPI_DSI_MODE_LPM; dsi 63 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_soft_reset(dsi); dsi 69 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_set_pixel_format(dsi, MIPI_DCS_PIXEL_FMT_24BIT << 4); dsi 75 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_set_column_address(dsi, 0, jdi->mode->hdisplay - 1); dsi 81 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_set_page_address(dsi, 0, jdi->mode->vdisplay - 1); dsi 93 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, dsi 101 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_POWER_SAVE, dsi 108 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_exit_sleep_mode(dsi); dsi 116 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_generic_write(dsi, (u8[]){0xB0, 0x00}, 2); dsi 125 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_generic_write(dsi, (u8[]) dsi 135 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_generic_write(dsi, (u8[]){0xB0, 0x03}, 2); dsi 147 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct mipi_dsi_device *dsi = jdi->dsi; dsi 148 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct device *dev = &jdi->dsi->dev; dsi 151 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->mode_flags |= MIPI_DSI_MODE_LPM; dsi 153 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_set_display_on(dsi); dsi 162 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct mipi_dsi_device *dsi = jdi->dsi; dsi 163 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct device *dev = &jdi->dsi->dev; dsi 166 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; dsi 168 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_set_display_off(dsi); dsi 172 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_enter_sleep_mode(dsi); dsi 196 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct device *dev = &jdi->dsi->dev; dsi 222 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct device *dev = &jdi->dsi->dev; dsi 307 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct device *dev = &jdi->dsi->dev; dsi 329 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct mipi_dsi_device *dsi = bl_get_data(bl); dsi 333 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; dsi 335 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_get_display_brightness(dsi, &brightness); dsi 339 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->mode_flags |= MIPI_DSI_MODE_LPM; dsi 346 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct mipi_dsi_device *dsi = bl_get_data(bl); dsi 349 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; dsi 351 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_set_display_brightness(dsi, bl->props.brightness); dsi 355 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->mode_flags |= MIPI_DSI_MODE_LPM; dsi 366 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c drm_panel_create_dsi_backlight(struct mipi_dsi_device *dsi) dsi 368 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct device *dev = &dsi->dev; dsi 376 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c return devm_backlight_device_register(dev, dev_name(dev), dev, dsi, dsi 396 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct device *dev = &jdi->dsi->dev; dsi 433 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c jdi->backlight = drm_panel_create_dsi_backlight(jdi->dsi); dsi 442 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c jdi->base.dev = &jdi->dsi->dev; dsi 455 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c static int jdi_panel_probe(struct mipi_dsi_device *dsi) dsi 460 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->lanes = 4; dsi 461 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 462 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO | dsi 465 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c jdi = devm_kzalloc(&dsi->dev, sizeof(*jdi), GFP_KERNEL); dsi 469 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c mipi_dsi_set_drvdata(dsi, jdi); dsi 471 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c jdi->dsi = dsi; dsi 477 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c return mipi_dsi_attach(dsi); dsi 480 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c static int jdi_panel_remove(struct mipi_dsi_device *dsi) dsi 482 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct jdi_panel *jdi = mipi_dsi_get_drvdata(dsi); dsi 487 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dev_err(&dsi->dev, "failed to disable panel: %d\n", ret); dsi 489 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_detach(dsi); dsi 491 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", dsi 499 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c static void jdi_panel_shutdown(struct mipi_dsi_device *dsi) dsi 501 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c struct jdi_panel *jdi = mipi_dsi_get_drvdata(dsi); dsi 406 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c static int kingdisplay_panel_probe(struct mipi_dsi_device *dsi) dsi 411 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c dsi->lanes = 4; dsi 412 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 413 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | dsi 416 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c kingdisplay = devm_kzalloc(&dsi->dev, sizeof(*kingdisplay), GFP_KERNEL); dsi 420 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c mipi_dsi_set_drvdata(dsi, kingdisplay); dsi 421 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c kingdisplay->link = dsi; dsi 427 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c return mipi_dsi_attach(dsi); dsi 430 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c static int kingdisplay_panel_remove(struct mipi_dsi_device *dsi) dsi 432 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c struct kingdisplay_panel *kingdisplay = mipi_dsi_get_drvdata(dsi); dsi 437 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c DRM_DEV_ERROR(&dsi->dev, "failed to unprepare panel: %d\n", dsi 442 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c DRM_DEV_ERROR(&dsi->dev, "failed to disable panel: %d\n", err); dsi 444 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c err = mipi_dsi_detach(dsi); dsi 446 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c DRM_DEV_ERROR(&dsi->dev, "failed to detach from DSI host: %d\n", dsi 454 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c static void kingdisplay_panel_shutdown(struct mipi_dsi_device *dsi) dsi 456 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c struct kingdisplay_panel *kingdisplay = mipi_dsi_get_drvdata(dsi); dsi 98 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 100 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c if (mipi_dsi_dcs_write_buffer(dsi, data, len) < 0) dsi 107 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 110 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; dsi 115 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c dsi->mode_flags |= MIPI_DSI_MODE_LPM; dsi 132 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 213 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c ret = mipi_dsi_dcs_nop(dsi); dsi 217 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c ret = mipi_dsi_dcs_exit_sleep_mode(dsi); dsi 227 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c ret = mipi_dsi_dcs_set_column_address(dsi, 0, dsi 232 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c ret = mipi_dsi_dcs_set_page_address(dsi, 0, default_mode.vdisplay - 1); dsi 237 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c ret = mipi_dsi_dcs_set_pixel_format(dsi, MIPI_DCS_PIXEL_FMT_24BIT | dsi 245 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c ret = mipi_dsi_dcs_set_display_on(dsi); dsi 249 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c ret = mipi_dsi_dcs_nop(dsi); dsi 265 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 273 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c ret = mipi_dsi_dcs_set_display_off(dsi); dsi 277 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c ret = mipi_dsi_dcs_enter_sleep_mode(dsi); dsi 425 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c static int otm8009a_probe(struct mipi_dsi_device *dsi) dsi 427 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c struct device *dev = &dsi->dev; dsi 449 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c mipi_dsi_set_drvdata(dsi, ctx); dsi 453 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c dsi->lanes = 2; dsi 454 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 455 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | dsi 463 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c dsi->host->dev, ctx, dsi 479 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c ret = mipi_dsi_attach(dsi); dsi 490 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c static int otm8009a_remove(struct mipi_dsi_device *dsi) dsi 492 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c struct otm8009a *ctx = mipi_dsi_get_drvdata(dsi); dsi 494 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c mipi_dsi_detach(dsi); dsi 21 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c struct mipi_dsi_device *dsi; dsi 47 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c ret = mipi_dsi_shutdown_peripheral(osd101t2587->dsi); dsi 90 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c ret = mipi_dsi_turn_on_peripheral(osd101t2587->dsi); dsi 159 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c struct device *dev = &osd101t2587->dsi->dev; dsi 171 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c osd101t2587->base.dev = &osd101t2587->dsi->dev; dsi 176 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c static int osd101t2587_panel_probe(struct mipi_dsi_device *dsi) dsi 182 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c id = of_match_node(osd101t2587_of_match, dsi->dev.of_node); dsi 186 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c dsi->lanes = 4; dsi 187 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 188 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | dsi 193 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c osd101t2587 = devm_kzalloc(&dsi->dev, sizeof(*osd101t2587), GFP_KERNEL); dsi 197 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c mipi_dsi_set_drvdata(dsi, osd101t2587); dsi 199 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c osd101t2587->dsi = dsi; dsi 206 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c ret = mipi_dsi_attach(dsi); dsi 213 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c static int osd101t2587_panel_remove(struct mipi_dsi_device *dsi) dsi 215 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c struct osd101t2587_panel *osd101t2587 = mipi_dsi_get_drvdata(dsi); dsi 220 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c dev_warn(&dsi->dev, "failed to disable panel: %d\n", ret); dsi 226 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c ret = mipi_dsi_detach(dsi); dsi 228 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret); dsi 233 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c static void osd101t2587_panel_shutdown(struct mipi_dsi_device *dsi) dsi 235 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c struct osd101t2587_panel *osd101t2587 = mipi_dsi_get_drvdata(dsi); dsi 32 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c struct mipi_dsi_device *dsi; dsi 52 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c return mipi_dsi_turn_on_peripheral(wuxga_nt->dsi); dsi 63 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c mipi_ret = mipi_dsi_shutdown_peripheral(wuxga_nt->dsi); dsi 207 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c struct device *dev = &wuxga_nt->dsi->dev; dsi 228 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c wuxga_nt->base.dev = &wuxga_nt->dsi->dev; dsi 252 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c static int wuxga_nt_panel_probe(struct mipi_dsi_device *dsi) dsi 257 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c dsi->lanes = 4; dsi 258 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 259 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | dsi 264 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c wuxga_nt = devm_kzalloc(&dsi->dev, sizeof(*wuxga_nt), GFP_KERNEL); dsi 268 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c mipi_dsi_set_drvdata(dsi, wuxga_nt); dsi 270 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c wuxga_nt->dsi = dsi; dsi 276 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c return mipi_dsi_attach(dsi); dsi 279 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c static int wuxga_nt_panel_remove(struct mipi_dsi_device *dsi) dsi 281 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c struct wuxga_nt_panel *wuxga_nt = mipi_dsi_get_drvdata(dsi); dsi 286 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c dev_err(&dsi->dev, "failed to disable panel: %d\n", ret); dsi 288 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c ret = mipi_dsi_detach(dsi); dsi 290 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret); dsi 297 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c static void wuxga_nt_panel_shutdown(struct mipi_dsi_device *dsi) dsi 299 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c struct wuxga_nt_panel *wuxga_nt = mipi_dsi_get_drvdata(dsi); dsi 196 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c struct mipi_dsi_device *dsi; dsi 235 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c dev_err(&ts->dsi->dev, "I2C write failed: %d\n", ret); dsi 249 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c mipi_dsi_generic_write(ts->dsi, msg, sizeof(msg)); dsi 422 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c ts->dsi = mipi_dsi_device_register_full(host, &info); dsi 423 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c if (IS_ERR(ts->dsi)) { dsi 425 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c PTR_ERR(ts->dsi)); dsi 426 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c return PTR_ERR(ts->dsi); dsi 451 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c mipi_dsi_detach(ts->dsi); dsi 455 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c mipi_dsi_device_unregister(ts->dsi); dsi 456 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c kfree(ts->dsi); dsi 461 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c static int rpi_touchscreen_dsi_probe(struct mipi_dsi_device *dsi) dsi 465 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c dsi->mode_flags = (MIPI_DSI_MODE_VIDEO | dsi 468 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 469 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c dsi->lanes = 1; dsi 471 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c ret = mipi_dsi_attach(dsi); dsi 474 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c dev_err(&dsi->dev, "failed to attach dsi to host: %d\n", ret); dsi 199 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct mipi_dsi_device *dsi; dsi 233 drivers/gpu/drm/panel/panel-raydium-rm67191.c static int rad_panel_push_cmd_list(struct mipi_dsi_device *dsi) dsi 243 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_generic_write(dsi, &buffer, sizeof(buffer)); dsi 321 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct mipi_dsi_device *dsi = rad->dsi; dsi 322 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct device *dev = &dsi->dev; dsi 323 drivers/gpu/drm/panel/panel-raydium-rm67191.c int color_format = color_format_from_dsi_format(dsi->format); dsi 329 drivers/gpu/drm/panel/panel-raydium-rm67191.c dsi->mode_flags |= MIPI_DSI_MODE_LPM; dsi 331 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = rad_panel_push_cmd_list(dsi); dsi 338 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_generic_write(dsi, (u8[]){ WRMAUCCTR, 0x00 }, 2); dsi 343 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_dcs_soft_reset(dsi); dsi 352 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_generic_write(dsi, (u8[]){ 0xC2, 0x0B }, 2); dsi 358 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); dsi 364 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_dcs_set_tear_scanline(dsi, 0x380); dsi 370 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_dcs_set_pixel_format(dsi, color_format); dsi 378 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_dcs_exit_sleep_mode(dsi); dsi 386 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_dcs_set_display_on(dsi); dsi 407 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct mipi_dsi_device *dsi = rad->dsi; dsi 408 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct device *dev = &dsi->dev; dsi 414 drivers/gpu/drm/panel/panel-raydium-rm67191.c dsi->mode_flags |= MIPI_DSI_MODE_LPM; dsi 420 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_dcs_set_display_off(dsi); dsi 428 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_dcs_enter_sleep_mode(dsi); dsi 468 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct mipi_dsi_device *dsi = bl_get_data(bl); dsi 469 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct rad_panel *rad = mipi_dsi_get_drvdata(dsi); dsi 476 drivers/gpu/drm/panel/panel-raydium-rm67191.c dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; dsi 478 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_dcs_get_display_brightness(dsi, &brightness); dsi 489 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct mipi_dsi_device *dsi = bl_get_data(bl); dsi 490 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct rad_panel *rad = mipi_dsi_get_drvdata(dsi); dsi 496 drivers/gpu/drm/panel/panel-raydium-rm67191.c dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; dsi 498 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_dcs_set_display_brightness(dsi, bl->props.brightness); dsi 525 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct device *dev = &rad->dsi->dev; dsi 540 drivers/gpu/drm/panel/panel-raydium-rm67191.c static int rad_panel_probe(struct mipi_dsi_device *dsi) dsi 542 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct device *dev = &dsi->dev; dsi 549 drivers/gpu/drm/panel/panel-raydium-rm67191.c panel = devm_kzalloc(&dsi->dev, sizeof(*panel), GFP_KERNEL); dsi 553 drivers/gpu/drm/panel/panel-raydium-rm67191.c mipi_dsi_set_drvdata(dsi, panel); dsi 555 drivers/gpu/drm/panel/panel-raydium-rm67191.c panel->dsi = dsi; dsi 557 drivers/gpu/drm/panel/panel-raydium-rm67191.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 558 drivers/gpu/drm/panel/panel-raydium-rm67191.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO | dsi 566 drivers/gpu/drm/panel/panel-raydium-rm67191.c dsi->mode_flags |= MIPI_DSI_MODE_VIDEO_BURST; dsi 573 drivers/gpu/drm/panel/panel-raydium-rm67191.c dsi->mode_flags |= MIPI_DSI_MODE_VIDEO_SYNC_PULSE; dsi 581 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = of_property_read_u32(np, "dsi-lanes", &dsi->lanes); dsi 597 drivers/gpu/drm/panel/panel-raydium-rm67191.c dev, dsi, &rad_bl_ops, dsi 618 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_attach(dsi); dsi 625 drivers/gpu/drm/panel/panel-raydium-rm67191.c static int rad_panel_remove(struct mipi_dsi_device *dsi) dsi 627 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct rad_panel *rad = mipi_dsi_get_drvdata(dsi); dsi 628 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct device *dev = &dsi->dev; dsi 631 drivers/gpu/drm/panel/panel-raydium-rm67191.c ret = mipi_dsi_detach(dsi); dsi 641 drivers/gpu/drm/panel/panel-raydium-rm67191.c static void rad_panel_shutdown(struct mipi_dsi_device *dsi) dsi 643 drivers/gpu/drm/panel/panel-raydium-rm67191.c struct rad_panel *rad = mipi_dsi_get_drvdata(dsi); dsi 110 drivers/gpu/drm/panel/panel-raydium-rm68200.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 113 drivers/gpu/drm/panel/panel-raydium-rm68200.c err = mipi_dsi_dcs_write_buffer(dsi, data, len); dsi 121 drivers/gpu/drm/panel/panel-raydium-rm68200.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 124 drivers/gpu/drm/panel/panel-raydium-rm68200.c err = mipi_dsi_dcs_write(dsi, cmd, &value, 1); dsi 255 drivers/gpu/drm/panel/panel-raydium-rm68200.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 261 drivers/gpu/drm/panel/panel-raydium-rm68200.c ret = mipi_dsi_dcs_set_display_off(dsi); dsi 265 drivers/gpu/drm/panel/panel-raydium-rm68200.c ret = mipi_dsi_dcs_enter_sleep_mode(dsi); dsi 286 drivers/gpu/drm/panel/panel-raydium-rm68200.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 307 drivers/gpu/drm/panel/panel-raydium-rm68200.c ret = mipi_dsi_dcs_exit_sleep_mode(dsi); dsi 313 drivers/gpu/drm/panel/panel-raydium-rm68200.c ret = mipi_dsi_dcs_set_display_on(dsi); dsi 369 drivers/gpu/drm/panel/panel-raydium-rm68200.c static int rm68200_probe(struct mipi_dsi_device *dsi) dsi 371 drivers/gpu/drm/panel/panel-raydium-rm68200.c struct device *dev = &dsi->dev; dsi 398 drivers/gpu/drm/panel/panel-raydium-rm68200.c mipi_dsi_set_drvdata(dsi, ctx); dsi 402 drivers/gpu/drm/panel/panel-raydium-rm68200.c dsi->lanes = 2; dsi 403 drivers/gpu/drm/panel/panel-raydium-rm68200.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 404 drivers/gpu/drm/panel/panel-raydium-rm68200.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | dsi 413 drivers/gpu/drm/panel/panel-raydium-rm68200.c ret = mipi_dsi_attach(dsi); dsi 423 drivers/gpu/drm/panel/panel-raydium-rm68200.c static int rm68200_remove(struct mipi_dsi_device *dsi) dsi 425 drivers/gpu/drm/panel/panel-raydium-rm68200.c struct rm68200 *ctx = mipi_dsi_get_drvdata(dsi); dsi 427 drivers/gpu/drm/panel/panel-raydium-rm68200.c mipi_dsi_detach(dsi); dsi 63 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c #define dsi_generic_write_seq(dsi, seq...) do { \ dsi 66 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \ dsi 73 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 82 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC, dsi 84 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF, dsi 87 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR, dsi 90 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E); dsi 91 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B); dsi 92 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); dsi 93 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30); dsi 94 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETEQ, dsi 97 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETBGP, 0x08, 0x08); dsi 100 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F); dsi 101 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN0, 0x02, 0x11, 0x00); dsi 102 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1, dsi 111 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP2, dsi 120 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_SETGAMMA, dsi 128 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c ret = mipi_dsi_dcs_exit_sleep_mode(dsi); dsi 135 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c ret = mipi_dsi_dcs_set_display_on(dsi); dsi 161 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 164 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c return mipi_dsi_dcs_set_display_off(dsi); dsi 267 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 270 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi_generic_write_seq(dsi, ST7703_CMD_ALL_PIXEL_ON); dsi 298 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c static int jh057n_probe(struct mipi_dsi_device *dsi) dsi 300 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c struct device *dev = &dsi->dev; dsi 314 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c mipi_dsi_set_drvdata(dsi, ctx); dsi 318 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi->lanes = 4; dsi 319 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 320 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | dsi 352 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c ret = mipi_dsi_attach(dsi); dsi 364 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes); dsi 370 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c static void jh057n_shutdown(struct mipi_dsi_device *dsi) dsi 372 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c struct jh057n *ctx = mipi_dsi_get_drvdata(dsi); dsi 377 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c DRM_DEV_ERROR(&dsi->dev, "Failed to unprepare panel: %d\n", dsi 382 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c DRM_DEV_ERROR(&dsi->dev, "Failed to disable panel: %d\n", dsi 386 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c static int jh057n_remove(struct mipi_dsi_device *dsi) dsi 388 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c struct jh057n *ctx = mipi_dsi_get_drvdata(dsi); dsi 391 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c jh057n_shutdown(dsi); dsi 393 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c ret = mipi_dsi_detach(dsi); dsi 395 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c DRM_DEV_ERROR(&dsi->dev, "Failed to detach from DSI host: %d\n", dsi 31 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c struct mipi_dsi_device *dsi; dsi 55 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c DRM_DEV_ERROR(&ctx->dsi->dev, "Failed to enable supply: %d\n", ret); dsi 83 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c ret = mipi_dsi_dcs_exit_sleep_mode(ctx->dsi); dsi 94 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); dsi 103 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c return mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); dsi 132 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c DRM_DEV_ERROR(&ctx->dsi->dev, dsi 160 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c static int rb070d30_panel_dsi_probe(struct mipi_dsi_device *dsi) dsi 165 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL); dsi 169 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c ctx->supply = devm_regulator_get(&dsi->dev, "vcc-lcd"); dsi 173 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c mipi_dsi_set_drvdata(dsi, ctx); dsi 174 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c ctx->dsi = dsi; dsi 177 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c ctx->panel.dev = &dsi->dev; dsi 180 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c ctx->gpios.reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_LOW); dsi 182 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c DRM_DEV_ERROR(&dsi->dev, "Couldn't get our reset GPIO\n"); dsi 186 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c ctx->gpios.power = devm_gpiod_get(&dsi->dev, "power", GPIOD_OUT_LOW); dsi 188 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c DRM_DEV_ERROR(&dsi->dev, "Couldn't get our power GPIO\n"); dsi 196 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c ctx->gpios.updn = devm_gpiod_get(&dsi->dev, "updn", GPIOD_OUT_LOW); dsi 198 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c DRM_DEV_ERROR(&dsi->dev, "Couldn't get our updn GPIO\n"); dsi 206 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c ctx->gpios.shlr = devm_gpiod_get(&dsi->dev, "shlr", GPIOD_OUT_LOW); dsi 208 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c DRM_DEV_ERROR(&dsi->dev, "Couldn't get our shlr GPIO\n"); dsi 212 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c ctx->backlight = devm_of_find_backlight(&dsi->dev); dsi 214 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c DRM_DEV_ERROR(&dsi->dev, "Couldn't get our backlight\n"); dsi 222 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM; dsi 223 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 224 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c dsi->lanes = 4; dsi 226 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c return mipi_dsi_attach(dsi); dsi 229 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c static int rb070d30_panel_dsi_remove(struct mipi_dsi_device *dsi) dsi 231 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c struct rb070d30_panel *ctx = mipi_dsi_get_drvdata(dsi); dsi 233 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c mipi_dsi_detach(dsi); dsi 58 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(s6->dev); dsi 62 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c ret = mipi_dsi_dcs_enter_sleep_mode(dsi); dsi 79 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(s6->dev); dsi 96 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c ret = mipi_dsi_dcs_set_tear_on(dsi, dsi 104 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c ret = mipi_dsi_dcs_exit_sleep_mode(dsi); dsi 117 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(s6->dev); dsi 120 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c ret = mipi_dsi_dcs_set_display_on(dsi); dsi 133 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(s6->dev); dsi 136 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c ret = mipi_dsi_dcs_set_display_off(dsi); dsi 175 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c static int s6d16d0_probe(struct mipi_dsi_device *dsi) dsi 177 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c struct device *dev = &dsi->dev; dsi 185 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c mipi_dsi_set_drvdata(dsi, s6); dsi 188 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c dsi->lanes = 2; dsi 189 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 190 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c dsi->hs_rate = 420160000; dsi 191 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c dsi->lp_rate = 19200000; dsi 199 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c dsi->mode_flags = dsi 226 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c ret = mipi_dsi_attach(dsi); dsi 233 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c static int s6d16d0_remove(struct mipi_dsi_device *dsi) dsi 235 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c struct s6d16d0 *s6 = mipi_dsi_get_drvdata(dsi); dsi 237 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c mipi_dsi_detach(dsi); dsi 247 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 249 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c return mipi_dsi_dcs_write_buffer(dsi, data, len); dsi 481 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 484 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c s6e3ha2_call_write_func(ret, mipi_dsi_dcs_exit_sleep_mode(dsi)); dsi 505 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 508 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c s6e3ha2_call_write_func(ret, mipi_dsi_dcs_enter_sleep_mode(dsi)); dsi 509 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c s6e3ha2_call_write_func(ret, mipi_dsi_dcs_set_display_off(dsi)); dsi 570 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 575 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK)); dsi 604 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c s6e3ha2_call_write_func(ret, mipi_dsi_dcs_set_display_on(dsi)); dsi 681 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c static int s6e3ha2_probe(struct mipi_dsi_device *dsi) dsi 683 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c struct device *dev = &dsi->dev; dsi 691 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c mipi_dsi_set_drvdata(dsi, ctx); dsi 696 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c dsi->lanes = 4; dsi 697 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 698 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c dsi->mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS; dsi 743 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c ret = mipi_dsi_attach(dsi); dsi 758 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c static int s6e3ha2_remove(struct mipi_dsi_device *dsi) dsi 760 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c struct s6e3ha2 *ctx = mipi_dsi_get_drvdata(dsi); dsi 762 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c mipi_dsi_detach(dsi); dsi 124 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 126 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c return mipi_dsi_dcs_write_buffer(dsi, seq, len); dsi 223 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 226 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c ret = mipi_dsi_dcs_set_display_off(dsi); dsi 232 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c ret = mipi_dsi_dcs_enter_sleep_mode(dsi); dsi 257 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 279 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c ret = mipi_dsi_dcs_set_column_address(dsi, FIRST_COLUMN, dsi 284 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c ret = mipi_dsi_dcs_set_page_address(dsi, 0, default_mode.vdisplay - 1); dsi 313 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c ret = mipi_dsi_dcs_exit_sleep_mode(dsi); dsi 349 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 370 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c ret = mipi_dsi_dcs_set_display_brightness(dsi, 0x00ff); dsi 386 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); dsi 394 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c ret = mipi_dsi_dcs_set_display_on(dsi); dsi 435 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c static int s6e63j0x03_probe(struct mipi_dsi_device *dsi) dsi 437 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c struct device *dev = &dsi->dev; dsi 445 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c mipi_dsi_set_drvdata(dsi, ctx); dsi 449 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c dsi->lanes = 1; dsi 450 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 451 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c dsi->mode_flags = MIPI_DSI_MODE_EOT_PACKET; dsi 488 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c ret = mipi_dsi_attach(dsi); dsi 503 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c static int s6e63j0x03_remove(struct mipi_dsi_device *dsi) dsi 505 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c struct s6e63j0x03 *ctx = mipi_dsi_get_drvdata(dsi); dsi 507 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c mipi_dsi_detach(dsi); dsi 139 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 145 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c ret = mipi_dsi_dcs_write_buffer(dsi, data, len); dsi 155 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 161 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c ret = mipi_dsi_dcs_read(dsi, cmd, data, len); dsi 806 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); dsi 812 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c ret = mipi_dsi_set_maximum_return_packet_size(dsi, size); dsi 977 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c static int s6e8aa0_probe(struct mipi_dsi_device *dsi) dsi 979 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c struct device *dev = &dsi->dev; dsi 987 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c mipi_dsi_set_drvdata(dsi, ctx); dsi 991 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c dsi->lanes = 4; dsi 992 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 993 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST dsi 1028 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c ret = mipi_dsi_attach(dsi); dsi 1035 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c static int s6e8aa0_remove(struct mipi_dsi_device *dsi) dsi 1037 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c struct s6e8aa0 *ctx = mipi_dsi_get_drvdata(dsi); dsi 1039 drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c mipi_dsi_detach(dsi); dsi 53 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c struct mipi_dsi_device *dsi = sharp->link1; dsi 56 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c err = mipi_dsi_generic_write(dsi, payload, sizeof(payload)); dsi 58 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c dev_err(&dsi->dev, "failed to write %02x to %04x: %zd\n", dsi 63 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c err = mipi_dsi_dcs_nop(dsi); dsi 65 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c dev_err(&dsi->dev, "failed to send DCS nop: %zd\n", err); dsi 348 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c static int sharp_panel_probe(struct mipi_dsi_device *dsi) dsi 355 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c dsi->lanes = 4; dsi 356 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 357 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c dsi->mode_flags = MIPI_DSI_MODE_LPM; dsi 360 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c np = of_parse_phandle(dsi->dev.of_node, "link2", 0); dsi 371 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c sharp = devm_kzalloc(&dsi->dev, sizeof(*sharp), GFP_KERNEL); dsi 377 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c mipi_dsi_set_drvdata(dsi, sharp); dsi 380 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c sharp->link1 = dsi; dsi 389 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c err = mipi_dsi_attach(dsi); dsi 400 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c static int sharp_panel_remove(struct mipi_dsi_device *dsi) dsi 402 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c struct sharp_panel *sharp = mipi_dsi_get_drvdata(dsi); dsi 407 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c mipi_dsi_detach(dsi); dsi 413 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c dev_err(&dsi->dev, "failed to disable panel: %d\n", err); dsi 415 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c err = mipi_dsi_detach(dsi); dsi 417 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err); dsi 424 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c static void sharp_panel_shutdown(struct mipi_dsi_device *dsi) dsi 426 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c struct sharp_panel *sharp = mipi_dsi_get_drvdata(dsi); dsi 26 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c struct mipi_dsi_device *dsi; dsi 45 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c struct mipi_dsi_device *dsi = sharp_nt->dsi; dsi 48 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c dsi->mode_flags |= MIPI_DSI_MODE_LPM; dsi 50 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c ret = mipi_dsi_dcs_exit_sleep_mode(dsi); dsi 57 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c ret = mipi_dsi_dcs_write(dsi, 0xae, (u8[]){ 0x03 }, 1); dsi 62 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c ret = mipi_dsi_dcs_set_pixel_format(dsi, MIPI_DCS_PIXEL_FMT_24BIT | dsi 72 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c struct mipi_dsi_device *dsi = sharp_nt->dsi; dsi 75 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c dsi->mode_flags |= MIPI_DSI_MODE_LPM; dsi 77 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c ret = mipi_dsi_dcs_set_display_on(dsi); dsi 86 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c struct mipi_dsi_device *dsi = sharp_nt->dsi; dsi 89 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; dsi 91 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c ret = mipi_dsi_dcs_set_display_off(dsi); dsi 95 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c ret = mipi_dsi_dcs_enter_sleep_mode(dsi); dsi 245 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c struct device *dev = &sharp_nt->dsi->dev; dsi 269 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c sharp_nt->base.dev = &sharp_nt->dsi->dev; dsi 280 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c static int sharp_nt_panel_probe(struct mipi_dsi_device *dsi) dsi 285 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c dsi->lanes = 2; dsi 286 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 287 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c dsi->mode_flags = MIPI_DSI_MODE_VIDEO | dsi 292 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c sharp_nt = devm_kzalloc(&dsi->dev, sizeof(*sharp_nt), GFP_KERNEL); dsi 296 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c mipi_dsi_set_drvdata(dsi, sharp_nt); dsi 298 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c sharp_nt->dsi = dsi; dsi 304 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c return mipi_dsi_attach(dsi); dsi 307 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c static int sharp_nt_panel_remove(struct mipi_dsi_device *dsi) dsi 309 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c struct sharp_nt_panel *sharp_nt = mipi_dsi_get_drvdata(dsi); dsi 314 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c dev_err(&dsi->dev, "failed to disable panel: %d\n", ret); dsi 316 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c ret = mipi_dsi_detach(dsi); dsi 318 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret); dsi 325 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c static void sharp_nt_panel_shutdown(struct mipi_dsi_device *dsi) dsi 327 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c struct sharp_nt_panel *sharp_nt = mipi_dsi_get_drvdata(dsi); dsi 3714 drivers/gpu/drm/panel/panel-simple.c static int panel_simple_dsi_probe(struct mipi_dsi_device *dsi) dsi 3720 drivers/gpu/drm/panel/panel-simple.c id = of_match_node(dsi_of_match, dsi->dev.of_node); dsi 3726 drivers/gpu/drm/panel/panel-simple.c err = panel_simple_probe(&dsi->dev, &desc->desc); dsi 3730 drivers/gpu/drm/panel/panel-simple.c dsi->mode_flags = desc->flags; dsi 3731 drivers/gpu/drm/panel/panel-simple.c dsi->format = desc->format; dsi 3732 drivers/gpu/drm/panel/panel-simple.c dsi->lanes = desc->lanes; dsi 3734 drivers/gpu/drm/panel/panel-simple.c err = mipi_dsi_attach(dsi); dsi 3736 drivers/gpu/drm/panel/panel-simple.c struct panel_simple *panel = dev_get_drvdata(&dsi->dev); dsi 3744 drivers/gpu/drm/panel/panel-simple.c static int panel_simple_dsi_remove(struct mipi_dsi_device *dsi) dsi 3748 drivers/gpu/drm/panel/panel-simple.c err = mipi_dsi_detach(dsi); dsi 3750 drivers/gpu/drm/panel/panel-simple.c dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err); dsi 3752 drivers/gpu/drm/panel/panel-simple.c return panel_simple_remove(&dsi->dev); dsi 3755 drivers/gpu/drm/panel/panel-simple.c static void panel_simple_dsi_shutdown(struct mipi_dsi_device *dsi) dsi 3757 drivers/gpu/drm/panel/panel-simple.c panel_simple_shutdown(&dsi->dev); dsi 103 drivers/gpu/drm/panel/panel-sitronix-st7701.c struct mipi_dsi_device *dsi; dsi 120 drivers/gpu/drm/panel/panel-sitronix-st7701.c return mipi_dsi_dcs_write_buffer(st7701->dsi, seq, len); dsi 275 drivers/gpu/drm/panel/panel-sitronix-st7701.c DRM_DEV_ERROR(&st7701->dsi->dev, dsi 333 drivers/gpu/drm/panel/panel-sitronix-st7701.c static int st7701_dsi_probe(struct mipi_dsi_device *dsi) dsi 339 drivers/gpu/drm/panel/panel-sitronix-st7701.c st7701 = devm_kzalloc(&dsi->dev, sizeof(*st7701), GFP_KERNEL); dsi 343 drivers/gpu/drm/panel/panel-sitronix-st7701.c desc = of_device_get_match_data(&dsi->dev); dsi 344 drivers/gpu/drm/panel/panel-sitronix-st7701.c dsi->mode_flags = desc->flags; dsi 345 drivers/gpu/drm/panel/panel-sitronix-st7701.c dsi->format = desc->format; dsi 346 drivers/gpu/drm/panel/panel-sitronix-st7701.c dsi->lanes = desc->lanes; dsi 348 drivers/gpu/drm/panel/panel-sitronix-st7701.c st7701->supplies = devm_kcalloc(&dsi->dev, desc->num_supplies, dsi 357 drivers/gpu/drm/panel/panel-sitronix-st7701.c ret = devm_regulator_bulk_get(&dsi->dev, desc->num_supplies, dsi 362 drivers/gpu/drm/panel/panel-sitronix-st7701.c st7701->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_LOW); dsi 364 drivers/gpu/drm/panel/panel-sitronix-st7701.c DRM_DEV_ERROR(&dsi->dev, "Couldn't get our reset GPIO\n"); dsi 368 drivers/gpu/drm/panel/panel-sitronix-st7701.c st7701->backlight = devm_of_find_backlight(&dsi->dev); dsi 385 drivers/gpu/drm/panel/panel-sitronix-st7701.c st7701->panel.dev = &dsi->dev; dsi 391 drivers/gpu/drm/panel/panel-sitronix-st7701.c mipi_dsi_set_drvdata(dsi, st7701); dsi 392 drivers/gpu/drm/panel/panel-sitronix-st7701.c st7701->dsi = dsi; dsi 395 drivers/gpu/drm/panel/panel-sitronix-st7701.c return mipi_dsi_attach(dsi); dsi 398 drivers/gpu/drm/panel/panel-sitronix-st7701.c static int st7701_dsi_remove(struct mipi_dsi_device *dsi) dsi 400 drivers/gpu/drm/panel/panel-sitronix-st7701.c struct st7701 *st7701 = mipi_dsi_get_drvdata(dsi); dsi 402 drivers/gpu/drm/panel/panel-sitronix-st7701.c mipi_dsi_detach(dsi); dsi 65 drivers/gpu/drm/panel/panel-truly-nt35597.c struct mipi_dsi_device *dsi[2]; dsi 231 drivers/gpu/drm/panel/panel-truly-nt35597.c for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) { dsi 232 drivers/gpu/drm/panel/panel-truly-nt35597.c ret = mipi_dsi_dcs_write(ctx->dsi[i], command, NULL, 0); dsi 250 drivers/gpu/drm/panel/panel-truly-nt35597.c for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) { dsi 251 drivers/gpu/drm/panel/panel-truly-nt35597.c ret = mipi_dsi_dcs_write_buffer(ctx->dsi[i], buf, size); dsi 344 drivers/gpu/drm/panel/panel-truly-nt35597.c ctx->dsi[0]->mode_flags = 0; dsi 345 drivers/gpu/drm/panel/panel-truly-nt35597.c ctx->dsi[1]->mode_flags = 0; dsi 387 drivers/gpu/drm/panel/panel-truly-nt35597.c ctx->dsi[0]->mode_flags |= MIPI_DSI_MODE_LPM; dsi 388 drivers/gpu/drm/panel/panel-truly-nt35597.c ctx->dsi[1]->mode_flags |= MIPI_DSI_MODE_LPM; dsi 553 drivers/gpu/drm/panel/panel-truly-nt35597.c static int truly_nt35597_probe(struct mipi_dsi_device *dsi) dsi 555 drivers/gpu/drm/panel/panel-truly-nt35597.c struct device *dev = &dsi->dev; dsi 589 drivers/gpu/drm/panel/panel-truly-nt35597.c dsi1 = of_graph_get_remote_node(dsi->dev.of_node, 1, -1); dsi 610 drivers/gpu/drm/panel/panel-truly-nt35597.c mipi_dsi_set_drvdata(dsi, ctx); dsi 613 drivers/gpu/drm/panel/panel-truly-nt35597.c ctx->dsi[0] = dsi; dsi 614 drivers/gpu/drm/panel/panel-truly-nt35597.c ctx->dsi[1] = dsi1_device; dsi 622 drivers/gpu/drm/panel/panel-truly-nt35597.c for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) { dsi 623 drivers/gpu/drm/panel/panel-truly-nt35597.c dsi_dev = ctx->dsi[i]; dsi 645 drivers/gpu/drm/panel/panel-truly-nt35597.c static int truly_nt35597_remove(struct mipi_dsi_device *dsi) dsi 647 drivers/gpu/drm/panel/panel-truly-nt35597.c struct truly_nt35597 *ctx = mipi_dsi_get_drvdata(dsi); dsi 649 drivers/gpu/drm/panel/panel-truly-nt35597.c if (ctx->dsi[0]) dsi 650 drivers/gpu/drm/panel/panel-truly-nt35597.c mipi_dsi_detach(ctx->dsi[0]); dsi 651 drivers/gpu/drm/panel/panel-truly-nt35597.c if (ctx->dsi[1]) { dsi 652 drivers/gpu/drm/panel/panel-truly-nt35597.c mipi_dsi_detach(ctx->dsi[1]); dsi 653 drivers/gpu/drm/panel/panel-truly-nt35597.c mipi_dsi_device_unregister(ctx->dsi[1]); dsi 298 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c static inline void dsi_write(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 val) dsi 300 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c writel(val, dsi->base + reg); dsi 303 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c static inline u32 dsi_read(struct dw_mipi_dsi_rockchip *dsi, u32 reg) dsi 305 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c return readl(dsi->base + reg); dsi 308 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c static inline void dsi_set(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 mask) dsi 310 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi_write(dsi, reg, dsi_read(dsi, reg) | mask); dsi 313 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c static inline void dsi_update_bits(struct dw_mipi_dsi_rockchip *dsi, u32 reg, dsi 316 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi_write(dsi, reg, (dsi_read(dsi, reg) & ~mask) | val); dsi 319 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi_rockchip *dsi, dsi 328 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR); dsi 330 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN | PHY_TESTDOUT(0) | dsi 333 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLK | PHY_UNTESTCLR); dsi 335 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_UNTESTEN | PHY_TESTDOUT(0) | dsi 338 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR); dsi 344 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c static inline unsigned int ns2bc(struct dw_mipi_dsi_rockchip *dsi, int ns) dsi 346 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c return DIV_ROUND_UP(ns * dsi->lane_mbps / 8, 1000); dsi 352 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c static inline unsigned int ns2ui(struct dw_mipi_dsi_rockchip *dsi, int ns) dsi 354 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c return DIV_ROUND_UP(ns * dsi->lane_mbps, 1000); dsi 359 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi = priv_data; dsi 374 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c vco = (dsi->lane_mbps < 200) ? 0 : (dsi->lane_mbps + 100) / 200; dsi 376 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c i = max_mbps_to_parameter(dsi->lane_mbps); dsi 378 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c DRM_DEV_ERROR(dsi->dev, dsi 380 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->lane_mbps); dsi 384 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ret = clk_prepare_enable(dsi->phy_cfg_clk); dsi 386 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c DRM_DEV_ERROR(dsi->dev, "Failed to enable phy_cfg_clk\n"); dsi 390 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, PLL_BIAS_CUR_SEL_CAP_VCO_CONTROL, dsi 396 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, PLL_CP_CONTROL_PLL_LOCK_BYPASS, dsi 398 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, PLL_LPF_AND_CP_CONTROL, dsi 402 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_RX_CONTROL_OF_LANE_0, dsi 405 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, PLL_INPUT_DIVIDER_RATIO, dsi 406 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c INPUT_DIVIDER(dsi->input_div)); dsi 407 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, PLL_LOOP_DIVIDER_RATIO, dsi 408 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c LOOP_DIV_LOW_SEL(dsi->feedback_div) | dsi 416 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, PLL_INPUT_AND_LOOP_DIVIDER_RATIOS_CONTROL, dsi 418 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, PLL_LOOP_DIVIDER_RATIO, dsi 419 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c LOOP_DIV_HIGH_SEL(dsi->feedback_div) | dsi 421 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, PLL_INPUT_AND_LOOP_DIVIDER_RATIOS_CONTROL, dsi 424 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, AFE_BIAS_BANDGAP_ANALOG_PROGRAMMABILITY, dsi 426 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, AFE_BIAS_BANDGAP_ANALOG_PROGRAMMABILITY, dsi 429 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, BANDGAP_AND_BIAS_CONTROL, dsi 433 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, TERMINATION_RESISTER_CONTROL, dsi 436 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, TERMINATION_RESISTER_CONTROL, dsi 441 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_REQUEST_STATE_TIME_CONTROL, dsi 442 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c TLP_PROGRAM_EN | ns2bc(dsi, 500)); dsi 443 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_PREPARE_STATE_TIME_CONTROL, dsi 444 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c THS_PRE_PROGRAM_EN | ns2ui(dsi, 40)); dsi 445 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_HS_ZERO_STATE_TIME_CONTROL, dsi 446 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c THS_ZERO_PROGRAM_EN | ns2bc(dsi, 300)); dsi 447 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_TRAIL_STATE_TIME_CONTROL, dsi 448 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c THS_PRE_PROGRAM_EN | ns2ui(dsi, 100)); dsi 449 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_EXIT_STATE_TIME_CONTROL, dsi 450 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c BIT(5) | ns2bc(dsi, 100)); dsi 451 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_CLOCK_LANE_POST_TIME_CONTROL, dsi 452 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c BIT(5) | (ns2bc(dsi, 60) + 7)); dsi 454 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_REQUEST_STATE_TIME_CONTROL, dsi 455 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c TLP_PROGRAM_EN | ns2bc(dsi, 500)); dsi 456 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_PREPARE_STATE_TIME_CONTROL, dsi 457 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c THS_PRE_PROGRAM_EN | (ns2ui(dsi, 50) + 20)); dsi 458 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_HS_ZERO_STATE_TIME_CONTROL, dsi 459 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c THS_ZERO_PROGRAM_EN | (ns2bc(dsi, 140) + 2)); dsi 460 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_TRAIL_STATE_TIME_CONTROL, dsi 461 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c THS_PRE_PROGRAM_EN | (ns2ui(dsi, 60) + 8)); dsi 462 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_phy_write(dsi, HS_TX_DATA_LANE_EXIT_STATE_TIME_CONTROL, dsi 463 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c BIT(5) | ns2bc(dsi, 100)); dsi 465 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c clk_disable_unprepare(dsi->phy_cfg_clk); dsi 475 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi = priv_data; dsi 487 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->format = format; dsi 488 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c bpp = mipi_dsi_pixel_format_to_bpp(dsi->format); dsi 490 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c DRM_DEV_ERROR(dsi->dev, dsi 492 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->format); dsi 503 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c DRM_DEV_ERROR(dsi->dev, dsi 507 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c fin = clk_get_rate(dsi->pllref_clk); dsi 550 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->lane_mbps = DIV_ROUND_UP(best_freq, USEC_PER_SEC); dsi 551 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c *lane_mbps = dsi->lane_mbps; dsi 552 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->input_div = best_prediv; dsi 553 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->feedback_div = best_fbdiv; dsi 555 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c DRM_DEV_ERROR(dsi->dev, "Can not find best_freq for DPHY\n"); dsi 567 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi, dsi 570 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->cdata->lcdsel_grf_reg) dsi 571 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c regmap_write(dsi->grf_regmap, dsi->cdata->lcdsel_grf_reg, dsi 572 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c mux ? dsi->cdata->lcdsel_lit : dsi->cdata->lcdsel_big); dsi 574 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->cdata->lanecfg1_grf_reg) dsi 575 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c regmap_write(dsi->grf_regmap, dsi->cdata->lanecfg1_grf_reg, dsi 576 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->cdata->lanecfg1); dsi 578 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->cdata->lanecfg2_grf_reg) dsi 579 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c regmap_write(dsi->grf_regmap, dsi->cdata->lanecfg2_grf_reg, dsi 580 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->cdata->lanecfg2); dsi 582 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->cdata->enable_grf_reg) dsi 583 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c regmap_write(dsi->grf_regmap, dsi->cdata->enable_grf_reg, dsi 584 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->cdata->enable); dsi 593 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi = to_dsi(encoder); dsi 595 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c switch (dsi->format) { dsi 611 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->slave) dsi 619 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi = to_dsi(encoder); dsi 622 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, dsi 623 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c &dsi->encoder); dsi 627 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c pm_runtime_get_sync(dsi->dev); dsi 628 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->slave) dsi 629 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c pm_runtime_get_sync(dsi->slave->dev); dsi 636 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ret = clk_prepare_enable(dsi->grf_clk); dsi 638 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret); dsi 642 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_rockchip_config(dsi, mux); dsi 643 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->slave) dsi 644 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_rockchip_config(dsi->slave, mux); dsi 646 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c clk_disable_unprepare(dsi->grf_clk); dsi 651 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi = to_dsi(encoder); dsi 653 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->slave) dsi 654 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c pm_runtime_put(dsi->slave->dev); dsi 655 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c pm_runtime_put(dsi->dev); dsi 669 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi, dsi 672 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct drm_encoder *encoder = &dsi->encoder; dsi 676 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->dev->of_node); dsi 691 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c *dw_mipi_dsi_rockchip_find_second(struct dw_mipi_dsi_rockchip *dsi) dsi 696 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c match = of_match_device(dsi->dev->driver->of_match_table, dsi->dev); dsi 698 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c local = of_graph_get_remote_node(dsi->dev->of_node, 1, 0); dsi 707 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (node == dsi->dev->of_node) dsi 754 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi = dev_get_drvdata(dev); dsi 760 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c second = dw_mipi_dsi_rockchip_find_second(dsi); dsi 765 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c master1 = of_property_read_bool(dsi->dev->of_node, dsi 771 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c DRM_DEV_ERROR(dsi->dev, "only one clock-master allowed\n"); dsi 776 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c DRM_DEV_ERROR(dsi->dev, "no clock-master defined\n"); dsi 782 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->is_slave = true; dsi 786 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->slave = dev_get_drvdata(second); dsi 787 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (!dsi->slave) { dsi 792 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->slave->is_slave = true; dsi 793 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_set_slave(dsi->dmd, dsi->slave->dmd); dsi 797 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ret = clk_prepare_enable(dsi->pllref_clk); dsi 803 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev); dsi 809 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder); dsi 822 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi = dev_get_drvdata(dev); dsi 824 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->is_slave) dsi 827 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_unbind(dsi->dmd); dsi 829 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c clk_disable_unprepare(dsi->pllref_clk); dsi 840 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi = priv_data; dsi 844 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ret = component_add(dsi->dev, &dw_mipi_dsi_rockchip_ops); dsi 846 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c DRM_DEV_ERROR(dsi->dev, "Failed to register component: %d\n", dsi 851 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c second = dw_mipi_dsi_rockchip_find_second(dsi); dsi 870 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi = priv_data; dsi 873 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c second = dw_mipi_dsi_rockchip_find_second(dsi); dsi 877 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c component_del(dsi->dev, &dw_mipi_dsi_rockchip_ops); dsi 891 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi; dsi 897 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); dsi 898 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (!dsi) dsi 902 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->base = devm_ioremap_resource(dev, res); dsi 903 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (IS_ERR(dsi->base)) { dsi 905 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c return PTR_ERR(dsi->base); dsi 911 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->cdata = &cdata[i]; dsi 918 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (!dsi->cdata) { dsi 923 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->pllref_clk = devm_clk_get(dev, "ref"); dsi 924 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (IS_ERR(dsi->pllref_clk)) { dsi 925 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ret = PTR_ERR(dsi->pllref_clk); dsi 931 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->cdata->flags & DW_MIPI_NEEDS_PHY_CFG_CLK) { dsi 932 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->phy_cfg_clk = devm_clk_get(dev, "phy_cfg"); dsi 933 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (IS_ERR(dsi->phy_cfg_clk)) { dsi 934 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ret = PTR_ERR(dsi->phy_cfg_clk); dsi 941 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->cdata->flags & DW_MIPI_NEEDS_GRF_CLK) { dsi 942 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->grf_clk = devm_clk_get(dev, "grf"); dsi 943 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (IS_ERR(dsi->grf_clk)) { dsi 944 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ret = PTR_ERR(dsi->grf_clk); dsi 950 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->grf_regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); dsi 951 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (IS_ERR(dsi->grf_regmap)) { dsi 952 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c DRM_DEV_ERROR(dsi->dev, "Unable to get rockchip,grf\n"); dsi 953 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c return PTR_ERR(dsi->grf_regmap); dsi 956 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->dev = dev; dsi 957 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->pdata.base = dsi->base; dsi 958 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->pdata.max_data_lanes = dsi->cdata->max_data_lanes; dsi 959 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->pdata.phy_ops = &dw_mipi_dsi_rockchip_phy_ops; dsi 960 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->pdata.host_ops = &dw_mipi_dsi_rockchip_host_ops; dsi 961 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->pdata.priv_data = dsi; dsi 962 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c platform_set_drvdata(pdev, dsi); dsi 964 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dsi->dmd = dw_mipi_dsi_probe(pdev, &dsi->pdata); dsi 965 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (IS_ERR(dsi->dmd)) { dsi 966 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ret = PTR_ERR(dsi->dmd); dsi 976 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c clk_disable_unprepare(dsi->pllref_clk); dsi 982 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c struct dw_mipi_dsi_rockchip *dsi = platform_get_drvdata(pdev); dsi 984 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c if (dsi->devcnt == 0) dsi 985 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c component_del(dsi->dev, &dw_mipi_dsi_rockchip_ops); dsi 987 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c dw_mipi_dsi_remove(dsi->dmd); dsi 80 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c struct dw_mipi_dsi *dsi; dsi 87 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val) dsi 89 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c writel(val, dsi->base + reg); dsi 92 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c static inline u32 dsi_read(struct dw_mipi_dsi_stm *dsi, u32 reg) dsi 94 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c return readl(dsi->base + reg); dsi 97 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c static inline void dsi_set(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 mask) dsi 99 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_write(dsi, reg, dsi_read(dsi, reg) | mask); dsi 102 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c static inline void dsi_clear(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 mask) dsi 104 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_write(dsi, reg, dsi_read(dsi, reg) & ~mask); dsi 107 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c static inline void dsi_update_bits(struct dw_mipi_dsi_stm *dsi, u32 reg, dsi 110 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_write(dsi, reg, (dsi_read(dsi, reg) & ~mask) | val); dsi 141 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c static int dsi_pll_get_params(struct dw_mipi_dsi_stm *dsi, dsi 152 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c fvco_min = dsi->lane_min_kbps * 2 * ODF_MAX; dsi 153 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c fvco_max = dsi->lane_max_kbps * 2 * ODF_MIN; dsi 199 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c struct dw_mipi_dsi_stm *dsi = priv_data; dsi 204 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_set(dsi, DSI_WRPCR, WRPCR_REGEN | WRPCR_BGREN); dsi 205 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_RRS, dsi 211 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_set(dsi, DSI_WRPCR, WRPCR_PLLEN); dsi 212 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_PLLLS, dsi 222 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c struct dw_mipi_dsi_stm *dsi = priv_data; dsi 227 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_set(dsi, DSI_WCR, WCR_DSIEN); dsi 232 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c struct dw_mipi_dsi_stm *dsi = priv_data; dsi 237 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_clear(dsi, DSI_WCR, WCR_DSIEN); dsi 245 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c struct dw_mipi_dsi_stm *dsi = priv_data; dsi 251 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi->lane_min_kbps = LANE_MIN_KBPS; dsi 252 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi->lane_max_kbps = LANE_MAX_KBPS; dsi 253 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c if (dsi->hw_version == HWVER_131) { dsi 254 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi->lane_min_kbps *= 2; dsi 255 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi->lane_max_kbps *= 2; dsi 258 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c pll_in_khz = (unsigned int)(clk_get_rate(dsi->pllref_clk) / 1000); dsi 265 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c if (pll_out_khz > dsi->lane_max_kbps) { dsi 266 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c pll_out_khz = dsi->lane_max_kbps; dsi 269 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c if (pll_out_khz < dsi->lane_min_kbps) { dsi 270 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c pll_out_khz = dsi->lane_min_kbps; dsi 278 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = dsi_pll_get_params(dsi, pll_in_khz, pll_out_khz, dsi 287 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_update_bits(dsi, DSI_WRPCR, WRPCR_NDIV | WRPCR_IDF | WRPCR_ODF, dsi 292 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_update_bits(dsi, DSI_WPCR0, WPCR0_UIX4, val); dsi 295 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_clear(dsi, DSI_WCFGR, WCFGR_DSIM); dsi 298 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi_update_bits(dsi, DSI_WCFGR, WCFGR_COLMUX, dsi 330 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c struct dw_mipi_dsi_stm *dsi; dsi 335 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); dsi 336 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c if (!dsi) dsi 340 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi->base = devm_ioremap_resource(dev, res); dsi 341 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c if (IS_ERR(dsi->base)) { dsi 342 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = PTR_ERR(dsi->base); dsi 347 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi->vdd_supply = devm_regulator_get(dev, "phy-dsi"); dsi 348 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c if (IS_ERR(dsi->vdd_supply)) { dsi 349 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = PTR_ERR(dsi->vdd_supply); dsi 355 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = regulator_enable(dsi->vdd_supply); dsi 361 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi->pllref_clk = devm_clk_get(dev, "ref"); dsi 362 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c if (IS_ERR(dsi->pllref_clk)) { dsi 363 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = PTR_ERR(dsi->pllref_clk); dsi 368 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = clk_prepare_enable(dsi->pllref_clk); dsi 387 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi->hw_version = dsi_read(dsi, DSI_VERSION) & VERSION; dsi 390 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c if (dsi->hw_version != HWVER_130 && dsi->hw_version != HWVER_131) { dsi 396 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dw_mipi_dsi_stm_plat_data.base = dsi->base; dsi 397 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dw_mipi_dsi_stm_plat_data.priv_data = dsi; dsi 399 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c platform_set_drvdata(pdev, dsi); dsi 401 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dsi->dsi = dw_mipi_dsi_probe(pdev, &dw_mipi_dsi_stm_plat_data); dsi 402 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c if (IS_ERR(dsi->dsi)) { dsi 403 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = PTR_ERR(dsi->dsi); dsi 411 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c clk_disable_unprepare(dsi->pllref_clk); dsi 413 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c regulator_disable(dsi->vdd_supply); dsi 420 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c struct dw_mipi_dsi_stm *dsi = platform_get_drvdata(pdev); dsi 422 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c dw_mipi_dsi_remove(dsi->dsi); dsi 423 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c clk_disable_unprepare(dsi->pllref_clk); dsi 424 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c regulator_disable(dsi->vdd_supply); dsi 431 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c struct dw_mipi_dsi_stm *dsi = dw_mipi_dsi_stm_plat_data.priv_data; dsi 435 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c clk_disable_unprepare(dsi->pllref_clk); dsi 436 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c regulator_disable(dsi->vdd_supply); dsi 443 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c struct dw_mipi_dsi_stm *dsi = dw_mipi_dsi_stm_plat_data.priv_data; dsi 448 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = regulator_enable(dsi->vdd_supply); dsi 454 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c ret = clk_prepare_enable(dsi->pllref_clk); dsi 456 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c regulator_disable(dsi->vdd_supply); dsi 336 drivers/gpu/drm/sun4i/sun4i_tcon.c struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder); dsi 337 drivers/gpu/drm/sun4i/sun4i_tcon.c struct mipi_dsi_device *device = dsi->device; dsi 291 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static void sun6i_dsi_inst_abort(struct sun6i_dsi *dsi) dsi 293 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, dsi 297 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static void sun6i_dsi_inst_commit(struct sun6i_dsi *dsi) dsi 299 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, dsi 304 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static int sun6i_dsi_inst_wait_for_completion(struct sun6i_dsi *dsi) dsi 308 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c return regmap_read_poll_timeout(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, dsi 314 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static void sun6i_dsi_inst_setup(struct sun6i_dsi *dsi, dsi 321 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_INST_FUNC_REG(id), dsi 329 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static void sun6i_dsi_inst_init(struct sun6i_dsi *dsi, dsi 334 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_setup(dsi, DSI_INST_ID_LP11, DSI_INST_MODE_STOP, dsi 337 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_setup(dsi, DSI_INST_ID_TBA, DSI_INST_MODE_TBA, dsi 340 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_setup(dsi, DSI_INST_ID_HSC, DSI_INST_MODE_HS, dsi 343 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_setup(dsi, DSI_INST_ID_HSD, DSI_INST_MODE_HS, dsi 346 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_setup(dsi, DSI_INST_ID_LPDT, DSI_INST_MODE_ESCAPE, dsi 350 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_setup(dsi, DSI_INST_ID_HSCEXIT, DSI_INST_MODE_HSCEXIT, dsi 353 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_setup(dsi, DSI_INST_ID_NOP, DSI_INST_MODE_STOP, dsi 356 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_setup(dsi, DSI_INST_ID_DLY, DSI_INST_MODE_NOP, dsi 359 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_CFG_REG(0), dsi 365 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static u16 sun6i_dsi_get_video_start_delay(struct sun6i_dsi *dsi, dsi 377 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static u16 sun6i_dsi_get_line_num(struct sun6i_dsi *dsi, dsi 380 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct mipi_dsi_device *device = dsi->device; dsi 386 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static u16 sun6i_dsi_get_drq_edge0(struct sun6i_dsi *dsi, dsi 400 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static u16 sun6i_dsi_get_drq_edge1(struct sun6i_dsi *dsi, dsi 404 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct mipi_dsi_device *device = dsi->device; dsi 418 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi, dsi 421 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct mipi_dsi_device *device = dsi->device; dsi 425 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c u16 line_num = sun6i_dsi_get_line_num(dsi, mode); dsi 428 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c edge1 = sun6i_dsi_get_drq_edge1(dsi, mode, line_num); dsi 429 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c edge0 = sun6i_dsi_get_drq_edge0(dsi, mode, line_num, edge1); dsi 431 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BURST_DRQ_REG, dsi 435 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BURST_LINE_REG, dsi 451 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_TCON_DRQ_REG, val); dsi 454 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static void sun6i_dsi_setup_inst_loop(struct sun6i_dsi *dsi, dsi 457 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct mipi_dsi_device *device = dsi->device; dsi 467 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_SEL_REG, dsi 471 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_NUM_REG(0), dsi 474 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_NUM_REG(1), dsi 479 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static void sun6i_dsi_setup_format(struct sun6i_dsi *dsi, dsi 482 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct mipi_dsi_device *device = dsi->device; dsi 517 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_PIXEL_PH_REG, val); dsi 519 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_PIXEL_PF0_REG, dsi 522 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_PIXEL_PF1_REG, dsi 526 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_PIXEL_CTL0_REG, dsi 531 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi, dsi 534 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct mipi_dsi_device *device = dsi->device; dsi 605 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BASIC_CTL_REG, basic_ctl); dsi 607 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_SYNC_HSS_REG, dsi 612 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_SYNC_HSE_REG, dsi 617 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_SYNC_VSS_REG, dsi 622 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_SYNC_VSE_REG, dsi 627 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BASIC_SIZE0_REG, dsi 633 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BASIC_SIZE1_REG, dsi 638 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BLK_HSA0_REG, dsi 640 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BLK_HSA1_REG, dsi 644 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BLK_HBP0_REG, dsi 646 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BLK_HBP1_REG, dsi 650 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BLK_HFP0_REG, dsi 652 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BLK_HFP1_REG, dsi 656 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BLK_HBLK0_REG, dsi 658 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BLK_HBLK1_REG, dsi 662 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BLK_VBLK0_REG, dsi 664 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BLK_VBLK1_REG, dsi 670 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static int sun6i_dsi_start(struct sun6i_dsi *dsi, dsi 675 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_SEL_REG, dsi 680 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_SEL_REG, dsi 687 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_SEL_REG, dsi 692 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_SEL_REG, dsi 700 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_INST_JUMP_SEL_REG, dsi 705 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_abort(dsi); dsi 706 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_commit(dsi); dsi 709 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write_bits(dsi->regs, dsi 719 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder); dsi 720 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct mipi_dsi_device *device = dsi->device; dsi 727 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c pm_runtime_get_sync(dsi->dev); dsi 729 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c delay = sun6i_dsi_get_video_start_delay(dsi, mode); dsi 730 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BASIC_CTL1_REG, dsi 736 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_setup_burst(dsi, mode); dsi 737 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_setup_inst_loop(dsi, mode); dsi 738 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_setup_format(dsi, mode); dsi 739 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_setup_timings(dsi, mode); dsi 741 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c phy_init(dsi->dphy); dsi 747 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c phy_set_mode(dsi->dphy, PHY_MODE_MIPI_DPHY); dsi 748 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c phy_configure(dsi->dphy, &opts); dsi 749 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c phy_power_on(dsi->dphy); dsi 751 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (!IS_ERR(dsi->panel)) dsi 752 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c drm_panel_prepare(dsi->panel); dsi 766 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (!IS_ERR(dsi->panel)) dsi 767 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c drm_panel_enable(dsi->panel); dsi 769 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_start(dsi, DSI_START_HSC); dsi 773 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_start(dsi, DSI_START_HSD); dsi 778 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder); dsi 782 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (!IS_ERR(dsi->panel)) { dsi 783 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c drm_panel_disable(dsi->panel); dsi 784 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c drm_panel_unprepare(dsi->panel); dsi 787 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c phy_power_off(dsi->dphy); dsi 788 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c phy_exit(dsi->dphy); dsi 790 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c pm_runtime_put(dsi->dev); dsi 795 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = connector_to_sun6i_dsi(connector); dsi 797 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c return drm_panel_get_modes(dsi->panel); dsi 828 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static u32 sun6i_dsi_dcs_build_pkt_hdr(struct sun6i_dsi *dsi, dsi 847 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static int sun6i_dsi_dcs_write_short(struct sun6i_dsi *dsi, dsi 850 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(0), dsi 851 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_dcs_build_pkt_hdr(dsi, msg)); dsi 852 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write_bits(dsi->regs, SUN6I_DSI_CMD_CTL_REG, dsi 855 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_start(dsi, DSI_START_LPTX); dsi 860 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static int sun6i_dsi_dcs_write_long(struct sun6i_dsi *dsi, dsi 867 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(0), dsi 868 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_dcs_build_pkt_hdr(dsi, msg)); dsi 881 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_bulk_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(1), bounce, len); dsi 882 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_CMD_CTL_REG, len + 4 - 1); dsi 885 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_start(dsi, DSI_START_LPTX); dsi 887 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c ret = sun6i_dsi_inst_wait_for_completion(dsi); dsi 889 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_abort(dsi); dsi 901 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c static int sun6i_dsi_dcs_read(struct sun6i_dsi *dsi, dsi 908 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_CMD_TX_REG(0), dsi 909 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_dcs_build_pkt_hdr(dsi, msg)); dsi 910 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_CMD_CTL_REG, dsi 913 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_start(dsi, DSI_START_LPRX); dsi 915 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c ret = sun6i_dsi_inst_wait_for_completion(dsi); dsi 917 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_abort(dsi); dsi 926 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_read(dsi->regs, SUN6I_DSI_CMD_CTL_REG, &val); dsi 930 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_read(dsi->regs, SUN6I_DSI_CMD_RX_REG(0), &val); dsi 943 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = host_to_sun6i_dsi(host); dsi 945 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->device = device; dsi 946 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->panel = of_drm_find_panel(device->dev.of_node); dsi 947 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (IS_ERR(dsi->panel)) dsi 948 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c return PTR_ERR(dsi->panel); dsi 958 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = host_to_sun6i_dsi(host); dsi 960 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->panel = NULL; dsi 961 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->device = NULL; dsi 969 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = host_to_sun6i_dsi(host); dsi 972 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c ret = sun6i_dsi_inst_wait_for_completion(dsi); dsi 974 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_abort(dsi); dsi 976 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_CMD_CTL_REG, dsi 985 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c ret = sun6i_dsi_dcs_write_short(dsi, msg); dsi 989 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c ret = sun6i_dsi_dcs_write_long(dsi, msg); dsi 994 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c ret = sun6i_dsi_dcs_read(dsi, msg); dsi 1025 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = dev_get_drvdata(dev); dsi 1028 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (!dsi->panel) dsi 1031 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->drv = drv; dsi 1033 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c drm_encoder_helper_add(&dsi->encoder, dsi 1036 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c &dsi->encoder, dsi 1041 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dev_err(dsi->dev, "Couldn't initialise the DSI encoder\n"); dsi 1044 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->encoder.possible_crtcs = BIT(0); dsi 1046 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c drm_connector_helper_add(&dsi->connector, dsi 1048 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c ret = drm_connector_init(drm, &dsi->connector, dsi 1052 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dev_err(dsi->dev, dsi 1057 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c drm_connector_attach_encoder(&dsi->connector, &dsi->encoder); dsi 1058 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c drm_panel_attach(dsi->panel, &dsi->connector); dsi 1063 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c drm_encoder_cleanup(&dsi->encoder); dsi 1070 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = dev_get_drvdata(dev); dsi 1072 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c drm_panel_detach(dsi->panel); dsi 1083 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi; dsi 1088 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); dsi 1089 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (!dsi) dsi 1091 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dev_set_drvdata(dev, dsi); dsi 1092 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->dev = dev; dsi 1093 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->host.ops = &sun6i_dsi_host_ops; dsi 1094 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->host.dev = dev; dsi 1103 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->regs = devm_regmap_init_mmio_clk(dev, "bus", base, dsi 1105 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (IS_ERR(dsi->regs)) { dsi 1107 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c return PTR_ERR(dsi->regs); dsi 1110 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->reset = devm_reset_control_get_shared(dev, NULL); dsi 1111 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (IS_ERR(dsi->reset)) { dsi 1113 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c return PTR_ERR(dsi->reset); dsi 1116 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->mod_clk = devm_clk_get(dev, "mod"); dsi 1117 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (IS_ERR(dsi->mod_clk)) { dsi 1119 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c return PTR_ERR(dsi->mod_clk); dsi 1126 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c clk_set_rate_exclusive(dsi->mod_clk, 297000000); dsi 1128 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->dphy = devm_phy_get(dev, "dphy"); dsi 1129 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (IS_ERR(dsi->dphy)) { dsi 1131 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c ret = PTR_ERR(dsi->dphy); dsi 1137 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c ret = mipi_dsi_host_register(&dsi->host); dsi 1152 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c mipi_dsi_host_unregister(&dsi->host); dsi 1156 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c clk_rate_exclusive_put(dsi->mod_clk); dsi 1163 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = dev_get_drvdata(dev); dsi 1166 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c mipi_dsi_host_unregister(&dsi->host); dsi 1168 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c clk_rate_exclusive_put(dsi->mod_clk); dsi 1175 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = dev_get_drvdata(dev); dsi 1177 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c reset_control_deassert(dsi->reset); dsi 1178 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c clk_prepare_enable(dsi->mod_clk); dsi 1186 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_CTL_REG, SUN6I_DSI_CTL_EN); dsi 1188 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, dsi 1191 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_TRANS_START_REG, 10); dsi 1192 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_TRANS_ZERO_REG, 0); dsi 1194 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c if (dsi->device) dsi 1195 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c sun6i_dsi_inst_init(dsi, dsi->device); dsi 1197 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c regmap_write(dsi->regs, SUN6I_DSI_DEBUG_DATA_REG, 0xff); dsi 1204 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c struct sun6i_dsi *dsi = dev_get_drvdata(dev); dsi 1206 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c clk_disable_unprepare(dsi->mod_clk); dsi 1207 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c reset_control_assert(dsi->reset); dsi 101 drivers/gpu/drm/tegra/dsi.c static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) dsi 103 drivers/gpu/drm/tegra/dsi.c return to_dsi_state(dsi->output.connector.state); dsi 106 drivers/gpu/drm/tegra/dsi.c static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) dsi 108 drivers/gpu/drm/tegra/dsi.c u32 value = readl(dsi->regs + (offset << 2)); dsi 110 drivers/gpu/drm/tegra/dsi.c trace_dsi_readl(dsi->dev, offset, value); dsi 115 drivers/gpu/drm/tegra/dsi.c static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, dsi 118 drivers/gpu/drm/tegra/dsi.c trace_dsi_writel(dsi->dev, offset, value); dsi 119 drivers/gpu/drm/tegra/dsi.c writel(value, dsi->regs + (offset << 2)); dsi 201 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = node->info_ent->data; dsi 202 drivers/gpu/drm/tegra/dsi.c struct drm_crtc *crtc = dsi->output.encoder.crtc; dsi 218 drivers/gpu/drm/tegra/dsi.c offset, tegra_dsi_readl(dsi, offset)); dsi 236 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = to_dsi(output); dsi 239 drivers/gpu/drm/tegra/dsi.c dsi->debugfs_files = kmemdup(debugfs_files, sizeof(debugfs_files), dsi 241 drivers/gpu/drm/tegra/dsi.c if (!dsi->debugfs_files) dsi 245 drivers/gpu/drm/tegra/dsi.c dsi->debugfs_files[i].data = dsi; dsi 247 drivers/gpu/drm/tegra/dsi.c err = drm_debugfs_create_files(dsi->debugfs_files, count, root, minor); dsi 254 drivers/gpu/drm/tegra/dsi.c kfree(dsi->debugfs_files); dsi 255 drivers/gpu/drm/tegra/dsi.c dsi->debugfs_files = NULL; dsi 264 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = to_dsi(output); dsi 266 drivers/gpu/drm/tegra/dsi.c drm_debugfs_remove_files(dsi->debugfs_files, count, dsi 268 drivers/gpu/drm/tegra/dsi.c kfree(dsi->debugfs_files); dsi 269 drivers/gpu/drm/tegra/dsi.c dsi->debugfs_files = NULL; dsi 365 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_set_phy_timing(struct tegra_dsi *dsi, dsi 375 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_0); dsi 381 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_1); dsi 386 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_2); dsi 391 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_BTA_TIMING); dsi 393 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) dsi 394 drivers/gpu/drm/tegra/dsi.c tegra_dsi_set_phy_timing(dsi->slave, period, timing); dsi 451 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_ganged_enable(struct tegra_dsi *dsi, unsigned int start, dsi 456 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, start, DSI_GANGED_MODE_START); dsi 457 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, size << 16 | size, DSI_GANGED_MODE_SIZE); dsi 460 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_GANGED_MODE_CONTROL); dsi 463 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_enable(struct tegra_dsi *dsi) dsi 467 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); dsi 469 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); dsi 471 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) dsi 472 drivers/gpu/drm/tegra/dsi.c tegra_dsi_enable(dsi->slave); dsi 475 drivers/gpu/drm/tegra/dsi.c static unsigned int tegra_dsi_get_lanes(struct tegra_dsi *dsi) dsi 477 drivers/gpu/drm/tegra/dsi.c if (dsi->master) dsi 478 drivers/gpu/drm/tegra/dsi.c return dsi->master->lanes + dsi->lanes; dsi 480 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) dsi 481 drivers/gpu/drm/tegra/dsi.c return dsi->lanes + dsi->slave->lanes; dsi 483 drivers/gpu/drm/tegra/dsi.c return dsi->lanes; dsi 486 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_configure(struct tegra_dsi *dsi, unsigned int pipe, dsi 495 drivers/gpu/drm/tegra/dsi.c if (dsi->master) dsi 496 drivers/gpu/drm/tegra/dsi.c state = tegra_dsi_get_state(dsi->master); dsi 498 drivers/gpu/drm/tegra/dsi.c state = tegra_dsi_get_state(dsi); dsi 503 drivers/gpu/drm/tegra/dsi.c if (dsi->flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { dsi 506 drivers/gpu/drm/tegra/dsi.c } else if (dsi->flags & MIPI_DSI_MODE_VIDEO) { dsi 516 drivers/gpu/drm/tegra/dsi.c DSI_CONTROL_LANES(dsi->lanes - 1) | dsi 518 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_CONTROL); dsi 520 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, dsi->video_fifo_depth, DSI_MAX_THRESHOLD); dsi 523 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL); dsi 525 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_CONTROL); dsi 527 drivers/gpu/drm/tegra/dsi.c if (dsi->flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) dsi 533 drivers/gpu/drm/tegra/dsi.c if (dsi->flags & MIPI_DSI_MODE_VIDEO) dsi 540 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_CONTROL); dsi 543 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, pkt_seq[i], DSI_PKT_SEQ_0_LO + i); dsi 545 drivers/gpu/drm/tegra/dsi.c if (dsi->flags & MIPI_DSI_MODE_VIDEO) { dsi 555 drivers/gpu/drm/tegra/dsi.c if ((dsi->flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) == 0) dsi 566 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, hsw << 16 | 0, DSI_PKT_LEN_0_1); dsi 567 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, hact << 16 | hbp, DSI_PKT_LEN_2_3); dsi 568 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, hfp, DSI_PKT_LEN_4_5); dsi 569 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0x0f0f << 16, DSI_PKT_LEN_6_7); dsi 572 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 8 * mul / div, DSI_SOL_DELAY); dsi 578 drivers/gpu/drm/tegra/dsi.c if (dsi->master || dsi->slave) { dsi 588 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_PKT_LEN_0_1); dsi 589 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, bytes << 16, DSI_PKT_LEN_2_3); dsi 590 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, bytes << 16, DSI_PKT_LEN_4_5); dsi 591 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_PKT_LEN_6_7); dsi 595 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_DCS_CMDS); dsi 598 drivers/gpu/drm/tegra/dsi.c if (dsi->master || dsi->slave) { dsi 616 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_SOL_DELAY); dsi 619 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) { dsi 620 drivers/gpu/drm/tegra/dsi.c tegra_dsi_configure(dsi->slave, pipe, mode); dsi 626 drivers/gpu/drm/tegra/dsi.c tegra_dsi_ganged_enable(dsi, 0, mode->hdisplay / 2); dsi 627 drivers/gpu/drm/tegra/dsi.c tegra_dsi_ganged_enable(dsi->slave, mode->hdisplay / 2, dsi 632 drivers/gpu/drm/tegra/dsi.c static int tegra_dsi_wait_idle(struct tegra_dsi *dsi, unsigned long timeout) dsi 639 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_STATUS); dsi 649 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_video_disable(struct tegra_dsi *dsi) dsi 653 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_CONTROL); dsi 655 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_CONTROL); dsi 657 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) dsi 658 drivers/gpu/drm/tegra/dsi.c tegra_dsi_video_disable(dsi->slave); dsi 661 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_ganged_disable(struct tegra_dsi *dsi) dsi 663 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_START); dsi 664 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_SIZE); dsi 665 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_CONTROL); dsi 668 drivers/gpu/drm/tegra/dsi.c static int tegra_dsi_pad_enable(struct tegra_dsi *dsi) dsi 673 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_0); dsi 678 drivers/gpu/drm/tegra/dsi.c static int tegra_dsi_pad_calibrate(struct tegra_dsi *dsi) dsi 686 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_0); dsi 687 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_1); dsi 688 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_2); dsi 689 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_3); dsi 690 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_4); dsi 693 drivers/gpu/drm/tegra/dsi.c tegra_dsi_pad_enable(dsi); dsi 698 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_2); dsi 702 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_3); dsi 704 drivers/gpu/drm/tegra/dsi.c return tegra_mipi_calibrate(dsi->mipi); dsi 707 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_set_timeout(struct tegra_dsi *dsi, unsigned long bclk, dsi 716 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_TIMEOUT_0); dsi 721 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_TIMEOUT_1); dsi 724 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_TO_TALLY); dsi 726 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) dsi 727 drivers/gpu/drm/tegra/dsi.c tegra_dsi_set_timeout(dsi->slave, bclk, vrefresh); dsi 730 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_disable(struct tegra_dsi *dsi) dsi 734 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) { dsi 735 drivers/gpu/drm/tegra/dsi.c tegra_dsi_ganged_disable(dsi->slave); dsi 736 drivers/gpu/drm/tegra/dsi.c tegra_dsi_ganged_disable(dsi); dsi 739 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); dsi 741 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); dsi 743 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) dsi 744 drivers/gpu/drm/tegra/dsi.c tegra_dsi_disable(dsi->slave); dsi 749 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_soft_reset(struct tegra_dsi *dsi) dsi 753 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); dsi 755 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); dsi 759 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); dsi 761 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); dsi 765 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_TRIGGER); dsi 767 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 0, DSI_TRIGGER); dsi 769 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) dsi 770 drivers/gpu/drm/tegra/dsi.c tegra_dsi_soft_reset(dsi->slave); dsi 831 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_unprepare(struct tegra_dsi *dsi) dsi 835 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) dsi 836 drivers/gpu/drm/tegra/dsi.c tegra_dsi_unprepare(dsi->slave); dsi 838 drivers/gpu/drm/tegra/dsi.c err = tegra_mipi_disable(dsi->mipi); dsi 840 drivers/gpu/drm/tegra/dsi.c dev_err(dsi->dev, "failed to disable MIPI calibration: %d\n", dsi 843 drivers/gpu/drm/tegra/dsi.c pm_runtime_put(dsi->dev); dsi 850 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = to_dsi(output); dsi 857 drivers/gpu/drm/tegra/dsi.c tegra_dsi_video_disable(dsi); dsi 871 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_wait_idle(dsi, 100); dsi 873 drivers/gpu/drm/tegra/dsi.c dev_dbg(dsi->dev, "failed to idle DSI: %d\n", err); dsi 875 drivers/gpu/drm/tegra/dsi.c tegra_dsi_soft_reset(dsi); dsi 880 drivers/gpu/drm/tegra/dsi.c tegra_dsi_disable(dsi); dsi 882 drivers/gpu/drm/tegra/dsi.c tegra_dsi_unprepare(dsi); dsi 885 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_prepare(struct tegra_dsi *dsi) dsi 889 drivers/gpu/drm/tegra/dsi.c pm_runtime_get_sync(dsi->dev); dsi 891 drivers/gpu/drm/tegra/dsi.c err = tegra_mipi_enable(dsi->mipi); dsi 893 drivers/gpu/drm/tegra/dsi.c dev_err(dsi->dev, "failed to enable MIPI calibration: %d\n", dsi 896 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_pad_calibrate(dsi); dsi 898 drivers/gpu/drm/tegra/dsi.c dev_err(dsi->dev, "MIPI calibration failed: %d\n", err); dsi 900 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) dsi 901 drivers/gpu/drm/tegra/dsi.c tegra_dsi_prepare(dsi->slave); dsi 909 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = to_dsi(output); dsi 913 drivers/gpu/drm/tegra/dsi.c tegra_dsi_prepare(dsi); dsi 915 drivers/gpu/drm/tegra/dsi.c state = tegra_dsi_get_state(dsi); dsi 917 drivers/gpu/drm/tegra/dsi.c tegra_dsi_set_timeout(dsi, state->bclk, state->vrefresh); dsi 923 drivers/gpu/drm/tegra/dsi.c tegra_dsi_set_phy_timing(dsi, state->period * 8, &state->timing); dsi 928 drivers/gpu/drm/tegra/dsi.c tegra_dsi_configure(dsi, dc->pipe, mode); dsi 938 drivers/gpu/drm/tegra/dsi.c tegra_dsi_enable(dsi); dsi 952 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = to_dsi(output); dsi 959 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_get_muldiv(dsi->format, &state->mul, &state->div); dsi 963 drivers/gpu/drm/tegra/dsi.c state->lanes = tegra_dsi_get_lanes(dsi); dsi 965 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_get_format(dsi->format, &state->format); dsi 992 drivers/gpu/drm/tegra/dsi.c dev_err(dsi->dev, "failed to validate D-PHY timing: %d\n", err); dsi 1015 drivers/gpu/drm/tegra/dsi.c err = tegra_dc_state_setup_clock(dc, crtc_state, dsi->clk_parent, dsi 1034 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = host1x_client_to_dsi(client); dsi 1038 drivers/gpu/drm/tegra/dsi.c if (!dsi->master) { dsi 1039 drivers/gpu/drm/tegra/dsi.c dsi->output.dev = client->dev; dsi 1041 drivers/gpu/drm/tegra/dsi.c drm_connector_init(drm, &dsi->output.connector, dsi 1044 drivers/gpu/drm/tegra/dsi.c drm_connector_helper_add(&dsi->output.connector, dsi 1046 drivers/gpu/drm/tegra/dsi.c dsi->output.connector.dpms = DRM_MODE_DPMS_OFF; dsi 1048 drivers/gpu/drm/tegra/dsi.c drm_encoder_init(drm, &dsi->output.encoder, dsi 1051 drivers/gpu/drm/tegra/dsi.c drm_encoder_helper_add(&dsi->output.encoder, dsi 1054 drivers/gpu/drm/tegra/dsi.c drm_connector_attach_encoder(&dsi->output.connector, dsi 1055 drivers/gpu/drm/tegra/dsi.c &dsi->output.encoder); dsi 1056 drivers/gpu/drm/tegra/dsi.c drm_connector_register(&dsi->output.connector); dsi 1058 drivers/gpu/drm/tegra/dsi.c err = tegra_output_init(drm, &dsi->output); dsi 1060 drivers/gpu/drm/tegra/dsi.c dev_err(dsi->dev, "failed to initialize output: %d\n", dsi 1063 drivers/gpu/drm/tegra/dsi.c dsi->output.encoder.possible_crtcs = 0x3; dsi 1071 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = host1x_client_to_dsi(client); dsi 1073 drivers/gpu/drm/tegra/dsi.c tegra_output_exit(&dsi->output); dsi 1083 drivers/gpu/drm/tegra/dsi.c static int tegra_dsi_setup_clocks(struct tegra_dsi *dsi) dsi 1088 drivers/gpu/drm/tegra/dsi.c parent = clk_get_parent(dsi->clk); dsi 1092 drivers/gpu/drm/tegra/dsi.c err = clk_set_parent(parent, dsi->clk_parent); dsi 1118 drivers/gpu/drm/tegra/dsi.c static ssize_t tegra_dsi_read_response(struct tegra_dsi *dsi, dsi 1129 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_RD_DATA); dsi 1134 drivers/gpu/drm/tegra/dsi.c dev_dbg(dsi->dev, "Acknowledge and error report: %04x\n", dsi 1138 drivers/gpu/drm/tegra/dsi.c dev_dbg(dsi->dev, " %2u: %s\n", i, dsi 1162 drivers/gpu/drm/tegra/dsi.c dev_err(dsi->dev, "unhandled response type: %02x\n", dsi 1173 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_RD_DATA); dsi 1183 drivers/gpu/drm/tegra/dsi.c static int tegra_dsi_transmit(struct tegra_dsi *dsi, unsigned long timeout) dsi 1185 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, DSI_TRIGGER_HOST, DSI_TRIGGER); dsi 1190 drivers/gpu/drm/tegra/dsi.c u32 value = tegra_dsi_readl(dsi, DSI_TRIGGER); dsi 1201 drivers/gpu/drm/tegra/dsi.c static int tegra_dsi_wait_for_response(struct tegra_dsi *dsi, dsi 1207 drivers/gpu/drm/tegra/dsi.c u32 value = tegra_dsi_readl(dsi, DSI_STATUS); dsi 1220 drivers/gpu/drm/tegra/dsi.c static void tegra_dsi_writesl(struct tegra_dsi *dsi, unsigned long offset, dsi 1233 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_WR_DATA); dsi 1240 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = host_to_tegra(host); dsi 1254 drivers/gpu/drm/tegra/dsi.c if (packet.size > dsi->video_fifo_depth * 4) dsi 1258 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_STATUS); dsi 1261 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL); dsi 1265 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); dsi 1267 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); dsi 1281 drivers/gpu/drm/tegra/dsi.c if (packet.size > dsi->host_fifo_depth * 4) dsi 1284 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL); dsi 1292 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_HOST_CONTROL); dsi 1294 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL); dsi 1298 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_CONTROL); dsi 1302 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, value, DSI_WR_DATA); dsi 1306 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writesl(dsi, DSI_WR_DATA, packet.payload, dsi 1309 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_transmit(dsi, 250); dsi 1315 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_wait_for_response(dsi, 250); dsi 1321 drivers/gpu/drm/tegra/dsi.c value = tegra_dsi_readl(dsi, DSI_RD_DATA); dsi 1336 drivers/gpu/drm/tegra/dsi.c dev_err(dsi->dev, "unknown status: %08x\n", value); dsi 1341 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_read_response(dsi, msg, count); dsi 1343 drivers/gpu/drm/tegra/dsi.c dev_err(dsi->dev, dsi 1365 drivers/gpu/drm/tegra/dsi.c static int tegra_dsi_ganged_setup(struct tegra_dsi *dsi) dsi 1371 drivers/gpu/drm/tegra/dsi.c parent = clk_get_parent(dsi->slave->clk); dsi 1375 drivers/gpu/drm/tegra/dsi.c err = clk_set_parent(parent, dsi->clk_parent); dsi 1385 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = host_to_tegra(host); dsi 1387 drivers/gpu/drm/tegra/dsi.c dsi->flags = device->mode_flags; dsi 1388 drivers/gpu/drm/tegra/dsi.c dsi->format = device->format; dsi 1389 drivers/gpu/drm/tegra/dsi.c dsi->lanes = device->lanes; dsi 1391 drivers/gpu/drm/tegra/dsi.c if (dsi->slave) { dsi 1394 drivers/gpu/drm/tegra/dsi.c dev_dbg(dsi->dev, "attaching dual-channel device %s\n", dsi 1397 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_ganged_setup(dsi); dsi 1399 drivers/gpu/drm/tegra/dsi.c dev_err(dsi->dev, "failed to set up ganged mode: %d\n", dsi 1409 drivers/gpu/drm/tegra/dsi.c if (!dsi->master) { dsi 1410 drivers/gpu/drm/tegra/dsi.c struct tegra_output *output = &dsi->output; dsi 1428 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = host_to_tegra(host); dsi 1429 drivers/gpu/drm/tegra/dsi.c struct tegra_output *output = &dsi->output; dsi 1447 drivers/gpu/drm/tegra/dsi.c static int tegra_dsi_ganged_probe(struct tegra_dsi *dsi) dsi 1451 drivers/gpu/drm/tegra/dsi.c np = of_parse_phandle(dsi->dev->of_node, "nvidia,ganged-mode", 0); dsi 1455 drivers/gpu/drm/tegra/dsi.c dsi->slave = platform_get_drvdata(gangster); dsi 1458 drivers/gpu/drm/tegra/dsi.c if (!dsi->slave) dsi 1461 drivers/gpu/drm/tegra/dsi.c dsi->slave->master = dsi; dsi 1469 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi; dsi 1473 drivers/gpu/drm/tegra/dsi.c dsi = devm_kzalloc(&pdev->dev, sizeof(*dsi), GFP_KERNEL); dsi 1474 drivers/gpu/drm/tegra/dsi.c if (!dsi) dsi 1477 drivers/gpu/drm/tegra/dsi.c dsi->output.dev = dsi->dev = &pdev->dev; dsi 1478 drivers/gpu/drm/tegra/dsi.c dsi->video_fifo_depth = 1920; dsi 1479 drivers/gpu/drm/tegra/dsi.c dsi->host_fifo_depth = 64; dsi 1481 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_ganged_probe(dsi); dsi 1485 drivers/gpu/drm/tegra/dsi.c err = tegra_output_probe(&dsi->output); dsi 1489 drivers/gpu/drm/tegra/dsi.c dsi->output.connector.polled = DRM_CONNECTOR_POLL_HPD; dsi 1496 drivers/gpu/drm/tegra/dsi.c dsi->flags = MIPI_DSI_MODE_VIDEO; dsi 1497 drivers/gpu/drm/tegra/dsi.c dsi->format = MIPI_DSI_FMT_RGB888; dsi 1498 drivers/gpu/drm/tegra/dsi.c dsi->lanes = 4; dsi 1501 drivers/gpu/drm/tegra/dsi.c dsi->rst = devm_reset_control_get(&pdev->dev, "dsi"); dsi 1502 drivers/gpu/drm/tegra/dsi.c if (IS_ERR(dsi->rst)) dsi 1503 drivers/gpu/drm/tegra/dsi.c return PTR_ERR(dsi->rst); dsi 1506 drivers/gpu/drm/tegra/dsi.c dsi->clk = devm_clk_get(&pdev->dev, NULL); dsi 1507 drivers/gpu/drm/tegra/dsi.c if (IS_ERR(dsi->clk)) { dsi 1509 drivers/gpu/drm/tegra/dsi.c return PTR_ERR(dsi->clk); dsi 1512 drivers/gpu/drm/tegra/dsi.c dsi->clk_lp = devm_clk_get(&pdev->dev, "lp"); dsi 1513 drivers/gpu/drm/tegra/dsi.c if (IS_ERR(dsi->clk_lp)) { dsi 1515 drivers/gpu/drm/tegra/dsi.c return PTR_ERR(dsi->clk_lp); dsi 1518 drivers/gpu/drm/tegra/dsi.c dsi->clk_parent = devm_clk_get(&pdev->dev, "parent"); dsi 1519 drivers/gpu/drm/tegra/dsi.c if (IS_ERR(dsi->clk_parent)) { dsi 1521 drivers/gpu/drm/tegra/dsi.c return PTR_ERR(dsi->clk_parent); dsi 1524 drivers/gpu/drm/tegra/dsi.c dsi->vdd = devm_regulator_get(&pdev->dev, "avdd-dsi-csi"); dsi 1525 drivers/gpu/drm/tegra/dsi.c if (IS_ERR(dsi->vdd)) { dsi 1527 drivers/gpu/drm/tegra/dsi.c return PTR_ERR(dsi->vdd); dsi 1530 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_setup_clocks(dsi); dsi 1537 drivers/gpu/drm/tegra/dsi.c dsi->regs = devm_ioremap_resource(&pdev->dev, regs); dsi 1538 drivers/gpu/drm/tegra/dsi.c if (IS_ERR(dsi->regs)) dsi 1539 drivers/gpu/drm/tegra/dsi.c return PTR_ERR(dsi->regs); dsi 1541 drivers/gpu/drm/tegra/dsi.c dsi->mipi = tegra_mipi_request(&pdev->dev); dsi 1542 drivers/gpu/drm/tegra/dsi.c if (IS_ERR(dsi->mipi)) dsi 1543 drivers/gpu/drm/tegra/dsi.c return PTR_ERR(dsi->mipi); dsi 1545 drivers/gpu/drm/tegra/dsi.c dsi->host.ops = &tegra_dsi_host_ops; dsi 1546 drivers/gpu/drm/tegra/dsi.c dsi->host.dev = &pdev->dev; dsi 1548 drivers/gpu/drm/tegra/dsi.c err = mipi_dsi_host_register(&dsi->host); dsi 1554 drivers/gpu/drm/tegra/dsi.c platform_set_drvdata(pdev, dsi); dsi 1557 drivers/gpu/drm/tegra/dsi.c INIT_LIST_HEAD(&dsi->client.list); dsi 1558 drivers/gpu/drm/tegra/dsi.c dsi->client.ops = &dsi_client_ops; dsi 1559 drivers/gpu/drm/tegra/dsi.c dsi->client.dev = &pdev->dev; dsi 1561 drivers/gpu/drm/tegra/dsi.c err = host1x_client_register(&dsi->client); dsi 1571 drivers/gpu/drm/tegra/dsi.c mipi_dsi_host_unregister(&dsi->host); dsi 1573 drivers/gpu/drm/tegra/dsi.c tegra_mipi_free(dsi->mipi); dsi 1579 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = platform_get_drvdata(pdev); dsi 1584 drivers/gpu/drm/tegra/dsi.c err = host1x_client_unregister(&dsi->client); dsi 1591 drivers/gpu/drm/tegra/dsi.c tegra_output_remove(&dsi->output); dsi 1593 drivers/gpu/drm/tegra/dsi.c mipi_dsi_host_unregister(&dsi->host); dsi 1594 drivers/gpu/drm/tegra/dsi.c tegra_mipi_free(dsi->mipi); dsi 1602 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = dev_get_drvdata(dev); dsi 1605 drivers/gpu/drm/tegra/dsi.c if (dsi->rst) { dsi 1606 drivers/gpu/drm/tegra/dsi.c err = reset_control_assert(dsi->rst); dsi 1615 drivers/gpu/drm/tegra/dsi.c clk_disable_unprepare(dsi->clk_lp); dsi 1616 drivers/gpu/drm/tegra/dsi.c clk_disable_unprepare(dsi->clk); dsi 1618 drivers/gpu/drm/tegra/dsi.c regulator_disable(dsi->vdd); dsi 1625 drivers/gpu/drm/tegra/dsi.c struct tegra_dsi *dsi = dev_get_drvdata(dev); dsi 1628 drivers/gpu/drm/tegra/dsi.c err = regulator_enable(dsi->vdd); dsi 1630 drivers/gpu/drm/tegra/dsi.c dev_err(dsi->dev, "failed to enable VDD supply: %d\n", err); dsi 1634 drivers/gpu/drm/tegra/dsi.c err = clk_prepare_enable(dsi->clk); dsi 1640 drivers/gpu/drm/tegra/dsi.c err = clk_prepare_enable(dsi->clk_lp); dsi 1648 drivers/gpu/drm/tegra/dsi.c if (dsi->rst) { dsi 1649 drivers/gpu/drm/tegra/dsi.c err = reset_control_deassert(dsi->rst); dsi 1659 drivers/gpu/drm/tegra/dsi.c clk_disable_unprepare(dsi->clk_lp); dsi 1661 drivers/gpu/drm/tegra/dsi.c clk_disable_unprepare(dsi->clk); dsi 1663 drivers/gpu/drm/tegra/dsi.c regulator_disable(dsi->vdd); dsi 548 drivers/gpu/drm/vc4/vc4_dsi.c dsi_dma_workaround_write(struct vc4_dsi *dsi, u32 offset, u32 val) dsi 550 drivers/gpu/drm/vc4/vc4_dsi.c struct dma_chan *chan = dsi->reg_dma_chan; dsi 557 drivers/gpu/drm/vc4/vc4_dsi.c writel(val, dsi->regs + offset); dsi 561 drivers/gpu/drm/vc4/vc4_dsi.c *dsi->reg_dma_mem = val; dsi 564 drivers/gpu/drm/vc4/vc4_dsi.c dsi->reg_paddr + offset, dsi 565 drivers/gpu/drm/vc4/vc4_dsi.c dsi->reg_dma_paddr, dsi 583 drivers/gpu/drm/vc4/vc4_dsi.c #define DSI_READ(offset) readl(dsi->regs + (offset)) dsi 584 drivers/gpu/drm/vc4/vc4_dsi.c #define DSI_WRITE(offset, val) dsi_dma_workaround_write(dsi, offset, val) dsi 586 drivers/gpu/drm/vc4/vc4_dsi.c DSI_READ(dsi->port ? DSI1_##offset : DSI0_##offset) dsi 588 drivers/gpu/drm/vc4/vc4_dsi.c DSI_WRITE(dsi->port ? DSI1_##offset : DSI0_##offset, val) dsi 589 drivers/gpu/drm/vc4/vc4_dsi.c #define DSI_PORT_BIT(bit) (dsi->port ? DSI1_##bit : DSI0_##bit) dsi 594 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi; dsi 662 drivers/gpu/drm/vc4/vc4_dsi.c static void vc4_dsi_latch_ulps(struct vc4_dsi *dsi, bool latch) dsi 675 drivers/gpu/drm/vc4/vc4_dsi.c static void vc4_dsi_ulps(struct vc4_dsi *dsi, bool ulps) dsi 677 drivers/gpu/drm/vc4/vc4_dsi.c bool non_continuous = dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS; dsi 680 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 1 ? DSI_PHYC_DLANE1_ULPS : 0) | dsi 681 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 2 ? DSI_PHYC_DLANE2_ULPS : 0) | dsi 682 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 3 ? DSI_PHYC_DLANE3_ULPS : 0)); dsi 685 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_ULPS : 0) | dsi 686 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_ULPS : 0) | dsi 687 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_ULPS : 0)); dsi 690 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_STOP : 0) | dsi 691 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_STOP : 0) | dsi 692 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_STOP : 0)); dsi 704 drivers/gpu/drm/vc4/vc4_dsi.c dev_warn(&dsi->pdev->dev, dsi 708 drivers/gpu/drm/vc4/vc4_dsi.c vc4_dsi_latch_ulps(dsi, false); dsi 717 drivers/gpu/drm/vc4/vc4_dsi.c vc4_dsi_latch_ulps(dsi, ulps); dsi 723 drivers/gpu/drm/vc4/vc4_dsi.c dev_warn(&dsi->pdev->dev, dsi 752 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi = vc4_encoder->dsi; dsi 753 drivers/gpu/drm/vc4/vc4_dsi.c struct device *dev = &dsi->pdev->dev; dsi 755 drivers/gpu/drm/vc4/vc4_dsi.c drm_bridge_disable(dsi->bridge); dsi 756 drivers/gpu/drm/vc4/vc4_dsi.c vc4_dsi_ulps(dsi, true); dsi 757 drivers/gpu/drm/vc4/vc4_dsi.c drm_bridge_post_disable(dsi->bridge); dsi 759 drivers/gpu/drm/vc4/vc4_dsi.c clk_disable_unprepare(dsi->pll_phy_clock); dsi 760 drivers/gpu/drm/vc4/vc4_dsi.c clk_disable_unprepare(dsi->escape_clock); dsi 761 drivers/gpu/drm/vc4/vc4_dsi.c clk_disable_unprepare(dsi->pixel_clock); dsi 784 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi = vc4_encoder->dsi; dsi 785 drivers/gpu/drm/vc4/vc4_dsi.c struct clk *phy_parent = clk_get_parent(dsi->pll_phy_clock); dsi 788 drivers/gpu/drm/vc4/vc4_dsi.c unsigned long pll_clock = pixel_clock_hz * dsi->divider; dsi 805 drivers/gpu/drm/vc4/vc4_dsi.c pixel_clock_hz = pll_clock / dsi->divider; dsi 822 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi = vc4_encoder->dsi; dsi 823 drivers/gpu/drm/vc4/vc4_dsi.c struct device *dev = &dsi->pdev->dev; dsi 836 drivers/gpu/drm/vc4/vc4_dsi.c DRM_ERROR("Failed to runtime PM enable on DSI%d\n", dsi->port); dsi 841 drivers/gpu/drm/vc4/vc4_dsi.c struct drm_printer p = drm_info_printer(&dsi->pdev->dev); dsi 842 drivers/gpu/drm/vc4/vc4_dsi.c dev_info(&dsi->pdev->dev, "DSI regs before:\n"); dsi 843 drivers/gpu/drm/vc4/vc4_dsi.c drm_print_regset32(&p, &dsi->regset); dsi 850 drivers/gpu/drm/vc4/vc4_dsi.c phy_clock = (pixel_clock_hz + 1000) * dsi->divider; dsi 851 drivers/gpu/drm/vc4/vc4_dsi.c ret = clk_set_rate(dsi->pll_phy_clock, phy_clock); dsi 853 drivers/gpu/drm/vc4/vc4_dsi.c dev_err(&dsi->pdev->dev, dsi 870 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->port == 0) { dsi 874 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->lanes < 2) dsi 877 drivers/gpu/drm/vc4/vc4_dsi.c if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO)) dsi 895 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->lanes < 4) dsi 897 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->lanes < 3) dsi 899 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->lanes < 2) dsi 912 drivers/gpu/drm/vc4/vc4_dsi.c ret = clk_prepare_enable(dsi->escape_clock); dsi 918 drivers/gpu/drm/vc4/vc4_dsi.c ret = clk_prepare_enable(dsi->pll_phy_clock); dsi 924 drivers/gpu/drm/vc4/vc4_dsi.c hs_clock = clk_get_rate(dsi->pll_phy_clock); dsi 934 drivers/gpu/drm/vc4/vc4_dsi.c ret = clk_set_rate(dsi->pixel_clock, dsip_clock); dsi 940 drivers/gpu/drm/vc4/vc4_dsi.c ret = clk_prepare_enable(dsi->pixel_clock); dsi 1010 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes >= 2 ? DSI_PHYC_DLANE1_ENABLE : 0) | dsi 1011 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes >= 3 ? DSI_PHYC_DLANE2_ENABLE : 0) | dsi 1012 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->lanes >= 4 ? DSI_PHYC_DLANE3_ENABLE : 0) | dsi 1014 drivers/gpu/drm/vc4/vc4_dsi.c ((dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? dsi 1016 drivers/gpu/drm/vc4/vc4_dsi.c (dsi->port == 0 ? dsi 1042 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->port == 0) dsi 1048 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->port == 0) { dsi 1055 drivers/gpu/drm/vc4/vc4_dsi.c vc4_dsi_ulps(dsi, false); dsi 1057 drivers/gpu/drm/vc4/vc4_dsi.c drm_bridge_pre_enable(dsi->bridge); dsi 1059 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { dsi 1061 drivers/gpu/drm/vc4/vc4_dsi.c VC4_SET_FIELD(dsi->divider, dsi 1063 drivers/gpu/drm/vc4/vc4_dsi.c VC4_SET_FIELD(dsi->format, DSI_DISP0_PFORMAT) | dsi 1074 drivers/gpu/drm/vc4/vc4_dsi.c drm_bridge_enable(dsi->bridge); dsi 1077 drivers/gpu/drm/vc4/vc4_dsi.c struct drm_printer p = drm_info_printer(&dsi->pdev->dev); dsi 1078 drivers/gpu/drm/vc4/vc4_dsi.c dev_info(&dsi->pdev->dev, "DSI regs after:\n"); dsi 1079 drivers/gpu/drm/vc4/vc4_dsi.c drm_print_regset32(&p, &dsi->regset); dsi 1086 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi = host_to_dsi(host); dsi 1164 drivers/gpu/drm/vc4/vc4_dsi.c dsi->xfer_result = 0; dsi 1165 drivers/gpu/drm/vc4/vc4_dsi.c reinit_completion(&dsi->xfer_completion); dsi 1179 drivers/gpu/drm/vc4/vc4_dsi.c if (!wait_for_completion_timeout(&dsi->xfer_completion, dsi 1181 drivers/gpu/drm/vc4/vc4_dsi.c dev_err(&dsi->pdev->dev, "transfer interrupt wait timeout"); dsi 1182 drivers/gpu/drm/vc4/vc4_dsi.c dev_err(&dsi->pdev->dev, "instat: 0x%08x\n", dsi 1186 drivers/gpu/drm/vc4/vc4_dsi.c ret = dsi->xfer_result; dsi 1242 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi = host_to_dsi(host); dsi 1244 drivers/gpu/drm/vc4/vc4_dsi.c dsi->lanes = device->lanes; dsi 1245 drivers/gpu/drm/vc4/vc4_dsi.c dsi->channel = device->channel; dsi 1246 drivers/gpu/drm/vc4/vc4_dsi.c dsi->mode_flags = device->mode_flags; dsi 1250 drivers/gpu/drm/vc4/vc4_dsi.c dsi->format = DSI_PFORMAT_RGB888; dsi 1251 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 24 / dsi->lanes; dsi 1254 drivers/gpu/drm/vc4/vc4_dsi.c dsi->format = DSI_PFORMAT_RGB666; dsi 1255 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 24 / dsi->lanes; dsi 1258 drivers/gpu/drm/vc4/vc4_dsi.c dsi->format = DSI_PFORMAT_RGB666_PACKED; dsi 1259 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 18 / dsi->lanes; dsi 1262 drivers/gpu/drm/vc4/vc4_dsi.c dsi->format = DSI_PFORMAT_RGB565; dsi 1263 drivers/gpu/drm/vc4/vc4_dsi.c dsi->divider = 16 / dsi->lanes; dsi 1266 drivers/gpu/drm/vc4/vc4_dsi.c dev_err(&dsi->pdev->dev, "Unknown DSI format: %d.\n", dsi 1267 drivers/gpu/drm/vc4/vc4_dsi.c dsi->format); dsi 1271 drivers/gpu/drm/vc4/vc4_dsi.c if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO)) { dsi 1272 drivers/gpu/drm/vc4/vc4_dsi.c dev_err(&dsi->pdev->dev, dsi 1303 drivers/gpu/drm/vc4/vc4_dsi.c static void dsi_handle_error(struct vc4_dsi *dsi, dsi 1310 drivers/gpu/drm/vc4/vc4_dsi.c DRM_ERROR("DSI%d: %s error\n", dsi->port, type); dsi 1322 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi = data; dsi 1337 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi = data; dsi 1343 drivers/gpu/drm/vc4/vc4_dsi.c dsi_handle_error(dsi, &ret, stat, dsi 1345 drivers/gpu/drm/vc4/vc4_dsi.c dsi_handle_error(dsi, &ret, stat, dsi 1347 drivers/gpu/drm/vc4/vc4_dsi.c dsi_handle_error(dsi, &ret, stat, dsi 1349 drivers/gpu/drm/vc4/vc4_dsi.c dsi_handle_error(dsi, &ret, stat, dsi 1351 drivers/gpu/drm/vc4/vc4_dsi.c dsi_handle_error(dsi, &ret, stat, dsi 1353 drivers/gpu/drm/vc4/vc4_dsi.c dsi_handle_error(dsi, &ret, stat, dsi 1355 drivers/gpu/drm/vc4/vc4_dsi.c dsi_handle_error(dsi, &ret, stat, dsi 1357 drivers/gpu/drm/vc4/vc4_dsi.c dsi_handle_error(dsi, &ret, stat, dsi 1361 drivers/gpu/drm/vc4/vc4_dsi.c complete(&dsi->xfer_completion); dsi 1364 drivers/gpu/drm/vc4/vc4_dsi.c complete(&dsi->xfer_completion); dsi 1365 drivers/gpu/drm/vc4/vc4_dsi.c dsi->xfer_result = -ETIMEDOUT; dsi 1378 drivers/gpu/drm/vc4/vc4_dsi.c vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi) dsi 1380 drivers/gpu/drm/vc4/vc4_dsi.c struct device *dev = &dsi->pdev->dev; dsi 1381 drivers/gpu/drm/vc4/vc4_dsi.c const char *parent_name = __clk_get_name(dsi->pll_phy_clock); dsi 1392 drivers/gpu/drm/vc4/vc4_dsi.c dsi->clk_onecell = devm_kzalloc(dev, dsi 1393 drivers/gpu/drm/vc4/vc4_dsi.c sizeof(*dsi->clk_onecell) + dsi 1397 drivers/gpu/drm/vc4/vc4_dsi.c if (!dsi->clk_onecell) dsi 1399 drivers/gpu/drm/vc4/vc4_dsi.c dsi->clk_onecell->num = ARRAY_SIZE(phy_clocks); dsi 1402 drivers/gpu/drm/vc4/vc4_dsi.c struct clk_fixed_factor *fix = &dsi->phy_clocks[i]; dsi 1422 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->port == 1) dsi 1432 drivers/gpu/drm/vc4/vc4_dsi.c dsi->clk_onecell->hws[i] = &fix->hw; dsi 1437 drivers/gpu/drm/vc4/vc4_dsi.c dsi->clk_onecell); dsi 1445 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi = dev_get_drvdata(dev); dsi 1456 drivers/gpu/drm/vc4/vc4_dsi.c dsi->port = (uintptr_t)match->data; dsi 1463 drivers/gpu/drm/vc4/vc4_dsi.c vc4_dsi_encoder->dsi = dsi; dsi 1464 drivers/gpu/drm/vc4/vc4_dsi.c dsi->encoder = &vc4_dsi_encoder->base.base; dsi 1466 drivers/gpu/drm/vc4/vc4_dsi.c dsi->regs = vc4_ioremap_regs(pdev, 0); dsi 1467 drivers/gpu/drm/vc4/vc4_dsi.c if (IS_ERR(dsi->regs)) dsi 1468 drivers/gpu/drm/vc4/vc4_dsi.c return PTR_ERR(dsi->regs); dsi 1470 drivers/gpu/drm/vc4/vc4_dsi.c dsi->regset.base = dsi->regs; dsi 1471 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->port == 0) { dsi 1472 drivers/gpu/drm/vc4/vc4_dsi.c dsi->regset.regs = dsi0_regs; dsi 1473 drivers/gpu/drm/vc4/vc4_dsi.c dsi->regset.nregs = ARRAY_SIZE(dsi0_regs); dsi 1475 drivers/gpu/drm/vc4/vc4_dsi.c dsi->regset.regs = dsi1_regs; dsi 1476 drivers/gpu/drm/vc4/vc4_dsi.c dsi->regset.nregs = ARRAY_SIZE(dsi1_regs); dsi 1489 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->port == 1) { dsi 1490 drivers/gpu/drm/vc4/vc4_dsi.c dsi->reg_dma_mem = dma_alloc_coherent(dev, 4, dsi 1491 drivers/gpu/drm/vc4/vc4_dsi.c &dsi->reg_dma_paddr, dsi 1493 drivers/gpu/drm/vc4/vc4_dsi.c if (!dsi->reg_dma_mem) { dsi 1500 drivers/gpu/drm/vc4/vc4_dsi.c dsi->reg_dma_chan = dma_request_chan_by_mask(&dma_mask); dsi 1501 drivers/gpu/drm/vc4/vc4_dsi.c if (IS_ERR(dsi->reg_dma_chan)) { dsi 1502 drivers/gpu/drm/vc4/vc4_dsi.c ret = PTR_ERR(dsi->reg_dma_chan); dsi 1513 drivers/gpu/drm/vc4/vc4_dsi.c dsi->reg_paddr = be32_to_cpup(of_get_address(dev->of_node, dsi 1517 drivers/gpu/drm/vc4/vc4_dsi.c init_completion(&dsi->xfer_completion); dsi 1523 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->reg_dma_mem) dsi 1528 drivers/gpu/drm/vc4/vc4_dsi.c "vc4 dsi", dsi); dsi 1531 drivers/gpu/drm/vc4/vc4_dsi.c vc4_dsi_irq_handler, 0, "vc4 dsi", dsi); dsi 1538 drivers/gpu/drm/vc4/vc4_dsi.c dsi->escape_clock = devm_clk_get(dev, "escape"); dsi 1539 drivers/gpu/drm/vc4/vc4_dsi.c if (IS_ERR(dsi->escape_clock)) { dsi 1540 drivers/gpu/drm/vc4/vc4_dsi.c ret = PTR_ERR(dsi->escape_clock); dsi 1546 drivers/gpu/drm/vc4/vc4_dsi.c dsi->pll_phy_clock = devm_clk_get(dev, "phy"); dsi 1547 drivers/gpu/drm/vc4/vc4_dsi.c if (IS_ERR(dsi->pll_phy_clock)) { dsi 1548 drivers/gpu/drm/vc4/vc4_dsi.c ret = PTR_ERR(dsi->pll_phy_clock); dsi 1554 drivers/gpu/drm/vc4/vc4_dsi.c dsi->pixel_clock = devm_clk_get(dev, "pixel"); dsi 1555 drivers/gpu/drm/vc4/vc4_dsi.c if (IS_ERR(dsi->pixel_clock)) { dsi 1556 drivers/gpu/drm/vc4/vc4_dsi.c ret = PTR_ERR(dsi->pixel_clock); dsi 1563 drivers/gpu/drm/vc4/vc4_dsi.c &panel, &dsi->bridge); dsi 1578 drivers/gpu/drm/vc4/vc4_dsi.c dsi->bridge = devm_drm_panel_bridge_add(dev, panel, dsi 1580 drivers/gpu/drm/vc4/vc4_dsi.c if (IS_ERR(dsi->bridge)) dsi 1581 drivers/gpu/drm/vc4/vc4_dsi.c return PTR_ERR(dsi->bridge); dsi 1585 drivers/gpu/drm/vc4/vc4_dsi.c ret = clk_set_rate(dsi->escape_clock, 100 * 1000000); dsi 1591 drivers/gpu/drm/vc4/vc4_dsi.c ret = vc4_dsi_init_phy_clocks(dsi); dsi 1595 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->port == 1) dsi 1596 drivers/gpu/drm/vc4/vc4_dsi.c vc4->dsi1 = dsi; dsi 1598 drivers/gpu/drm/vc4/vc4_dsi.c drm_encoder_init(drm, dsi->encoder, &vc4_dsi_encoder_funcs, dsi 1600 drivers/gpu/drm/vc4/vc4_dsi.c drm_encoder_helper_add(dsi->encoder, &vc4_dsi_encoder_helper_funcs); dsi 1602 drivers/gpu/drm/vc4/vc4_dsi.c ret = drm_bridge_attach(dsi->encoder, dsi->bridge, NULL); dsi 1612 drivers/gpu/drm/vc4/vc4_dsi.c dsi->encoder->bridge = NULL; dsi 1614 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->port == 0) dsi 1615 drivers/gpu/drm/vc4/vc4_dsi.c vc4_debugfs_add_regset32(drm, "dsi0_regs", &dsi->regset); dsi 1617 drivers/gpu/drm/vc4/vc4_dsi.c vc4_debugfs_add_regset32(drm, "dsi1_regs", &dsi->regset); dsi 1629 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi = dev_get_drvdata(dev); dsi 1631 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->bridge) dsi 1634 drivers/gpu/drm/vc4/vc4_dsi.c vc4_dsi_encoder_destroy(dsi->encoder); dsi 1636 drivers/gpu/drm/vc4/vc4_dsi.c if (dsi->port == 1) dsi 1648 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi; dsi 1651 drivers/gpu/drm/vc4/vc4_dsi.c dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); dsi 1652 drivers/gpu/drm/vc4/vc4_dsi.c if (!dsi) dsi 1654 drivers/gpu/drm/vc4/vc4_dsi.c dev_set_drvdata(dev, dsi); dsi 1656 drivers/gpu/drm/vc4/vc4_dsi.c dsi->pdev = pdev; dsi 1667 drivers/gpu/drm/vc4/vc4_dsi.c dsi->dsi_host.ops = &vc4_dsi_host_ops; dsi 1668 drivers/gpu/drm/vc4/vc4_dsi.c dsi->dsi_host.dev = dev; dsi 1669 drivers/gpu/drm/vc4/vc4_dsi.c mipi_dsi_host_register(&dsi->dsi_host); dsi 1673 drivers/gpu/drm/vc4/vc4_dsi.c mipi_dsi_host_unregister(&dsi->dsi_host); dsi 1683 drivers/gpu/drm/vc4/vc4_dsi.c struct vc4_dsi *dsi = dev_get_drvdata(dev); dsi 1686 drivers/gpu/drm/vc4/vc4_dsi.c mipi_dsi_host_unregister(&dsi->dsi_host); dsi 1581 drivers/pinctrl/actions/pinctrl-s700.c [S700_MUX_DSI] = FUNCTION(dsi), dsi 1586 drivers/pinctrl/actions/pinctrl-s700.c [S700_MUX_DSI] = FUNCTION(dsi), dsi 112 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->dcs_read(in, ddata->channel, dcs_cmd, buf, 1); dsi 125 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c return in->ops.dsi->dcs_write(in, ddata->channel, &dcs_cmd, 1); dsi 133 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c return in->ops.dsi->dcs_write(in, ddata->channel, buf, 2); dsi 146 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->dcs_write_nosync(in, ddata->channel, &cmd, 1); dsi 208 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->dcs_write_nosync(in, ddata->channel, buf, sizeof(buf)); dsi 218 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->dcs_write_nosync(in, ddata->channel, buf, sizeof(buf)); dsi 222 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bta_sync(in, ddata->channel); dsi 256 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->disable(in, false, true); dsi 281 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->enable(in); dsi 287 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->enable_hs(in, ddata->channel, true); dsi 347 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 353 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 395 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 402 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 426 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 432 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 461 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 468 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 511 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 513 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 589 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->configure_pins(in, &ddata->pin_config); dsi 597 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->set_config(in, &dsi_config); dsi 603 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->enable(in); dsi 611 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->enable_hs(in, ddata->channel, false); dsi 643 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->enable_video_output(in, ddata->channel); dsi 655 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->enable_hs(in, ddata->channel, true); dsi 663 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->disable(in, true, false); dsi 673 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->disable_video_output(in, ddata->channel); dsi 685 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->disable(in, true, false); dsi 709 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->connect(in, dssdev); dsi 715 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->request_vc(ddata->in, &ddata->channel); dsi 721 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->set_vc_id(ddata->in, ddata->channel, TCH); dsi 730 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->release_vc(ddata->in, ddata->channel); dsi 732 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->disconnect(in, dssdev); dsi 744 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->release_vc(in, ddata->channel); dsi 745 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->disconnect(in, dssdev); dsi 768 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 772 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 800 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 808 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 821 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(ddata->in); dsi 836 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->update(in, ddata->channel, dsicm_framedone_cb, dsi 845 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 858 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 871 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 894 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->update(in, ddata->channel, dsicm_framedone_cb, dsi 904 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 917 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 918 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 937 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->enable_te(in, enable); dsi 956 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 970 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 976 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 1019 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 1035 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->set_max_rx_packet_size(in, ddata->channel, plen); dsi 1043 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c r = in->ops.dsi->dcs_read(in, ddata->channel, dcs_cmd, dsi 1069 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->set_max_rx_packet_size(in, ddata->channel, 1); dsi 1071 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 1091 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_lock(in); dsi 1095 drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c in->ops.dsi->bus_unlock(in); dsi 434 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 438 drivers/video/fbdev/omap2/omapfb/dss/dsi.c case DSI_PROTO: base = dsi->proto_base; break; dsi 439 drivers/video/fbdev/omap2/omapfb/dss/dsi.c case DSI_PHY: base = dsi->phy_base; break; dsi 440 drivers/video/fbdev/omap2/omapfb/dss/dsi.c case DSI_PLL: base = dsi->pll_base; break; dsi 450 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 454 drivers/video/fbdev/omap2/omapfb/dss/dsi.c case DSI_PROTO: base = dsi->proto_base; break; dsi 455 drivers/video/fbdev/omap2/omapfb/dss/dsi.c case DSI_PHY: base = dsi->phy_base; break; dsi 456 drivers/video/fbdev/omap2/omapfb/dss/dsi.c case DSI_PLL: base = dsi->pll_base; break; dsi 466 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 468 drivers/video/fbdev/omap2/omapfb/dss/dsi.c down(&dsi->bus_lock); dsi 474 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 476 drivers/video/fbdev/omap2/omapfb/dss/dsi.c up(&dsi->bus_lock); dsi 481 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 483 drivers/video/fbdev/omap2/omapfb/dss/dsi.c return dsi->bus_lock.count == 0; dsi 538 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 539 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->perf_setup_time = ktime_get(); dsi 544 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 545 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->perf_start_time = ktime_get(); dsi 550 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 560 drivers/video/fbdev/omap2/omapfb/dss/dsi.c setup_time = ktime_sub(dsi->perf_start_time, dsi->perf_setup_time); dsi 565 drivers/video/fbdev/omap2/omapfb/dss/dsi.c trans_time = ktime_sub(t, dsi->perf_start_time); dsi 572 drivers/video/fbdev/omap2/omapfb/dss/dsi.c total_bytes = dsi->update_bytes; dsi 694 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 697 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock(&dsi->irq_stats_lock); dsi 699 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->irq_stats.irq_count++; dsi 700 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_collect_irq_stats(irqstatus, dsi->irq_stats.dsi_irqs); dsi 703 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_collect_irq_stats(vcstatus[i], dsi->irq_stats.vc_irqs[i]); dsi 705 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_collect_irq_stats(ciostatus, dsi->irq_stats.cio_irqs); dsi 707 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock(&dsi->irq_stats_lock); dsi 718 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 724 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock(&dsi->errors_lock); dsi 725 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->errors |= irqstatus & DSI_IRQ_ERROR_MASK; dsi 726 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock(&dsi->errors_lock); dsi 788 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi; dsi 793 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi = dsi_get_dsidrv_data(dsidev); dsi 795 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (!dsi->is_enabled) dsi 798 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock(&dsi->irq_lock); dsi 804 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock(&dsi->irq_lock); dsi 837 drivers/video/fbdev/omap2/omapfb/dss/dsi.c del_timer(&dsi->te_timer); dsi 842 drivers/video/fbdev/omap2/omapfb/dss/dsi.c memcpy(&dsi->isr_tables_copy, &dsi->isr_tables, dsi 843 drivers/video/fbdev/omap2/omapfb/dss/dsi.c sizeof(dsi->isr_tables)); dsi 845 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock(&dsi->irq_lock); dsi 847 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi_handle_isrs(&dsi->isr_tables_copy, irqstatus, vcstatus, ciostatus); dsi 892 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 897 drivers/video/fbdev/omap2/omapfb/dss/dsi.c _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table, dsi 898 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table), mask, dsi 905 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 907 drivers/video/fbdev/omap2/omapfb/dss/dsi.c _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table_vc[vc], dsi 908 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc]), dsi 916 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 918 drivers/video/fbdev/omap2/omapfb/dss/dsi.c _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table_cio, dsi 919 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_cio), dsi 926 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 930 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 932 drivers/video/fbdev/omap2/omapfb/dss/dsi.c memset(&dsi->isr_tables, 0, sizeof(dsi->isr_tables)); dsi 939 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1001 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1005 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1007 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table, dsi 1008 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table)); dsi 1013 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1021 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1025 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1027 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table, dsi 1028 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table)); dsi 1033 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1041 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1045 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1048 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->isr_tables.isr_table_vc[channel], dsi 1049 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); dsi 1054 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1062 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1066 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1069 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->isr_tables.isr_table_vc[channel], dsi 1070 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); dsi 1075 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1083 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1087 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1089 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, dsi 1090 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); dsi 1095 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1103 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1107 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_irqsave(&dsi->irq_lock, flags); dsi 1109 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, dsi 1110 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); dsi 1115 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_lock, flags); dsi 1122 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1125 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_irqsave(&dsi->errors_lock, flags); dsi 1126 drivers/video/fbdev/omap2/omapfb/dss/dsi.c e = dsi->errors; dsi 1127 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->errors = 0; dsi 1128 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock_irqrestore(&dsi->errors_lock, flags); dsi 1135 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1139 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = pm_runtime_get_sync(&dsi->pdev->dev); dsi 1146 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1151 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = pm_runtime_put_sync(&dsi->pdev->dev); dsi 1157 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1160 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->vdds_dsi_reg != NULL) dsi 1163 drivers/video/fbdev/omap2/omapfb/dss/dsi.c vdds_dsi = devm_regulator_get(&dsi->pdev->dev, "vdd"); dsi 1171 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vdds_dsi_reg = vdds_dsi; dsi 1229 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1231 drivers/video/fbdev/omap2/omapfb/dss/dsi.c return dsi->pll.cinfo.clkout[HSDIV_DISPC]; dsi 1236 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1238 drivers/video/fbdev/omap2/omapfb/dss/dsi.c return dsi->pll.cinfo.clkout[HSDIV_DSI]; dsi 1243 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1245 drivers/video/fbdev/omap2/omapfb/dss/dsi.c return dsi->pll.cinfo.clkdco / 16; dsi 1251 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1253 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dss_get_dsi_clk_source(dsi->module_id) == OMAP_DSS_CLK_SRC_FCK) { dsi 1255 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = clk_get_rate(dsi->dss_clk); dsi 1285 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1292 drivers/video/fbdev/omap2/omapfb/dss/dsi.c lp_clk_div = dsi->user_lp_cinfo.lp_clk_div; dsi 1302 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->current_lp_cinfo.lp_clk = lp_clk; dsi 1303 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->current_lp_cinfo.lp_clk_div = lp_clk_div; dsi 1316 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1318 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->scp_clk_refcount++ == 0) dsi 1324 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1326 drivers/video/fbdev/omap2/omapfb/dss/dsi.c WARN_ON(dsi->scp_clk_refcount == 0); dsi 1327 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (--dsi->scp_clk_refcount == 0) dsi 1377 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = container_of(pll, struct dsi_data, pll); dsi 1378 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct platform_device *dsidev = dsi->pdev; dsi 1396 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (!dsi->vdds_dsi_enabled) { dsi 1397 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = regulator_enable(dsi->vdds_dsi_reg); dsi 1400 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vdds_dsi_enabled = true; dsi 1426 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->vdds_dsi_enabled) { dsi 1427 drivers/video/fbdev/omap2/omapfb/dss/dsi.c regulator_disable(dsi->vdds_dsi_reg); dsi 1428 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vdds_dsi_enabled = false; dsi 1438 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1442 drivers/video/fbdev/omap2/omapfb/dss/dsi.c WARN_ON(!dsi->vdds_dsi_enabled); dsi 1443 drivers/video/fbdev/omap2/omapfb/dss/dsi.c regulator_disable(dsi->vdds_dsi_reg); dsi 1444 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vdds_dsi_enabled = false; dsi 1455 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = container_of(pll, struct dsi_data, pll); dsi 1456 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct platform_device *dsidev = dsi->pdev; dsi 1464 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1465 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo; dsi 1467 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int dsi_module = dsi->module_id; dsi 1468 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dss_pll *pll = &dsi->pll; dsi 1516 drivers/video/fbdev/omap2/omapfb/dss/dsi.c seq_printf(s, "LP_CLK\t\t%lu\n", dsi->current_lp_cinfo.lp_clk); dsi 1537 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1541 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_irqsave(&dsi->irq_stats_lock, flags); dsi 1543 drivers/video/fbdev/omap2/omapfb/dss/dsi.c stats = dsi->irq_stats; dsi 1544 drivers/video/fbdev/omap2/omapfb/dss/dsi.c memset(&dsi->irq_stats, 0, sizeof(dsi->irq_stats)); dsi 1545 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->irq_stats.last_reset = jiffies; dsi 1547 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_unlock_irqrestore(&dsi->irq_stats_lock, flags); dsi 1556 drivers/video/fbdev/omap2/omapfb/dss/dsi.c seq_printf(s, "-- DSI%d interrupts --\n", dsi->module_id + 1); dsi 1800 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1814 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (i = 0; i < dsi->num_lanes_used; ++i) { dsi 1819 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (t = 0; t < dsi->num_lanes_supported; ++t) dsi 1820 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->lanes[t].function == functions[i]) dsi 1823 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (t == dsi->num_lanes_supported) dsi 1827 drivers/video/fbdev/omap2/omapfb/dss/dsi.c polarity = dsi->lanes[t].polarity; dsi 1834 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (; i < dsi->num_lanes_supported; ++i) { dsi 1848 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1851 drivers/video/fbdev/omap2/omapfb/dss/dsi.c unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; dsi 1857 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1859 drivers/video/fbdev/omap2/omapfb/dss/dsi.c unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; dsi 1944 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 1947 drivers/video/fbdev/omap2/omapfb/dss/dsi.c u8 lptxscp_start = dsi->num_lanes_supported == 3 ? 22 : 26; dsi 1951 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 1952 drivers/video/fbdev/omap2/omapfb/dss/dsi.c unsigned p = dsi->lanes[i].polarity; dsi 1992 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2004 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) dsi 2005 drivers/video/fbdev/omap2/omapfb/dss/dsi.c in_use[i] = dsi->lanes[i].function != DSI_LANE_UNUSED; dsi 2015 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 2020 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (ok == dsi->num_lanes_supported) dsi 2024 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 2041 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2045 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 2046 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->lanes[i].function != DSI_LANE_UNUSED) dsi 2055 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2061 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = dss_dsi_enable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); dsi 2090 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->ulps_enabled) { dsi 2107 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 2108 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->lanes[i].function == DSI_LANE_UNUSED) dsi 2134 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->ulps_enabled) { dsi 2150 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 2153 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vm_timings.ddr_clk_always_on, 13, 13); dsi 2156 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->ulps_enabled = false; dsi 2167 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->ulps_enabled) dsi 2171 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_dsi_disable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); dsi 2177 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2184 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_dsi_disable_pads(dsi->module_id, dsi_get_lane_mask(dsidev)); dsi 2191 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2196 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[0].tx_fifo_size = size1; dsi 2197 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[1].tx_fifo_size = size2; dsi 2198 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[2].tx_fifo_size = size3; dsi 2199 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[3].tx_fifo_size = size4; dsi 2203 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int size = dsi->vc[i].tx_fifo_size; dsi 2224 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2229 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[0].rx_fifo_size = size1; dsi 2230 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[1].rx_fifo_size = size2; dsi 2231 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[2].rx_fifo_size = size3; dsi 2232 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[3].rx_fifo_size = size4; dsi 2236 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int size = dsi->vc[i].rx_fifo_size; dsi 2278 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(vp_data->dsidev); dsi 2279 drivers/video/fbdev/omap2/omapfb/dss/dsi.c const int channel = dsi->update_channel; dsi 2280 drivers/video/fbdev/omap2/omapfb/dss/dsi.c u8 bit = dsi->te_enabled ? 30 : 31; dsi 2288 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2297 drivers/video/fbdev/omap2/omapfb/dss/dsi.c bit = dsi->te_enabled ? 30 : 31; dsi 2329 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(l4_data->dsidev); dsi 2330 drivers/video/fbdev/omap2/omapfb/dss/dsi.c const int channel = dsi->update_channel; dsi 2373 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2382 drivers/video/fbdev/omap2/omapfb/dss/dsi.c switch (dsi->vc[channel].source) { dsi 2414 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2440 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[channel].source = DSI_VC_SOURCE_L4; dsi 2446 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2448 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->vc[channel].source == source) dsi 2474 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[channel].source = source; dsi 2483 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2500 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->vm_timings.ddr_clk_always_on && enable) dsi 2586 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2588 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_write || dsi->debug_read) dsi 2654 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2660 drivers/video/fbdev/omap2/omapfb/dss/dsi.c data_id = data_type | dsi->vc[channel].vc_id << 6; dsi 2685 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2691 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_write) dsi 2695 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->vc[channel].tx_fifo_size * 32 * 4 < len + 4) { dsi 2706 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_write) dsi 2721 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_write) dsi 2748 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2754 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_write) dsi 2766 drivers/video/fbdev/omap2/omapfb/dss/dsi.c data_id = data_type | dsi->vc[channel].vc_id << 6; dsi 2877 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2880 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_read) dsi 2897 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2902 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_read) dsi 2933 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 2946 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_read) dsi 2959 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_read) dsi 2976 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_read) dsi 2995 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_read) dsi 3010 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->debug_read) dsi 3107 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3116 drivers/video/fbdev/omap2/omapfb/dss/dsi.c WARN_ON(dsi->ulps_enabled); dsi 3118 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->ulps_enabled) dsi 3157 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (i = 0; i < dsi->num_lanes_supported; ++i) { dsi 3158 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->lanes[i].function == DSI_LANE_UNUSED) dsi 3189 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->ulps_enabled = true; dsi 3309 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3312 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3313 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int bpp = dsi_get_pixel_size(dsi->pix_fmt); dsi 3314 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct omap_video_timings *timings = &dsi->timings; dsi 3319 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->line_buffer_size <= timings->x_res * bpp / 8) dsi 3334 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3338 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE) dsi 3356 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3357 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int blanking_mode = dsi->vm_timings.blanking_mode; dsi 3358 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int hfp_blanking_mode = dsi->vm_timings.hfp_blanking_mode; dsi 3359 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int hbp_blanking_mode = dsi->vm_timings.hbp_blanking_mode; dsi 3360 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int hsa_blanking_mode = dsi->vm_timings.hsa_blanking_mode; dsi 3439 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3446 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct omap_video_timings *timings = &dsi->timings; dsi 3447 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int bpp = dsi_get_pixel_size(dsi->pix_fmt); dsi 3448 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int ndl = dsi->num_lanes_used - 1; dsi 3449 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int dsi_fclk_hsdiv = dsi->user_dsi_cinfo.mX[HSDIV_DSI] + 1; dsi 3556 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3576 drivers/video/fbdev/omap2/omapfb/dss/dsi.c switch (dsi_get_pixel_size(dsi->pix_fmt)) { dsi 3610 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3626 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3634 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int ndl = dsi->num_lanes_used - 1; dsi 3688 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3690 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int hsa = dsi->vm_timings.hsa; dsi 3691 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int hfp = dsi->vm_timings.hfp; dsi 3692 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int hbp = dsi->vm_timings.hbp; dsi 3693 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int vsa = dsi->vm_timings.vsa; dsi 3694 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int vfp = dsi->vm_timings.vfp; dsi 3695 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int vbp = dsi->vm_timings.vbp; dsi 3696 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int window_sync = dsi->vm_timings.window_sync; dsi 3698 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct omap_video_timings *timings = &dsi->timings; dsi 3699 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int bpp = dsi_get_pixel_size(dsi->pix_fmt); dsi 3702 drivers/video/fbdev/omap2/omapfb/dss/dsi.c hsync_end = dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE; dsi 3741 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3759 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (num_pins < 4 || num_pins > dsi->num_lanes_supported * 2 dsi 3775 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dx < 0 || dx >= dsi->num_lanes_supported * 2) dsi 3778 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dy < 0 || dy >= dsi->num_lanes_supported * 2) dsi 3798 drivers/video/fbdev/omap2/omapfb/dss/dsi.c memcpy(dsi->lanes, lanes, sizeof(dsi->lanes)); dsi 3799 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->num_lanes_used = num_lanes; dsi 3807 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3808 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct omap_overlay_manager *mgr = dsi->output.manager; dsi 3809 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int bpp = dsi_get_pixel_size(dsi->pix_fmt); dsi 3810 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct omap_dss_device *out = &dsi->output; dsi 3824 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3825 drivers/video/fbdev/omap2/omapfb/dss/dsi.c switch (dsi->pix_fmt) { dsi 3849 drivers/video/fbdev/omap2/omapfb/dss/dsi.c word_count = DIV_ROUND_UP(dsi->timings.x_res * bpp, 8); dsi 3865 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3878 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3879 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct omap_overlay_manager *mgr = dsi->output.manager; dsi 3881 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_VIDEO_MODE) { dsi 3899 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3900 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct omap_overlay_manager *mgr = dsi->output.manager; dsi 3909 drivers/video/fbdev/omap2/omapfb/dss/dsi.c const unsigned channel = dsi->update_channel; dsi 3910 drivers/video/fbdev/omap2/omapfb/dss/dsi.c const unsigned line_buf_size = dsi->line_buffer_size; dsi 3911 drivers/video/fbdev/omap2/omapfb/dss/dsi.c u16 w = dsi->timings.x_res; dsi 3912 drivers/video/fbdev/omap2/omapfb/dss/dsi.c u16 h = dsi->timings.y_res; dsi 3918 drivers/video/fbdev/omap2/omapfb/dss/dsi.c bytespp = dsi_get_pixel_size(dsi->pix_fmt) / 8; dsi 3942 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->te_enabled) dsi 3958 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = schedule_delayed_work(&dsi->framedone_timeout_work, dsi 3962 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_mgr_set_timings(mgr, &dsi->timings); dsi 3966 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->te_enabled) { dsi 3974 drivers/video/fbdev/omap2/omapfb/dss/dsi.c mod_timer(&dsi->te_timer, jiffies + msecs_to_jiffies(250)); dsi 3988 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 3993 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->te_enabled) { dsi 3998 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->framedone_callback(error, dsi->framedone_data); dsi 4006 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = container_of(work, struct dsi_data, dsi 4017 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi_handle_framedone(dsi->pdev, -ETIMEDOUT); dsi 4023 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4030 drivers/video/fbdev/omap2/omapfb/dss/dsi.c cancel_delayed_work(&dsi->framedone_timeout_work); dsi 4039 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4044 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->update_channel = channel; dsi 4046 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->framedone_callback = callback; dsi 4047 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->framedone_data = data; dsi 4049 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dw = dsi->timings.x_res; dsi 4050 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dh = dsi->timings.y_res; dsi 4053 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->update_bytes = dw * dh * dsi 4054 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi_get_pixel_size(dsi->pix_fmt) / 8; dsi 4065 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4072 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dispc_cinfo.lck_div = dsi->user_dispc_cinfo.lck_div; dsi 4073 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dispc_cinfo.pck_div = dsi->user_dispc_cinfo.pck_div; dsi 4081 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->mgr_config.clock_info = dispc_cinfo; dsi 4089 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4092 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_select_lcd_clk_source(mgr->id, dsi->module_id == 0 ? dsi 4096 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) { dsi 4104 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->mgr_config.stallmode = true; dsi 4105 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->mgr_config.fifohandcheck = true; dsi 4107 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->mgr_config.stallmode = false; dsi 4108 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->mgr_config.fifohandcheck = false; dsi 4115 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->timings.interlace = false; dsi 4116 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH; dsi 4117 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH; dsi 4118 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; dsi 4119 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH; dsi 4120 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE; dsi 4122 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_mgr_set_timings(mgr, &dsi->timings); dsi 4128 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS; dsi 4129 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->mgr_config.video_port_width = dsi 4130 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi_get_pixel_size(dsi->pix_fmt); dsi 4131 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->mgr_config.lcden_sig_polarity = 0; dsi 4133 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_mgr_set_lcd_config(mgr, &dsi->mgr_config); dsi 4137 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) dsi 4148 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4150 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) dsi 4159 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4163 drivers/video/fbdev/omap2/omapfb/dss/dsi.c cinfo = dsi->user_dsi_cinfo; dsi 4165 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = dss_pll_set_config(&dsi->pll, &cinfo); dsi 4176 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4179 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = dss_pll_enable(&dsi->pll); dsi 4187 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_select_dsi_clk_source(dsi->module_id, dsi->module_id == 0 ? dsi 4221 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); dsi 4223 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_pll_disable(&dsi->pll); dsi 4231 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4233 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (enter_ulps && !dsi->ulps_enabled) dsi 4243 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); dsi 4251 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4258 drivers/video/fbdev/omap2/omapfb/dss/dsi.c mutex_lock(&dsi->lock); dsi 4270 drivers/video/fbdev/omap2/omapfb/dss/dsi.c mutex_unlock(&dsi->lock); dsi 4277 drivers/video/fbdev/omap2/omapfb/dss/dsi.c mutex_unlock(&dsi->lock); dsi 4286 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4292 drivers/video/fbdev/omap2/omapfb/dss/dsi.c mutex_lock(&dsi->lock); dsi 4303 drivers/video/fbdev/omap2/omapfb/dss/dsi.c mutex_unlock(&dsi->lock); dsi 4309 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4311 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->te_enabled = enable; dsi 4449 drivers/video/fbdev/omap2/omapfb/dss/dsi.c static bool dsi_cm_calc(struct dsi_data *dsi, dsi 4458 drivers/video/fbdev/omap2/omapfb/dss/dsi.c clkin = clk_get_rate(dsi->pll.clkin); dsi 4460 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ndl = dsi->num_lanes_used - 1; dsi 4473 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ctx->dsidev = dsi->pdev; dsi 4474 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ctx->pll = &dsi->pll; dsi 4490 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(ctx->dsidev); dsi 4493 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int ndl = dsi->num_lanes_used - 1; dsi 4529 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->line_buffer_size < xres * bitspp / 8) { dsi 4747 drivers/video/fbdev/omap2/omapfb/dss/dsi.c static bool dsi_vm_calc(struct dsi_data *dsi, dsi 4755 drivers/video/fbdev/omap2/omapfb/dss/dsi.c int ndl = dsi->num_lanes_used - 1; dsi 4759 drivers/video/fbdev/omap2/omapfb/dss/dsi.c clkin = clk_get_rate(dsi->pll.clkin); dsi 4762 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ctx->dsidev = dsi->pdev; dsi 4763 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ctx->pll = &dsi->pll; dsi 4793 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4798 drivers/video/fbdev/omap2/omapfb/dss/dsi.c mutex_lock(&dsi->lock); dsi 4800 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->pix_fmt = config->pixel_format; dsi 4801 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->mode = config->mode; dsi 4804 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ok = dsi_vm_calc(dsi, config, &ctx); dsi 4806 drivers/video/fbdev/omap2/omapfb/dss/dsi.c ok = dsi_cm_calc(dsi, config, &ctx); dsi 4817 drivers/video/fbdev/omap2/omapfb/dss/dsi.c config->lp_clk_min, config->lp_clk_max, &dsi->user_lp_cinfo); dsi 4823 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->user_dsi_cinfo = ctx.dsi_cinfo; dsi 4824 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->user_dispc_cinfo = ctx.dispc_cinfo; dsi 4826 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->timings = ctx.dispc_vm; dsi 4827 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vm_timings = ctx.dsi_vm; dsi 4829 drivers/video/fbdev/omap2/omapfb/dss/dsi.c mutex_unlock(&dsi->lock); dsi 4833 drivers/video/fbdev/omap2/omapfb/dss/dsi.c mutex_unlock(&dsi->lock); dsi 4891 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4894 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { dsi 4895 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (!dsi->vc[i].dssdev) { dsi 4896 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[i].dssdev = dssdev; dsi 4909 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4921 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->vc[channel].dssdev != dssdev) { dsi 4927 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[channel].vc_id = vc_id; dsi 4935 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4938 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[channel].dssdev == dssdev) { dsi 4939 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[channel].dssdev = NULL; dsi 4940 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[channel].vc_id = 0; dsi 4947 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 4956 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->dss_clk = clk; dsi 5046 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 5047 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct omap_dss_device *out = &dsi->output; dsi 5050 drivers/video/fbdev/omap2/omapfb/dss/dsi.c out->id = dsi->module_id == 0 ? dsi 5054 drivers/video/fbdev/omap2/omapfb/dss/dsi.c out->name = dsi->module_id == 0 ? "dsi.0" : "dsi.1"; dsi 5055 drivers/video/fbdev/omap2/omapfb/dss/dsi.c out->dispc_channel = dsi_get_channel(dsi->module_id); dsi 5056 drivers/video/fbdev/omap2/omapfb/dss/dsi.c out->ops.dsi = &dsi_ops; dsi 5064 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 5065 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct omap_dss_device *out = &dsi->output; dsi 5073 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(pdev); dsi 5095 drivers/video/fbdev/omap2/omapfb/dss/dsi.c num_pins > dsi->num_lanes_supported * 2) { dsi 5111 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = dsi_configure_pins(&dsi->output, &pin_cfg); dsi 5209 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 5210 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dss_pll *pll = &dsi->pll; dsi 5220 drivers/video/fbdev/omap2/omapfb/dss/dsi.c pll->name = dsi->module_id == 0 ? "dsi0" : "dsi1"; dsi 5221 drivers/video/fbdev/omap2/omapfb/dss/dsi.c pll->id = dsi->module_id == 0 ? DSS_PLL_DSI1 : DSS_PLL_DSI2; dsi 5223 drivers/video/fbdev/omap2/omapfb/dss/dsi.c pll->base = dsi->pll_base; dsi 5262 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi; dsi 5267 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi = devm_kzalloc(&dsidev->dev, sizeof(*dsi), GFP_KERNEL); dsi 5268 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (!dsi) dsi 5271 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->pdev = dsidev; dsi 5272 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dev_set_drvdata(&dsidev->dev, dsi); dsi 5274 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_init(&dsi->irq_lock); dsi 5275 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_init(&dsi->errors_lock); dsi 5276 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->errors = 0; dsi 5279 drivers/video/fbdev/omap2/omapfb/dss/dsi.c spin_lock_init(&dsi->irq_stats_lock); dsi 5280 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->irq_stats.last_reset = jiffies; dsi 5283 drivers/video/fbdev/omap2/omapfb/dss/dsi.c mutex_init(&dsi->lock); dsi 5284 drivers/video/fbdev/omap2/omapfb/dss/dsi.c sema_init(&dsi->bus_lock, 1); dsi 5286 drivers/video/fbdev/omap2/omapfb/dss/dsi.c INIT_DEFERRABLE_WORK(&dsi->framedone_timeout_work, dsi 5290 drivers/video/fbdev/omap2/omapfb/dss/dsi.c timer_setup(&dsi->te_timer, dsi_te_timeout, 0); dsi 5308 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->proto_base = devm_ioremap(&dsidev->dev, res->start, dsi 5310 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (!dsi->proto_base) { dsi 5328 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->phy_base = devm_ioremap(&dsidev->dev, res->start, dsi 5330 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (!dsi->phy_base) { dsi 5348 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->pll_base = devm_ioremap(&dsidev->dev, res->start, dsi 5350 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (!dsi->pll_base) { dsi 5355 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->irq = platform_get_irq(dsi->pdev, 0); dsi 5356 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->irq < 0) { dsi 5361 drivers/video/fbdev/omap2/omapfb/dss/dsi.c r = devm_request_irq(&dsidev->dev, dsi->irq, omap_dsi_irq_handler, dsi 5362 drivers/video/fbdev/omap2/omapfb/dss/dsi.c IRQF_SHARED, dev_name(&dsidev->dev), dsi->pdev); dsi 5388 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->module_id = d->id; dsi 5390 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->module_id = dsidev->id; dsi 5394 drivers/video/fbdev/omap2/omapfb/dss/dsi.c for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { dsi 5395 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[i].source = DSI_VC_SOURCE_L4; dsi 5396 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[i].dssdev = NULL; dsi 5397 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vc[i].vc_id = 0; dsi 5420 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->num_lanes_supported = 1 + REG_GET(dsidev, DSI_GNQ, 11, 9); dsi 5422 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->num_lanes_supported = 3; dsi 5424 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->line_buffer_size = dsi_get_line_buf_size(dsidev); dsi 5443 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->module_id == 0) dsi 5445 drivers/video/fbdev/omap2/omapfb/dss/dsi.c else if (dsi->module_id == 1) dsi 5449 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->module_id == 0) dsi 5451 drivers/video/fbdev/omap2/omapfb/dss/dsi.c else if (dsi->module_id == 1) dsi 5469 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); dsi 5473 drivers/video/fbdev/omap2/omapfb/dss/dsi.c WARN_ON(dsi->scp_clk_refcount > 0); dsi 5475 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dss_pll_unregister(&dsi->pll); dsi 5481 drivers/video/fbdev/omap2/omapfb/dss/dsi.c if (dsi->vdds_dsi_reg != NULL && dsi->vdds_dsi_enabled) { dsi 5482 drivers/video/fbdev/omap2/omapfb/dss/dsi.c regulator_disable(dsi->vdds_dsi_reg); dsi 5483 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->vdds_dsi_enabled = false; dsi 5506 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(pdev); dsi 5508 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->is_enabled = false; dsi 5512 drivers/video/fbdev/omap2/omapfb/dss/dsi.c synchronize_irq(dsi->irq); dsi 5522 drivers/video/fbdev/omap2/omapfb/dss/dsi.c struct dsi_data *dsi = dsi_get_dsidrv_data(pdev); dsi 5529 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->is_enabled = true; dsi 4057 fs/jfs/jfs_dtree.c int dsi; /* dst slot index */ dsi 4071 fs/jfs/jfs_dtree.c dsi = dp->header.freelist; /* first (whole page) free slot */ dsi 4076 fs/jfs/jfs_dtree.c dlv->offset = dsi; dsi 4089 fs/jfs/jfs_dtree.c dstbl[di] = dsi; dsi 4113 fs/jfs/jfs_dtree.c h = d = &dp->slot[dsi]; dsi 4134 fs/jfs/jfs_dtree.c dsi++; dsi 4135 fs/jfs/jfs_dtree.c dlh->next = dsi; dsi 4145 fs/jfs/jfs_dtree.c dsi++; dsi 4146 fs/jfs/jfs_dtree.c dih->next = dsi; dsi 4196 fs/jfs/jfs_dtree.c dsi++; dsi 4197 fs/jfs/jfs_dtree.c d->next = dsi; dsi 4236 fs/jfs/jfs_dtree.c dp->header.freelist = dsi; dsi 34 include/drm/bridge/dw_mipi_dsi.h struct mipi_dsi_device *dsi); dsi 36 include/drm/bridge/dw_mipi_dsi.h struct mipi_dsi_device *dsi); dsi 55 include/drm/bridge/dw_mipi_dsi.h void dw_mipi_dsi_remove(struct dw_mipi_dsi *dsi); dsi 56 include/drm/bridge/dw_mipi_dsi.h int dw_mipi_dsi_bind(struct dw_mipi_dsi *dsi, struct drm_encoder *encoder); dsi 57 include/drm/bridge/dw_mipi_dsi.h void dw_mipi_dsi_unbind(struct dw_mipi_dsi *dsi); dsi 58 include/drm/bridge/dw_mipi_dsi.h void dw_mipi_dsi_set_slave(struct dw_mipi_dsi *dsi, struct dw_mipi_dsi *slave); dsi 85 include/drm/drm_mipi_dsi.h struct mipi_dsi_device *dsi); dsi 87 include/drm/drm_mipi_dsi.h struct mipi_dsi_device *dsi); dsi 223 include/drm/drm_mipi_dsi.h void mipi_dsi_device_unregister(struct mipi_dsi_device *dsi); dsi 225 include/drm/drm_mipi_dsi.h int mipi_dsi_attach(struct mipi_dsi_device *dsi); dsi 226 include/drm/drm_mipi_dsi.h int mipi_dsi_detach(struct mipi_dsi_device *dsi); dsi 227 include/drm/drm_mipi_dsi.h int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi); dsi 228 include/drm/drm_mipi_dsi.h int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi); dsi 229 include/drm/drm_mipi_dsi.h int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi, dsi 232 include/drm/drm_mipi_dsi.h ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload, dsi 234 include/drm/drm_mipi_dsi.h ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params, dsi 255 include/drm/drm_mipi_dsi.h ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi, dsi 257 include/drm/drm_mipi_dsi.h ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd, dsi 259 include/drm/drm_mipi_dsi.h ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data, dsi 261 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi); dsi 262 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi); dsi 263 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode); dsi 264 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format); dsi 265 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi); dsi 266 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi); dsi 267 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi); dsi 268 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi); dsi 269 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start, dsi 271 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start, dsi 273 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi); dsi 274 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi, dsi 276 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format); dsi 277 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline); dsi 278 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi, dsi 280 include/drm/drm_mipi_dsi.h int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi, dsi 292 include/drm/drm_mipi_dsi.h int(*probe)(struct mipi_dsi_device *dsi); dsi 293 include/drm/drm_mipi_dsi.h int(*remove)(struct mipi_dsi_device *dsi); dsi 294 include/drm/drm_mipi_dsi.h void (*shutdown)(struct mipi_dsi_device *dsi); dsi 303 include/drm/drm_mipi_dsi.h static inline void *mipi_dsi_get_drvdata(const struct mipi_dsi_device *dsi) dsi 305 include/drm/drm_mipi_dsi.h return dev_get_drvdata(&dsi->dev); dsi 308 include/drm/drm_mipi_dsi.h static inline void mipi_dsi_set_drvdata(struct mipi_dsi_device *dsi, void *data) dsi 310 include/drm/drm_mipi_dsi.h dev_set_drvdata(&dsi->dev, data); dsi 623 include/video/omapfb_dss.h } dsi; dsi 657 include/video/omapfb_dss.h const struct omapdss_dsi_ops *dsi; dsi 1405 net/nfc/digital_dep.c u8 dsi, payload_size, payload_bits; dsi 1434 net/nfc/digital_dep.c dsi = (psl_req->brs >> 3) & 0x07; dsi 1435 net/nfc/digital_dep.c switch (dsi) { dsi 1446 net/nfc/digital_dep.c pr_err("Unsupported dsi value %d\n", dsi);