dscr 226 arch/arm/kernel/hw_breakpoint.c u32 dscr; dscr 227 arch/arm/kernel/hw_breakpoint.c ARM_DBG_READ(c0, c1, 0, dscr); dscr 228 arch/arm/kernel/hw_breakpoint.c return !!(dscr & ARM_DSCR_MDBGEN); dscr 233 arch/arm/kernel/hw_breakpoint.c u32 dscr; dscr 234 arch/arm/kernel/hw_breakpoint.c ARM_DBG_READ(c0, c1, 0, dscr); dscr 237 arch/arm/kernel/hw_breakpoint.c if (dscr & ARM_DSCR_MDBGEN) dscr 244 arch/arm/kernel/hw_breakpoint.c ARM_DBG_WRITE(c0, c1, 0, (dscr | ARM_DSCR_MDBGEN)); dscr 249 arch/arm/kernel/hw_breakpoint.c ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN)); dscr 257 arch/arm/kernel/hw_breakpoint.c ARM_DBG_READ(c0, c1, 0, dscr); dscr 258 arch/arm/kernel/hw_breakpoint.c if (!(dscr & ARM_DSCR_MDBGEN)) { dscr 850 arch/arm/kernel/hw_breakpoint.c u32 dscr; dscr 858 arch/arm/kernel/hw_breakpoint.c ARM_DBG_READ(c0, c1, 0, dscr); dscr 861 arch/arm/kernel/hw_breakpoint.c switch (ARM_DSCR_MOE(dscr)) { dscr 114 arch/c6x/platforms/dscr.c static struct dscr_regs dscr; dscr 121 arch/c6x/platforms/dscr.c if (dscr.locked[i].key && reg == dscr.locked[i].reg) dscr 122 arch/c6x/platforms/dscr.c return &dscr.locked[i]; dscr 132 arch/c6x/platforms/dscr.c void __iomem *reg_addr = dscr.base + reg; dscr 133 arch/c6x/platforms/dscr.c void __iomem *lock_addr = dscr.base + lock; dscr 162 arch/c6x/platforms/dscr.c soc_writel(key0, dscr.base + lock0); dscr 163 arch/c6x/platforms/dscr.c soc_writel(key1, dscr.base + lock1); dscr 164 arch/c6x/platforms/dscr.c soc_writel(val, dscr.base + reg); dscr 165 arch/c6x/platforms/dscr.c soc_writel(0, dscr.base + lock0); dscr 166 arch/c6x/platforms/dscr.c soc_writel(0, dscr.base + lock1); dscr 176 arch/c6x/platforms/dscr.c else if (dscr.kick_key[0]) dscr 177 arch/c6x/platforms/dscr.c dscr_write_locked2(reg, val, dscr.kick_reg[0], dscr.kick_key[0], dscr 178 arch/c6x/platforms/dscr.c dscr.kick_reg[1], dscr.kick_key[1]); dscr 180 arch/c6x/platforms/dscr.c soc_writel(val, dscr.base + reg); dscr 196 arch/c6x/platforms/dscr.c if (!dscr.base) dscr 202 arch/c6x/platforms/dscr.c info = &dscr.devstate_info[id]; dscr 225 arch/c6x/platforms/dscr.c spin_lock_irqsave(&dscr.lock, flags); dscr 227 arch/c6x/platforms/dscr.c val = soc_readl(dscr.base + ctl->reg); dscr 233 arch/c6x/platforms/dscr.c spin_unlock_irqrestore(&dscr.lock, flags); dscr 246 arch/c6x/platforms/dscr.c val = soc_readl(dscr.base + stat->reg); dscr 265 arch/c6x/platforms/dscr.c r = &dscr.rmii_resets[id]; dscr 269 arch/c6x/platforms/dscr.c spin_lock_irqsave(&dscr.lock, flags); dscr 271 arch/c6x/platforms/dscr.c val = soc_readl(dscr.base + r->reg); dscr 277 arch/c6x/platforms/dscr.c spin_unlock_irqrestore(&dscr.lock, flags); dscr 358 arch/c6x/platforms/dscr.c dscr.rmii_resets[i].reg = be32_to_cpup(p++); dscr 359 arch/c6x/platforms/dscr.c dscr.rmii_resets[i].mask = be32_to_cpup(p++); dscr 408 arch/c6x/platforms/dscr.c r = &dscr.locked[i]; dscr 436 arch/c6x/platforms/dscr.c dscr.kick_reg[0] = vals[0]; dscr 437 arch/c6x/platforms/dscr.c dscr.kick_key[0] = vals[1]; dscr 438 arch/c6x/platforms/dscr.c dscr.kick_reg[1] = vals[2]; dscr 439 arch/c6x/platforms/dscr.c dscr.kick_key[1] = vals[3]; dscr 481 arch/c6x/platforms/dscr.c r = &dscr.devctl[i]; dscr 496 arch/c6x/platforms/dscr.c dscr.devstate_info[j].ctl = r; dscr 537 arch/c6x/platforms/dscr.c r = &dscr.devstat[i]; dscr 550 arch/c6x/platforms/dscr.c dscr.devstate_info[j].stat = r; dscr 572 arch/c6x/platforms/dscr.c spin_lock_init(&dscr.lock); dscr 584 arch/c6x/platforms/dscr.c dscr.base = base; dscr 934 arch/mips/alchemy/common/dbdma.c u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr) dscr 961 arch/mips/alchemy/common/dbdma.c dp->dscr_dest0 = dscr->dscr_dest0; dscr 962 arch/mips/alchemy/common/dbdma.c dp->dscr_source0 = dscr->dscr_source0; dscr 963 arch/mips/alchemy/common/dbdma.c dp->dscr_dest1 = dscr->dscr_dest1; dscr 964 arch/mips/alchemy/common/dbdma.c dp->dscr_source1 = dscr->dscr_source1; dscr 965 arch/mips/alchemy/common/dbdma.c dp->dscr_cmd1 = dscr->dscr_cmd1; dscr 966 arch/mips/alchemy/common/dbdma.c nbytes = dscr->dscr_cmd1; dscr 969 arch/mips/alchemy/common/dbdma.c dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V; dscr 375 arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr); dscr 596 arch/powerpc/include/asm/kvm_book3s_64.h vcpu->arch.dscr = vcpu->arch.dscr_tm; dscr 613 arch/powerpc/include/asm/kvm_book3s_64.h vcpu->arch.dscr_tm = vcpu->arch.dscr; dscr 573 arch/powerpc/include/asm/kvm_host.h ulong dscr; dscr 239 arch/powerpc/include/asm/processor.h unsigned long dscr; dscr 523 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_DSCR, kvm_vcpu, arch.dscr); dscr 1059 arch/powerpc/kernel/process.c t->dscr = mfspr(SPRN_DSCR); dscr 1091 arch/powerpc/kernel/process.c u64 dscr = get_paca()->dscr_default; dscr 1093 arch/powerpc/kernel/process.c dscr = new_thread->dscr; dscr 1095 arch/powerpc/kernel/process.c if (old_thread->dscr != dscr) dscr 1096 arch/powerpc/kernel/process.c mtspr(SPRN_DSCR, dscr); dscr 1674 arch/powerpc/kernel/process.c p->thread.dscr = mfspr(SPRN_DSCR); dscr 242 arch/powerpc/kernel/ptrace.c *data = task->thread.dscr; dscr 246 arch/powerpc/kernel/ptrace.c static int set_user_dscr(struct task_struct *task, unsigned long dscr) dscr 248 arch/powerpc/kernel/ptrace.c task->thread.dscr = dscr; dscr 258 arch/powerpc/kernel/ptrace.c static int set_user_dscr(struct task_struct *task, unsigned long dscr) dscr 1643 arch/powerpc/kernel/ptrace.c &target->thread.dscr, 0, sizeof(u64)); dscr 1651 arch/powerpc/kernel/ptrace.c &target->thread.dscr, 0, sizeof(u64)); dscr 536 arch/powerpc/kernel/sysfs.c current->thread.dscr = *(unsigned long *)val; dscr 541 arch/powerpc/kernel/sysfs.c SYSFS_SPRSETUP_SHOW_STORE(dscr); dscr 542 arch/powerpc/kernel/sysfs.c static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr); dscr 1414 arch/powerpc/kernel/traps.c current->thread.dscr = regs->gpr[rd]; dscr 1416 arch/powerpc/kernel/traps.c mtspr(SPRN_DSCR, current->thread.dscr); dscr 1770 arch/powerpc/kernel/traps.c current->thread.dscr = regs->gpr[rd]; dscr 97 arch/powerpc/kvm/book3s_emulate.c vcpu->arch.dscr_tm = vcpu->arch.dscr; dscr 116 arch/powerpc/kvm/book3s_emulate.c vcpu->arch.dscr = vcpu->arch.dscr_tm; dscr 1642 arch/powerpc/kvm/book3s_hv.c *val = get_reg_val(id, vcpu->arch.dscr); dscr 1863 arch/powerpc/kvm/book3s_hv.c vcpu->arch.dscr = set_reg_val(id, *val); dscr 3568 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_DSCR, vcpu->arch.dscr); dscr 3654 arch/powerpc/kvm/book3s_hv.c vcpu->arch.dscr = mfspr(SPRN_DSCR); dscr 302 arch/powerpc/platforms/powernv/idle.c u64 dscr; dscr 354 arch/powerpc/platforms/powernv/idle.c sprs.dscr = mfspr(SPRN_DSCR); dscr 489 arch/powerpc/platforms/powernv/idle.c mtspr(SPRN_DSCR, sprs.dscr); dscr 590 arch/powerpc/platforms/powernv/idle.c u64 dscr; dscr 667 arch/powerpc/platforms/powernv/idle.c sprs.dscr = mfspr(SPRN_DSCR); dscr 786 arch/powerpc/platforms/powernv/idle.c mtspr(SPRN_DSCR, sprs.dscr); dscr 203 drivers/dma/at_hdmac.c (*prev)->lli.dscr = desc->txd.phys; dscr 309 drivers/dma/at_hdmac.c u32 ctrla, dscr, trials; dscr 325 drivers/dma/at_hdmac.c if (desc_first->lli.dscr) { dscr 376 drivers/dma/at_hdmac.c dscr = channel_readl(atchan, DSCR); dscr 391 drivers/dma/at_hdmac.c if (likely(new_dscr == dscr)) dscr 401 drivers/dma/at_hdmac.c dscr = new_dscr; dscr 409 drivers/dma/at_hdmac.c if (desc_first->lli.dscr == dscr) dscr 414 drivers/dma/at_hdmac.c if (desc->lli.dscr == dscr) dscr 1342 drivers/dma/at_hdmac.c prev->lli.dscr = first->txd.phys; dscr 173 drivers/dma/at_hdmac_regs.h dma_addr_t dscr; /* chain to next lli */ dscr 386 drivers/dma/at_hdmac_regs.h lli->ctrla, lli->ctrlb, &lli->dscr); dscr 455 drivers/dma/at_hdmac_regs.h desc->lli.dscr = 0; dscr 848 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c struct atmel_hlcdc_dma_channel_dscr *dscr; dscr 851 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c dscr = dma_pool_alloc(dc->dscrpool, GFP_KERNEL, &dscr_dma); dscr 852 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (!dscr) dscr 855 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c dscr->addr = 0; dscr 856 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c dscr->next = dscr_dma; dscr 857 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c dscr->self = dscr_dma; dscr 858 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c dscr->ctrl = ATMEL_HLCDC_LAYER_DFETCH; dscr 860 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->dscrs[i] = dscr; dscr 22 drivers/misc/mei/dma-ring.c struct mei_dma_dscr *dscr) dscr 24 drivers/misc/mei/dma-ring.c if (!dscr->size) dscr 27 drivers/misc/mei/dma-ring.c if (WARN_ON(!is_power_of_2(dscr->size))) dscr 30 drivers/misc/mei/dma-ring.c if (dscr->vaddr) dscr 33 drivers/misc/mei/dma-ring.c dscr->vaddr = dmam_alloc_coherent(dev->dev, dscr->size, &dscr->daddr, dscr 35 drivers/misc/mei/dma-ring.c if (!dscr->vaddr) dscr 48 drivers/misc/mei/dma-ring.c struct mei_dma_dscr *dscr) dscr 50 drivers/misc/mei/dma-ring.c if (!dscr->vaddr) dscr 53 drivers/misc/mei/dma-ring.c dmam_free_coherent(dev->dev, dscr->size, dscr->vaddr, dscr->daddr); dscr 54 drivers/misc/mei/dma-ring.c dscr->vaddr = NULL; dscr 1019 sound/soc/amd/acp-pcm-dma.c u16 dscr; dscr 1036 sound/soc/amd/acp-pcm-dma.c dscr = acp_reg_read(rtd->acp_mmio, rtd->dma_curr_dscr); dscr 1037 sound/soc/amd/acp-pcm-dma.c if (dscr == rtd->dma_dscr_idx_1) dscr 14 tools/testing/selftests/powerpc/dscr/dscr_default_test.c static unsigned long dscr; /* System DSCR default */ dscr 32 tools/testing/selftests/powerpc/dscr/dscr_default_test.c d = dscr; dscr 69 tools/testing/selftests/powerpc/dscr/dscr_default_test.c dscr = 1; dscr 70 tools/testing/selftests/powerpc/dscr/dscr_default_test.c set_default_dscr(dscr); dscr 90 tools/testing/selftests/powerpc/dscr/dscr_default_test.c dscr++; dscr 91 tools/testing/selftests/powerpc/dscr/dscr_default_test.c if (dscr > DSCR_MAX) dscr 92 tools/testing/selftests/powerpc/dscr/dscr_default_test.c dscr = 0; dscr 94 tools/testing/selftests/powerpc/dscr/dscr_default_test.c set_default_dscr(dscr); dscr 22 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c unsigned long i, dscr = 0; dscr 25 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c set_dscr(dscr); dscr 32 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c dscr++; dscr 33 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c if (dscr > DSCR_MAX) dscr 34 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c dscr = 0; dscr 36 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c set_dscr(dscr); dscr 40 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c if (cur_dscr != dscr) { dscr 42 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c "is %ld\n", dscr, cur_dscr); dscr 48 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c dscr++; dscr 49 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c if (dscr > DSCR_MAX) dscr 50 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c dscr = 0; dscr 52 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c set_dscr_usr(dscr); dscr 56 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c if (cur_dscr_usr != dscr) { dscr 58 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c "is %ld\n", dscr, cur_dscr_usr); dscr 44 tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c unsigned long i, dscr = 0; dscr 48 tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c dscr++; dscr 49 tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c if (dscr > DSCR_MAX) dscr 50 tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c dscr = 0; dscr 52 tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c if (dscr == get_default_dscr()) dscr 56 tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c set_dscr_usr(dscr); dscr 58 tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c set_dscr(dscr); dscr 84 tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c sprintf(dscr_str, "%ld", dscr); dscr 22 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c unsigned long i, dscr = 0; dscr 26 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c set_dscr(dscr); dscr 31 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c dscr++; dscr 32 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c if (dscr > DSCR_MAX) dscr 33 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c dscr = 0; dscr 36 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c set_dscr_usr(dscr); dscr 38 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c set_dscr(dscr); dscr 63 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c if (cur_dscr != dscr) { dscr 65 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c "but is %ld\n", dscr, cur_dscr); dscr 70 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c if (cur_dscr_usr != dscr) { dscr 72 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c "but is %ld\n", dscr, cur_dscr_usr); dscr 30 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h unsigned long ppr, unsigned long dscr) dscr 40 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h if (reg[2] != dscr) dscr 186 tools/testing/selftests/powerpc/ptrace/ptrace.h unsigned long ppr, unsigned long dscr) dscr 215 tools/testing/selftests/powerpc/ptrace/ptrace.h *reg = dscr; dscr 277 tools/testing/selftests/powerpc/ptrace/ptrace.h unsigned long ppr, unsigned long dscr) dscr 306 tools/testing/selftests/powerpc/ptrace/ptrace.h *reg = dscr;