dsc_regs           65 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	dsc20->dsc_regs->reg
dsc_regs           85 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		const struct dcn20_dsc_registers *dsc_regs,
dsc_regs           93 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	dsc->dsc_regs = dsc_regs;
dsc_regs          556 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 	const struct dcn20_dsc_registers *dsc_regs;
dsc_regs          569 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h 		const struct dcn20_dsc_registers *dsc_regs,
dsc_regs          852 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c static const struct dcn20_dsc_registers dsc_regs[] = {
dsc_regs         1292 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	dsc2_construct(dsc, ctx, inst, &dsc_regs[inst], &dsc_shift, &dsc_mask);
dsc_regs          539 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c static const struct dcn20_dsc_registers dsc_regs[] = {
dsc_regs         1269 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	dsc2_construct(dsc, ctx, inst, &dsc_regs[inst], &dsc_shift, &dsc_mask);