dsc_params 35 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static void dsc_update_from_dsc_parameters(struct dsc_reg_values *reg_vals, const struct dsc_parameters *dsc_params); dsc_params 310 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c struct dsc_parameters dsc_params; dsc_params 374 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c if (dscc_compute_dsc_parameters(&dsc_reg_vals->pps, &dsc_params)) { dsc_params 379 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c dsc_update_from_dsc_parameters(dsc_reg_vals, &dsc_params); dsc_params 381 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c dsc_optc_cfg->bytes_per_pixel = dsc_params.bytes_per_pixel; dsc_params 502 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static void dsc_update_from_dsc_parameters(struct dsc_reg_values *reg_vals, const struct dsc_parameters *dsc_params) dsc_params 506 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c reg_vals->pps = dsc_params->pps; dsc_params 512 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c reg_vals->rc_buffer_model_size = dsc_params->rc_buffer_model_size; dsc_params 50 drivers/gpu/drm/amd/display/dc/dsc/dscc_types.h int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps, struct dsc_parameters *dsc_params); dsc_params 102 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps, struct dsc_parameters *dsc_params) dsc_params 123 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c dsc_params->bytes_per_pixel = (uint32_t)dsc_ceil(d_bytes_per_pixel * 0x10000000); dsc_params 132 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c dsc_params->pps = *pps; dsc_params 133 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c dsc_params->pps.initial_scale_value = 8 * rc.rc_model_size / (rc.rc_model_size - rc.initial_fullness_offset); dsc_params 135 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c copy_pps_fields(&dsc_cfg, &dsc_params->pps); dsc_params 138 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c dsc_cfg.mux_word_size = dsc_params->pps.bits_per_component <= 10 ? 48 : 64; dsc_params 142 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c copy_pps_fields(&dsc_params->pps, &dsc_cfg); dsc_params 143 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c dsc_params->rc_buffer_model_size = dsc_cfg.rc_bits; dsc_params 2145 drivers/gpu/drm/i915/display/intel_ddi.c if (crtc_state->dsc_params.compression_enable) dsc_params 983 drivers/gpu/drm/i915/display/intel_display_types.h } dsc_params; dsc_params 2032 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.compressed_bpp = dsc_params 2035 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.slice_count = dsc_params 2055 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.compressed_bpp = min_t(u16, dsc_params 2058 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.slice_count = dsc_dp_slice_count; dsc_params 2066 drivers/gpu/drm/i915/display/intel_dp.c if (pipe_config->dsc_params.slice_count > 1) { dsc_params 2067 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.dsc_split = true; dsc_params 2079 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.compressed_bpp); dsc_params 2083 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.compression_enable = true; dsc_params 2087 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.compressed_bpp, dsc_params 2088 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.slice_count); dsc_params 2162 drivers/gpu/drm/i915/display/intel_dp.c if (pipe_config->dsc_params.compression_enable) { dsc_params 2166 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.compressed_bpp); dsc_params 2170 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->dsc_params.compressed_bpp), dsc_params 2314 drivers/gpu/drm/i915/display/intel_dp.c if (pipe_config->dsc_params.compression_enable) dsc_params 2315 drivers/gpu/drm/i915/display/intel_dp.c output_bpp = pipe_config->dsc_params.compressed_bpp; dsc_params 3026 drivers/gpu/drm/i915/display/intel_dp.c if (!crtc_state->dsc_params.compression_enable) dsc_params 79 drivers/gpu/drm/i915/display/intel_psr.c WARN_ON(crtc_state->dsc_params.compression_enable && dsc_params 552 drivers/gpu/drm/i915/display/intel_psr.c if (crtc_state->dsc_params.compression_enable) { dsc_params 326 drivers/gpu/drm/i915/display/intel_vdsc.c u16 compressed_bpp = pipe_config->dsc_params.compressed_bpp; dsc_params 335 drivers/gpu/drm/i915/display/intel_vdsc.c pipe_config->dsc_params.slice_count); dsc_params 494 drivers/gpu/drm/i915/display/intel_vdsc.c u8 num_vdsc_instances = (crtc_state->dsc_params.dsc_split) ? 2 : 1; dsc_params 517 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 521 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 536 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 540 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 556 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 560 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 576 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 580 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 596 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 600 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 616 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 620 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 638 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 642 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 658 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 662 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 678 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 682 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 698 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 702 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 720 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 724 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 743 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 747 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) dsc_params 766 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) { dsc_params 785 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) { dsc_params 827 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) { dsc_params 862 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) { dsc_params 912 drivers/gpu/drm/i915/display/intel_vdsc.c if (!crtc_state->dsc_params.compression_enable) dsc_params 931 drivers/gpu/drm/i915/display/intel_vdsc.c if (crtc_state->dsc_params.dsc_split) { dsc_params 947 drivers/gpu/drm/i915/display/intel_vdsc.c if (!old_crtc_state->dsc_params.compression_enable) dsc_params 4531 drivers/gpu/drm/i915/i915_debugfs.c yesno(crtc_state->dsc_params.compression_enable));