dsc_optc_cfg      395 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		struct dsc_optc_config dsc_optc_cfg;
dsc_optc_cfg      407 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg);
dsc_optc_cfg      412 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 			odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg);
dsc_optc_cfg      418 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		optc_dsc_mode = dsc_optc_cfg.is_pixel_format_444 ? OPTC_DSC_ENABLED_444 : OPTC_DSC_ENABLED_NATIVE_SUBSAMPLED;
dsc_optc_cfg      423 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 			dsc_optc_config_log(dsc, &dsc_optc_cfg);
dsc_optc_cfg      426 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 									dsc_optc_cfg.bytes_per_pixel,
dsc_optc_cfg      427 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 									dsc_optc_cfg.slice_width);
dsc_optc_cfg      434 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		dsc_optc_config_log(dsc, &dsc_optc_cfg);
dsc_optc_cfg      437 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 							dsc_optc_cfg.bytes_per_pixel,
dsc_optc_cfg      438 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 							dsc_optc_cfg.slice_width);
dsc_optc_cfg       33 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 			struct dsc_optc_config *dsc_optc_cfg);
dsc_optc_cfg       45 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		struct dsc_optc_config *dsc_optc_cfg);
dsc_optc_cfg      166 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	struct dsc_optc_config dsc_optc_cfg;
dsc_optc_cfg      172 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	return dsc_prepare_config(dsc_cfg, &dsc20->reg_vals, &dsc_optc_cfg);
dsc_optc_cfg      188 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		struct dsc_optc_config *dsc_optc_cfg)
dsc_optc_cfg      196 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	is_config_ok = dsc_prepare_config(dsc_cfg, &dsc20->reg_vals, dsc_optc_cfg);
dsc_optc_cfg      208 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	struct dsc_optc_config dsc_optc_cfg;
dsc_optc_cfg      213 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	is_config_ok = dsc_prepare_config(dsc_cfg, &dsc_reg_vals, &dsc_optc_cfg);
dsc_optc_cfg      308 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 			struct dsc_optc_config *dsc_optc_cfg)
dsc_optc_cfg      381 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	dsc_optc_cfg->bytes_per_pixel = dsc_params.bytes_per_pixel;
dsc_optc_cfg      382 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	dsc_optc_cfg->slice_width = dsc_reg_vals->pps.slice_width;
dsc_optc_cfg      383 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	dsc_optc_cfg->is_pixel_format_444 = dsc_reg_vals->pixel_format == DSC_PIXFMT_RGB ||
dsc_optc_cfg       95 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 			struct dsc_optc_config *dsc_optc_cfg);