EP_REGS           188 drivers/staging/emxx_udc/emxx_udc.c 		p_ep_regs = &udc->p_regs->EP_REGS[num];
EP_REGS           223 drivers/staging/emxx_udc/emxx_udc.c 	_nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
EP_REGS           251 drivers/staging/emxx_udc/emxx_udc.c 	_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
EP_REGS           258 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
EP_REGS           261 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
EP_REGS           264 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
EP_REGS           269 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
EP_REGS           272 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
EP_REGS           275 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
EP_REGS           295 drivers/staging/emxx_udc/emxx_udc.c 	_nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
EP_REGS           306 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
EP_REGS           309 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
EP_REGS           312 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
EP_REGS           317 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
EP_REGS           320 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
EP_REGS           323 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
EP_REGS           356 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
EP_REGS           360 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPN_AUTO);
EP_REGS           365 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
EP_REGS           393 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
EP_REGS           397 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
EP_REGS           398 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
EP_REGS           410 drivers/staging/emxx_udc/emxx_udc.c 	_nbu2ss_bitclr(&preg->EP_REGS[ep->epnum - 1].EP_DMA_CTRL, EPN_DMA_EN);
EP_REGS           439 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
EP_REGS           443 drivers/staging/emxx_udc/emxx_udc.c 			_nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
EP_REGS           446 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
EP_REGS           448 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
EP_REGS           810 drivers/staging/emxx_udc/emxx_udc.c 	mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPN_MPKT;
EP_REGS           830 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
EP_REGS           831 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_BURST_SET);
EP_REGS           833 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
EP_REGS           835 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_BURST_SET);
EP_REGS           837 drivers/staging/emxx_udc/emxx_udc.c 	_nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_DMA_EN);
EP_REGS           873 drivers/staging/emxx_udc/emxx_udc.c 			_nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
EP_REGS           884 drivers/staging/emxx_udc/emxx_udc.c 			_nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
EP_REGS           944 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPN_LDATA;
EP_REGS          1003 drivers/staging/emxx_udc/emxx_udc.c 	mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPN_MPKT;
EP_REGS          1040 drivers/staging/emxx_udc/emxx_udc.c 	_nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
EP_REGS          1043 drivers/staging/emxx_udc/emxx_udc.c 	_nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_DMA_EN);
EP_REGS          1075 drivers/staging/emxx_udc/emxx_udc.c 					&preg->EP_REGS[ep->epnum - 1].EP_WRITE
EP_REGS          1137 drivers/staging/emxx_udc/emxx_udc.c 	status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
EP_REGS          1228 drivers/staging/emxx_udc/emxx_udc.c 			&ep->udc->p_regs->EP_REGS[ep->epnum - 1].EP_LEN_DCNT);
EP_REGS          1255 drivers/staging/emxx_udc/emxx_udc.c 	_nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
EP_REGS          1290 drivers/staging/emxx_udc/emxx_udc.c 			_nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
EP_REGS          1295 drivers/staging/emxx_udc/emxx_udc.c 				_nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
EP_REGS          1299 drivers/staging/emxx_udc/emxx_udc.c 				_nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
EP_REGS          1304 drivers/staging/emxx_udc/emxx_udc.c 				_nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
EP_REGS          1375 drivers/staging/emxx_udc/emxx_udc.c 		data = _nbu2ss_readl(&preg->EP_REGS[epnum - 1].EP_CONTROL);
EP_REGS          1466 drivers/staging/emxx_udc/emxx_udc.c 				&preg->EP_REGS[ep->epnum - 1].EP_STATUS);
EP_REGS          1881 drivers/staging/emxx_udc/emxx_udc.c 			_nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_STATUS);
EP_REGS          1970 drivers/staging/emxx_udc/emxx_udc.c 	ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
EP_REGS          2018 drivers/staging/emxx_udc/emxx_udc.c 	status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
EP_REGS          2021 drivers/staging/emxx_udc/emxx_udc.c 	_nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~status);
EP_REGS          2145 drivers/staging/emxx_udc/emxx_udc.c 		_nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPN_BCLR);
EP_REGS          2762 drivers/staging/emxx_udc/emxx_udc.c 		data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_LEN_DCNT)
EP_REGS           475 drivers/staging/emxx_udc/emxx_udc.h 	struct ep_regs EP_REGS[REG_EP_NUM];	/* Endpoint Register */