drm_enc           403 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc,
drm_enc           409 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc           423 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static void dpu_encoder_destroy(struct drm_encoder *drm_enc)
drm_enc           428 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc) {
drm_enc           433 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc           454 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	drm_encoder_cleanup(drm_enc);
drm_enc           545 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		struct drm_encoder *drm_enc,
drm_enc           558 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc || !crtc_state || !conn_state) {
drm_enc           560 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				drm_enc != 0, crtc_state != 0, conn_state != 0);
drm_enc           564 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc           567 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	priv = drm_enc->dev->dev_private;
drm_enc           571 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_atomic_check(DRMID(drm_enc));
drm_enc           610 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			ret = dpu_rm_reserve(&dpu_kms->rm, drm_enc, crtc_state,
drm_enc           616 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_atomic_check_flags(DRMID(drm_enc), adj_mode->flags,
drm_enc           629 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct drm_encoder *drm_enc;
drm_enc           643 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	drm_enc = &dpu_enc->base;
drm_enc           645 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	priv = drm_enc->dev->dev_private;
drm_enc           674 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static void _dpu_encoder_irq_control(struct drm_encoder *drm_enc, bool enable)
drm_enc           679 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc) {
drm_enc           684 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc           696 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc,
drm_enc           703 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc           704 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	priv = drm_enc->dev->dev_private;
drm_enc           707 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_rc_helper(DRMID(drm_enc), enable);
drm_enc           719 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		_dpu_encoder_irq_control(drm_enc, true);
drm_enc           723 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		_dpu_encoder_irq_control(drm_enc, false);
drm_enc           731 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static int dpu_encoder_resource_control(struct drm_encoder *drm_enc,
drm_enc           738 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc || !drm_enc->dev || !drm_enc->dev->dev_private ||
drm_enc           739 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			!drm_enc->crtc) {
drm_enc           743 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc           744 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	priv = drm_enc->dev->dev_private;
drm_enc           758 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_rc(DRMID(drm_enc), sw_event, dpu_enc->idle_pc_supported,
drm_enc           773 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				      DRMID(drm_enc), sw_event);
drm_enc           779 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				      DRMID(drm_enc), sw_event,
drm_enc           786 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			_dpu_encoder_irq_control(drm_enc, true);
drm_enc           788 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			_dpu_encoder_resource_control_helper(drm_enc, true);
drm_enc           792 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		trace_dpu_enc_rc(DRMID(drm_enc), sw_event,
drm_enc           808 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				      DRMID(drm_enc), sw_event,
drm_enc           817 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		if (dpu_crtc_frame_pending(drm_enc->crtc) > 1) {
drm_enc           819 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				      DRMID(drm_enc));
drm_enc           826 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		trace_dpu_enc_rc(DRMID(drm_enc), sw_event,
drm_enc           841 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			_dpu_encoder_irq_control(drm_enc, true);
drm_enc           847 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				      DRMID(drm_enc), sw_event,
drm_enc           855 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		trace_dpu_enc_rc(DRMID(drm_enc), sw_event,
drm_enc           868 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				      DRMID(drm_enc), sw_event);
drm_enc           873 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				  DRMID(drm_enc), sw_event, dpu_enc->rc_state);
drm_enc           883 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			_dpu_encoder_resource_control_helper(drm_enc, false);
drm_enc           887 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		trace_dpu_enc_rc(DRMID(drm_enc), sw_event,
drm_enc           899 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				  DRMID(drm_enc), sw_event, dpu_enc->rc_state);
drm_enc           910 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				  DRMID(drm_enc), sw_event, dpu_enc->rc_state);
drm_enc           916 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			_dpu_encoder_irq_control(drm_enc, false);
drm_enc           918 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			_dpu_encoder_resource_control_helper(drm_enc, false);
drm_enc           922 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		trace_dpu_enc_rc(DRMID(drm_enc), sw_event,
drm_enc           930 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		DRM_ERROR("id:%u, unexpected sw_event: %d\n", DRMID(drm_enc),
drm_enc           932 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		trace_dpu_enc_rc(DRMID(drm_enc), sw_event,
drm_enc           938 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_rc(DRMID(drm_enc), sw_event,
drm_enc           944 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
drm_enc           962 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc) {
drm_enc           967 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc           970 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	priv = drm_enc->dev->dev_private;
drm_enc           974 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_mode_set(DRMID(drm_enc));
drm_enc           977 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		if (conn_iter->encoder == drm_enc)
drm_enc           988 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	drm_for_each_crtc(drm_crtc, drm_enc->dev)
drm_enc           989 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		if (drm_crtc->state->encoder_mask & drm_encoder_mask(drm_enc))
drm_enc           995 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	ret = dpu_rm_reserve(&dpu_kms->rm, drm_enc, drm_crtc->state,
drm_enc          1003 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_rm_init_hw_iter(&hw_iter, drm_enc->base.id, DPU_HW_BLK_PINGPONG);
drm_enc          1011 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_rm_init_hw_iter(&hw_iter, drm_enc->base.id, DPU_HW_BLK_CTL);
drm_enc          1019 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_rm_init_hw_iter(&hw_iter, drm_enc->base.id, DPU_HW_BLK_LM);
drm_enc          1057 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			dpu_rm_init_hw_iter(&hw_iter, drm_enc->base.id,
drm_enc          1086 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_rm_release(&dpu_kms->rm, drm_enc);
drm_enc          1089 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static void _dpu_encoder_virt_enable_helper(struct drm_encoder *drm_enc)
drm_enc          1095 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc || !drm_enc->dev || !drm_enc->dev->dev_private) {
drm_enc          1100 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	priv = drm_enc->dev->dev_private;
drm_enc          1107 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1122 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c void dpu_encoder_virt_runtime_resume(struct drm_encoder *drm_enc)
drm_enc          1124 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1136 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	_dpu_encoder_virt_enable_helper(drm_enc);
drm_enc          1142 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static void dpu_encoder_virt_enable(struct drm_encoder *drm_enc)
drm_enc          1148 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc) {
drm_enc          1152 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1157 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_enable(DRMID(drm_enc), cur_mode->hdisplay,
drm_enc          1167 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	ret = dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_KICKOFF);
drm_enc          1174 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	_dpu_encoder_virt_enable_helper(drm_enc);
drm_enc          1182 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
drm_enc          1190 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc) {
drm_enc          1193 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	} else if (!drm_enc->dev) {
drm_enc          1196 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	} else if (!drm_enc->dev->dev_private) {
drm_enc          1201 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1207 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	mode = &drm_enc->crtc->state->adjusted_mode;
drm_enc          1209 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	priv = drm_enc->dev->dev_private;
drm_enc          1212 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_disable(DRMID(drm_enc));
drm_enc          1215 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_encoder_wait_for_event(drm_enc, MSM_ENC_TX_COMPLETE);
drm_enc          1217 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_PRE_STOP);
drm_enc          1228 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		DPU_ERROR("enc%d timeout pending\n", drm_enc->base.id);
drm_enc          1232 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_STOP);
drm_enc          1241 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_rm_release(&dpu_kms->rm, drm_enc);
drm_enc          1261 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static void dpu_encoder_vblank_callback(struct drm_encoder *drm_enc,
drm_enc          1267 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc || !phy_enc)
drm_enc          1271 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1282 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static void dpu_encoder_underrun_callback(struct drm_encoder *drm_enc,
drm_enc          1290 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_underrun_cb(DRMID(drm_enc),
drm_enc          1295 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c void dpu_encoder_assign_crtc(struct drm_encoder *drm_enc, struct drm_crtc *crtc)
drm_enc          1297 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1307 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c void dpu_encoder_toggle_vblank_for_crtc(struct drm_encoder *drm_enc,
drm_enc          1310 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1314 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_vblank_cb(DRMID(drm_enc), enable);
drm_enc          1331 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c void dpu_encoder_register_frame_event_callback(struct drm_encoder *drm_enc,
drm_enc          1335 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1341 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc) {
drm_enc          1345 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_frame_event_cb(DRMID(drm_enc), enable);
drm_enc          1354 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		struct drm_encoder *drm_enc,
drm_enc          1357 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1369 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			trace_dpu_enc_frame_done_cb_not_busy(DRMID(drm_enc),
drm_enc          1377 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				trace_dpu_enc_frame_done_cb(DRMID(drm_enc), i,
drm_enc          1387 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			dpu_encoder_resource_control(drm_enc,
drm_enc          1425 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc,
drm_enc          1453 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_trigger_flush(DRMID(drm_enc), phys->intf_idx,
drm_enc          1604 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *drm_enc)
drm_enc          1612 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc) {
drm_enc          1616 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1683 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c int dpu_encoder_vsync_time(struct drm_encoder *drm_enc, ktime_t *wakeup_time)
drm_enc          1692 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1694 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc->crtc || !drm_enc->crtc->state) {
drm_enc          1698 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	mode = &drm_enc->crtc->state->adjusted_mode;
drm_enc          1733 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct drm_encoder *drm_enc = &dpu_enc->base;
drm_enc          1737 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc->dev || !drm_enc->dev->dev_private ||
drm_enc          1738 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			!drm_enc->crtc) {
drm_enc          1743 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	priv = drm_enc->dev->dev_private;
drm_enc          1745 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (drm_enc->crtc->index >= ARRAY_SIZE(priv->event_thread)) {
drm_enc          1749 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	event_thread = &priv->event_thread[drm_enc->crtc->index];
drm_enc          1752 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				drm_enc->crtc->index);
drm_enc          1778 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc)
drm_enc          1785 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1787 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_prepare_kickoff(DRMID(drm_enc));
drm_enc          1802 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_KICKOFF);
drm_enc          1806 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		trace_dpu_enc_prepare_kickoff_reset(DRMID(drm_enc));
drm_enc          1813 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c void dpu_encoder_kickoff(struct drm_encoder *drm_enc)
drm_enc          1822 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1824 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_kickoff(DRMID(drm_enc));
drm_enc          1827 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			drm_mode_vrefresh(&drm_enc->crtc->state->adjusted_mode);
drm_enc          1844 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			!dpu_encoder_vsync_time(drm_enc, &wakeup_time)) {
drm_enc          1845 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		trace_dpu_enc_early_kickoff(DRMID(drm_enc),
drm_enc          1854 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc)
drm_enc          1860 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc) {
drm_enc          1864 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1914 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
drm_enc          1916 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc          1930 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc->dev || !drm_enc->dev->dev_private) {
drm_enc          1935 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	priv = drm_enc->dev->dev_private;
drm_enc          1938 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	snprintf(name, DPU_NAME_SIZE, "encoder%u", drm_enc->base.id);
drm_enc          1942 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			drm_enc->dev->primary->debugfs_root);
drm_enc          1958 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
drm_enc          2135 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct drm_encoder *drm_enc = &dpu_enc->base;
drm_enc          2139 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc->dev || !drm_enc->dev->dev_private) {
drm_enc          2143 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	priv = drm_enc->dev->dev_private;
drm_enc          2147 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			      DRMID(drm_enc), dpu_enc->frame_busy_mask[0]);
drm_enc          2150 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		DRM_DEBUG_KMS("id:%u invalid timeout\n", DRMID(drm_enc));
drm_enc          2157 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	trace_dpu_enc_frame_done_timeout(DRMID(drm_enc), event);
drm_enc          2182 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	struct drm_encoder *drm_enc = NULL;
drm_enc          2219 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (drm_enc)
drm_enc          2220 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		dpu_encoder_destroy(drm_enc);
drm_enc          2252 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c int dpu_encoder_wait_for_event(struct drm_encoder *drm_enc,
drm_enc          2259 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	if (!drm_enc) {
drm_enc          2263 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	dpu_enc = to_dpu_encoder_virt(drm_enc);
drm_enc            91 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h int dpu_encoder_vsync_time(struct drm_encoder *drm_enc, ktime_t *wakeup_time);
drm_enc           149 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc);
drm_enc           157 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h void dpu_encoder_set_idle_timeout(struct drm_encoder *drm_enc,
drm_enc            81 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h 		struct drm_encoder *drm_enc,