drbar              99 arch/arm/include/asm/mpu.h 		u32 drbar;   /* PMSAv7 */
drbar             187 arch/arm/kernel/asm-offsets.c   DEFINE(MPU_RGN_DRBAR,	offsetof(struct mpu_rgn, drbar));
drbar             408 arch/arm/mm/pmsa-v7.c 	mpu_rgn_info.rgns[number].drbar = start;
drbar             192 drivers/edac/i82443bxgx_edac.c 	u8 drbar, dramc;
drbar             201 drivers/edac/i82443bxgx_edac.c 		pci_read_config_byte(pdev, I82443BXGX_DRB + index, &drbar);
drbar             203 drivers/edac/i82443bxgx_edac.c 			 mci->mc_idx, index, drbar);
drbar             204 drivers/edac/i82443bxgx_edac.c 		row_high_limit = ((u32) drbar << 23);
drbar             223 drivers/edac/r82600_edac.c 	u8 drbar;		/* SDRAM Row Boundary Address Register */
drbar             236 drivers/edac/r82600_edac.c 		pci_read_config_byte(pdev, R82600_DRBA + index, &drbar);
drbar             238 drivers/edac/r82600_edac.c 		edac_dbg(1, "Row=%d DRBA = %#0x\n", index, drbar);
drbar             240 drivers/edac/r82600_edac.c 		row_high_limit = ((u32) drbar << 24);