dpte_req_per_row_ub 611 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_width; dpte_req_per_row_ub 619 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_width; dpte_req_per_row_ub 626 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_height; dpte_req_per_row_ub 630 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_dlg_param->dpte_bytes_per_row_ub = rq_dlg_param->dpte_req_per_row_ub * 128; //2*64B dpte request dpte_req_per_row_ub 632 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c rq_dlg_param->dpte_bytes_per_row_ub = rq_dlg_param->dpte_req_per_row_ub * 64; //64B dpte request dpte_req_per_row_ub 611 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_width; dpte_req_per_row_ub 619 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_width; dpte_req_per_row_ub 626 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_height; dpte_req_per_row_ub 630 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_dlg_param->dpte_bytes_per_row_ub = rq_dlg_param->dpte_req_per_row_ub * 128; //2*64B dpte request dpte_req_per_row_ub 632 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c rq_dlg_param->dpte_bytes_per_row_ub = rq_dlg_param->dpte_req_per_row_ub * 64; //64B dpte request dpte_req_per_row_ub 614 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_width; dpte_req_per_row_ub 622 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_width; dpte_req_per_row_ub 629 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_height; dpte_req_per_row_ub 633 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_dlg_param->dpte_bytes_per_row_ub = rq_dlg_param->dpte_req_per_row_ub * 128; //2*64B dpte request dpte_req_per_row_ub 635 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c rq_dlg_param->dpte_bytes_per_row_ub = rq_dlg_param->dpte_req_per_row_ub * 64; //64B dpte request dpte_req_per_row_ub 375 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h unsigned int dpte_req_per_row_ub; dpte_req_per_row_ub 83 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c rq_dlg_param.dpte_req_per_row_ub); dpte_req_per_row_ub 850 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_width; dpte_req_per_row_ub 857 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_width; dpte_req_per_row_ub 864 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_height; dpte_req_per_row_ub 868 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c rq_dlg_param->dpte_bytes_per_row_ub = rq_dlg_param->dpte_req_per_row_ub * 64;