dprefclk_bypass    75 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c 		bypass->dprefclk_bypass = REG_READ(CLK0_CLK11_BYPASS_CNTL) & 0x0007;
dprefclk_bypass    76 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c 		if (bypass->dprefclk_bypass < 0 || bypass->dprefclk_bypass > 4)
dprefclk_bypass    77 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c 			bypass->dprefclk_bypass = 0;
dprefclk_bypass   213 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c 	regs_and_bypass->dprefclk_bypass = internal.CLK1_CLK2_BYPASS_CNTL & 0x0007;
dprefclk_bypass   214 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c 	if (regs_and_bypass->dprefclk_bypass < 0 || regs_and_bypass->dprefclk_bypass > 4)
dprefclk_bypass   215 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c 		regs_and_bypass->dprefclk_bypass = 0;
dprefclk_bypass   234 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c 			bypass_clks[(int) regs_and_bypass->dprefclk_bypass]);
dprefclk_bypass    93 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h 	uint32_t dprefclk_bypass;
dprefclk_bypass   137 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h 	uint32_t dprefclk_bypass;