dpp_set_degamma   535 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c 		.dpp_set_degamma = dpp1_set_degamma,
dpp_set_degamma  1409 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);
dpp_set_degamma  1413 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 			dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_HW_sRGB);
dpp_set_degamma  1416 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 			dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_HW_xvYCC);
dpp_set_degamma  1419 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 			dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);
dpp_set_degamma  1427 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		dpp_base->funcs->dpp_set_degamma(dpp_base, IPP_DEGAMMA_MODE_BYPASS);
dpp_set_degamma   472 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c 	.dpp_set_degamma		= dpp2_set_degamma,
dpp_set_degamma   768 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		dpp_base->funcs->dpp_set_degamma(dpp_base,
dpp_set_degamma   794 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 			dpp_base->funcs->dpp_set_degamma(dpp_base,
dpp_set_degamma   798 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 			dpp_base->funcs->dpp_set_degamma(dpp_base,
dpp_set_degamma   802 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 			dpp_base->funcs->dpp_set_degamma(dpp_base,
dpp_set_degamma   811 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		dpp_base->funcs->dpp_set_degamma(dpp_base,
dpp_set_degamma   819 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		dpp_base->funcs->dpp_set_degamma(dpp_base,
dpp_set_degamma   177 drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h 	void (*dpp_set_degamma)(