dpp_program_degamma_pwl  537 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c 		.dpp_program_degamma_pwl	= dpp1_set_degamma_pwl,
dpp_program_degamma_pwl 1431 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		dpp_base->funcs->dpp_program_degamma_pwl(dpp_base,
dpp_program_degamma_pwl  476 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c 	.dpp_program_degamma_pwl	= dpp2_set_degamma_pwl,
dpp_program_degamma_pwl  778 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 			dpp_base->funcs->dpp_program_degamma_pwl(dpp_base,
dpp_program_degamma_pwl  783 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 			dpp_base->funcs->dpp_program_degamma_pwl(dpp_base,
dpp_program_degamma_pwl  185 drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h 	void (*dpp_program_degamma_pwl)(struct dpp *dpp_base,