dpm              1361 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 	u32 count = adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count;
dpm              1365 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v ==
dpm              1377 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		cpu_to_le32(adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk);
dpm               109 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	if (rps == adev->pm.dpm.current_ps)
dpm               111 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	if (rps == adev->pm.dpm.requested_ps)
dpm               113 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	if (rps == adev->pm.dpm.boot_ps)
dpm               124 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	adev->pm.dpm.new_active_crtcs = 0;
dpm               125 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	adev->pm.dpm.new_active_crtc_count = 0;
dpm               131 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);
dpm               132 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.new_active_crtc_count++;
dpm               264 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);
dpm               265 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);
dpm               266 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);
dpm               303 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst;
dpm               304 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);
dpm               305 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);
dpm               306 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);
dpm               307 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin);
dpm               308 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.fan.pwm_med = le16_to_cpu(fan_info->fan.usPWMMed);
dpm               309 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.fan.pwm_high = le16_to_cpu(fan_info->fan.usPWMHigh);
dpm               311 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.fan.t_max = le16_to_cpu(fan_info->fan2.usTMax);
dpm               313 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.fan.t_max = 10900;
dpm               314 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.fan.cycle_delay = 100000;
dpm               316 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.fan.control_mode = fan_info->fan3.ucFanControlMode;
dpm               317 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.fan.default_max_fan_pwm =
dpm               319 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.fan.default_fan_output_sensitivity = 4836;
dpm               320 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.fan.fan_output_sensitivity =
dpm               323 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.fan.ucode_fan_control = true;
dpm               334 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm               345 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm               356 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm               367 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk,
dpm               380 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk =
dpm               383 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk =
dpm               386 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc =
dpm               388 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci =
dpm               399 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries =
dpm               403 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			if (!adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) {
dpm               410 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk =
dpm               412 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk =
dpm               414 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage =
dpm               419 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.phase_shedding_limits_table.count =
dpm               427 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);
dpm               428 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);
dpm               429 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		adev->pm.dpm.near_tdp_limit_adjusted = adev->pm.dpm.near_tdp_limit;
dpm               430 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		adev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit);
dpm               431 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		if (adev->pm.dpm.tdp_od_limit)
dpm               432 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.power_control = true;
dpm               434 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.power_control = false;
dpm               435 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		adev->pm.dpm.tdp_adjustment = 0;
dpm               436 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);
dpm               437 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);
dpm               438 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		adev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope);
dpm               446 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.cac_leakage_table.entries = kzalloc(size, GFP_KERNEL);
dpm               447 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			if (!adev->pm.dpm.dyn_state.cac_leakage_table.entries) {
dpm               453 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) {
dpm               454 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1 =
dpm               456 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2 =
dpm               458 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3 =
dpm               461 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc =
dpm               463 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage =
dpm               469 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries;
dpm               500 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries =
dpm               502 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			if (!adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries) {
dpm               506 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count =
dpm               514 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk =
dpm               516 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk =
dpm               518 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v =
dpm               523 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.num_of_vce_states =
dpm               526 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
dpm               530 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.vce_states[i].evclk =
dpm               532 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.vce_states[i].ecclk =
dpm               534 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.vce_states[i].clk_idx =
dpm               536 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.vce_states[i].pstate =
dpm               555 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries =
dpm               557 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			if (!adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) {
dpm               561 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count =
dpm               568 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk =
dpm               570 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk =
dpm               572 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v =
dpm               587 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries =
dpm               589 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			if (!adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries) {
dpm               593 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count =
dpm               597 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk =
dpm               599 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v =
dpm               610 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table =
dpm               612 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			if (!adev->pm.dpm.dyn_state.ppm_table) {
dpm               616 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign;
dpm               617 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table->cpu_core_number =
dpm               619 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table->platform_tdp =
dpm               621 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdp =
dpm               623 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table->platform_tdc =
dpm               625 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdc =
dpm               627 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table->apu_tdp =
dpm               629 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table->dgpu_tdp =
dpm               631 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table->dgpu_ulv_power =
dpm               633 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.ppm_table->tj_max =
dpm               645 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries =
dpm               647 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			if (!adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries) {
dpm               651 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count =
dpm               655 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk =
dpm               657 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v =
dpm               668 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.cac_tdp_table =
dpm               670 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			if (!adev->pm.dpm.dyn_state.cac_tdp_table) {
dpm               678 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit =
dpm               685 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = 255;
dpm               688 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.cac_tdp_table->tdp = le16_to_cpu(pt->usTDP);
dpm               689 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.cac_tdp_table->configurable_tdp =
dpm               691 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.cac_tdp_table->tdc = le16_to_cpu(pt->usTDC);
dpm               692 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.cac_tdp_table->battery_power_limit =
dpm               694 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.cac_tdp_table->small_power_limit =
dpm               696 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.cac_tdp_table->low_cac_leakage =
dpm               698 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 			adev->pm.dpm.dyn_state.cac_tdp_table->high_cac_leakage =
dpm               707 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 					&adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk,
dpm               710 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				kfree(adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk.entries);
dpm               721 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	struct amdgpu_dpm_dynamic_state *dyn_state = &adev->pm.dpm.dyn_state;
dpm               901 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	if (idx < adev->pm.dpm.num_of_vce_states)
dpm               902 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		return &adev->pm.dpm.vce_states[idx];
dpm               449 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h 	struct amdgpu_dpm       dpm;
dpm               265 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
dpm               266 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c module_param_named(dpm, amdgpu_dpm, int, 0444);
dpm               167 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			pm = adev->pm.dpm.user_state;
dpm               171 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		pm = adev->pm.dpm.user_state;
dpm               201 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		adev->pm.dpm.user_state = state;
dpm               207 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		adev->pm.dpm.user_state = state;
dpm               299 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		level = adev->pm.dpm.forced_level;
dpm               389 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		if (adev->pm.dpm.thermal_active) {
dpm               398 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			adev->pm.dpm.forced_level = level;
dpm              1165 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
dpm              1216 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps;
dpm              1519 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		temp = adev->pm.dpm.thermal.min_temp;
dpm              1521 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		temp = adev->pm.dpm.thermal.max_temp;
dpm              1535 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		temp = adev->pm.dpm.thermal.min_hotspot_temp;
dpm              1537 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		temp = adev->pm.dpm.thermal.max_hotspot_crit_temp;
dpm              1551 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		temp = adev->pm.dpm.thermal.min_mem_temp;
dpm              1553 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		temp = adev->pm.dpm.thermal.max_mem_crit_temp;
dpm              1583 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		temp = adev->pm.dpm.thermal.max_hotspot_emergency_temp;
dpm              1586 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		temp = adev->pm.dpm.thermal.max_edge_emergency_temp;
dpm              1589 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		temp = adev->pm.dpm.thermal.max_mem_emergency_temp;
dpm              2430 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			     pm.dpm.thermal.work);
dpm              2440 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		if (temp < adev->pm.dpm.thermal.min_temp)
dpm              2442 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			dpm_state = adev->pm.dpm.user_state;
dpm              2444 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		if (adev->pm.dpm.thermal.high_to_low)
dpm              2446 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			dpm_state = adev->pm.dpm.user_state;
dpm              2450 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		adev->pm.dpm.thermal_active = true;
dpm              2452 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		adev->pm.dpm.thermal_active = false;
dpm              2453 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 	adev->pm.dpm.state = dpm_state;
dpm              2465 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 	bool single_display = (adev->pm.dpm.new_active_crtc_count < 2) ?
dpm              2485 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 	for (i = 0; i < adev->pm.dpm.num_ps; i++) {
dpm              2486 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		ps = &adev->pm.dpm.ps[i];
dpm              2519 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			if (adev->pm.dpm.uvd_ps)
dpm              2520 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 				return adev->pm.dpm.uvd_ps;
dpm              2540 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			return adev->pm.dpm.boot_ps;
dpm              2569 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		if (adev->pm.dpm.uvd_ps) {
dpm              2570 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			return adev->pm.dpm.uvd_ps;
dpm              2604 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 	if (adev->pm.dpm.user_state != adev->pm.dpm.state) {
dpm              2606 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		if ((!adev->pm.dpm.thermal_active) &&
dpm              2607 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		    (!adev->pm.dpm.uvd_active))
dpm              2608 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			adev->pm.dpm.state = adev->pm.dpm.user_state;
dpm              2610 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 	dpm_state = adev->pm.dpm.state;
dpm              2614 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		adev->pm.dpm.requested_ps = ps;
dpm              2620 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		amdgpu_dpm_print_power_state(adev, adev->pm.dpm.current_ps);
dpm              2622 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		amdgpu_dpm_print_power_state(adev, adev->pm.dpm.requested_ps);
dpm              2626 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 	ps->vce_active = adev->pm.dpm.vce_active;
dpm              2635 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		if (0 != amdgpu_dpm_check_state_equal(adev, adev->pm.dpm.current_ps, adev->pm.dpm.requested_ps, &equal))
dpm              2645 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 	adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs;
dpm              2646 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 	adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count;
dpm              2649 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		if (adev->pm.dpm.thermal_active) {
dpm              2650 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			enum amd_dpm_forced_level level = adev->pm.dpm.forced_level;
dpm              2654 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			adev->pm.dpm.forced_level = level;
dpm              2657 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 			amdgpu_dpm_force_performance_level(adev, adev->pm.dpm.forced_level);
dpm              2712 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 	for (i = 0; i < adev->pm.dpm.num_ps; i++)
dpm              2713 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 		amdgpu_dpm_print_power_state(adev, &adev->pm.dpm.ps[i]);
dpm              3018 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 				adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtc_count;
dpm                76 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm                98 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm               379 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	struct kv_power_info *pi = adev->pm.dpm.priv;
dpm               803 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm               905 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;
dpm               978 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              1039 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table;
dpm              1105 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;
dpm              1164 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              1231 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.current_ps = &pi->current_rps;
dpm              1243 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.requested_ps = &pi->requested_rps;
dpm              1361 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		amdgpu_irq_get(adev, &adev->pm.dpm.thermal.irq,
dpm              1363 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		amdgpu_irq_get(adev, &adev->pm.dpm.thermal.irq,
dpm              1374 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
dpm              1376 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
dpm              1399 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	kv_update_current_ps(adev, adev->pm.dpm.boot_ps);
dpm              1497 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;
dpm              1533 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              1549 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              1583 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table;
dpm              1614 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;
dpm              1647 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;
dpm              1778 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              1899 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.forced_level = level;
dpm              1908 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps;
dpm              2055 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;
dpm              2057 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              2059 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table;
dpm              2061 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;
dpm              2174 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              2215 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              2218 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              2221 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		new_rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;
dpm              2222 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		new_rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk;
dpm              2248 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk)
dpm              2249 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 			sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk;
dpm              2310 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 				pi->video_start || (adev->pm.dpm.new_active_crtc_count >= 3) ||
dpm              2352 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              2369 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 			      (adev->pm.dpm.new_active_crtc_count >= 3) || pi->video_start);
dpm              2419 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              2543 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.thermal.min_temp = low_temp;
dpm              2544 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.thermal.max_temp = high_temp;
dpm              2617 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 						    &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac);
dpm              2672 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		adev->pm.dpm.boot_ps = rps;
dpm              2676 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		adev->pm.dpm.uvd_ps = rps;
dpm              2735 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,
dpm              2738 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	if (!adev->pm.dpm.ps)
dpm              2749 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 			kfree(adev->pm.dpm.ps);
dpm              2752 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		adev->pm.dpm.ps[i].ps_priv = ps;
dpm              2765 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 						  &adev->pm.dpm.ps[i], k,
dpm              2769 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		kv_parse_pplib_non_clock_info(adev, &adev->pm.dpm.ps[i],
dpm              2774 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.num_ps = state_array->ucNumEntries;
dpm              2777 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
dpm              2779 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
dpm              2784 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		adev->pm.dpm.vce_states[i].sclk = sclk;
dpm              2785 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		adev->pm.dpm.vce_states[i].mclk = 0;
dpm              2799 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.priv = pi;
dpm              2915 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	for (i = 0; i < adev->pm.dpm.num_ps; i++) {
dpm              2916 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		kfree(adev->pm.dpm.ps[i].ps_priv);
dpm              2918 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	kfree(adev->pm.dpm.ps);
dpm              2919 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	kfree(adev->pm.dpm.priv);
dpm              2998 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 				&adev->pm.dpm.thermal.irq);
dpm              3003 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 				&adev->pm.dpm.thermal.irq);
dpm              3008 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.state = POWER_STATE_TYPE_BALANCED;
dpm              3009 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;
dpm              3010 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.forced_level = AMD_DPM_FORCED_LEVEL_AUTO;
dpm              3020 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	INIT_WORK(&adev->pm.dpm.thermal.work, amdgpu_dpm_thermal_work_handler);
dpm              3025 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps;
dpm              3044 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	flush_work(&adev->pm.dpm.thermal.work);
dpm              3095 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps;
dpm              3198 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		adev->pm.dpm.thermal.high_to_low = false;
dpm              3203 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		adev->pm.dpm.thermal.high_to_low = true;
dpm              3211 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		schedule_work(&adev->pm.dpm.thermal.work);
dpm              3380 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.thermal.irq.num_types = AMDGPU_THERMAL_IRQ_LAST;
dpm              3381 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	adev->pm.dpm.thermal.irq.funcs = &kv_dpm_irq_funcs;
dpm              1859 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct si_power_info *pi = adev->pm.dpm.priv;
dpm              1932 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 p_limit1 = adev->pm.dpm.tdp_limit;
dpm              1933 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 p_limit2 = adev->pm.dpm.near_tdp_limit;
dpm              1961 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct rv7xx_power_info *pi = adev->pm.dpm.priv;
dpm              1968 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct ni_power_info *pi = adev->pm.dpm.priv;
dpm              2222 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (tdp_adjustment > (u32)adev->pm.dpm.tdp_od_limit)
dpm              2225 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	max_tdp_limit = ((100 + 100) * adev->pm.dpm.tdp_limit) / 100;
dpm              2228 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		*tdp_limit = ((100 + tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100;
dpm              2229 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		*near_tdp_limit = adev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - adev->pm.dpm.tdp_limit);
dpm              2231 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		*tdp_limit = ((100 - tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100;
dpm              2232 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adjustment_delta  = adev->pm.dpm.tdp_limit - *tdp_limit;
dpm              2233 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (adjustment_delta < adev->pm.dpm.near_tdp_limit_adjusted)
dpm              2234 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			*near_tdp_limit = adev->pm.dpm.near_tdp_limit_adjusted - adjustment_delta;
dpm              2256 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		struct amdgpu_ppm_table *ppm = adev->pm.dpm.dyn_state.ppm_table;
dpm              2269 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						       adev->pm.dpm.tdp_adjustment,
dpm              2326 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			cpu_to_be32(si_scale_power_for_smc(adev->pm.dpm.near_tdp_limit_adjusted, scaling_factor) * 1000);
dpm              2328 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			cpu_to_be32(si_scale_power_for_smc((adev->pm.dpm.near_tdp_limit_adjusted * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, scaling_factor) * 1000);
dpm              2380 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct evergreen_power_info *pi = adev->pm.dpm.priv;
dpm              2494 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.sq_ramping_threshold == 0)
dpm              2516 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if ((state->performance_levels[i].sclk >= adev->pm.dpm.sq_ramping_threshold) &&
dpm              2637 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		&adev->pm.dpm.dyn_state.cac_leakage_table;
dpm              2773 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	si_pi->dyn_powertune_data.cac_leakage = adev->pm.dpm.cac_leakage;
dpm              2800 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	load_line_slope = ((u32)adev->pm.dpm.load_line_slope << SMC_SISLANDS_SCALE_R) / 100;
dpm              3041 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		&adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              3156 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.current_ps = &eg_pi->current_rps;
dpm              3169 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.requested_ps = &eg_pi->requested_rps;
dpm              3239 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_mclk_values,
dpm              3246 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_sclk_values,
dpm              3299 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > adev->pm.dpm.dyn_state.mclk_sclk_ratio)
dpm              3303 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						      (adev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) /
dpm              3304 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						      adev->pm.dpm.dyn_state.mclk_sclk_ratio);
dpm              3306 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if ((pl->sclk - pl->mclk) > adev->pm.dpm.dyn_state.sclk_mclk_delta)
dpm              3310 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						      adev->pm.dpm.dyn_state.sclk_mclk_delta);
dpm              3325 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if ((*vddc - *vddci) > adev->pm.dpm.dyn_state.vddc_vddci_delta) {
dpm              3327 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						       (*vddc - adev->pm.dpm.dyn_state.vddc_vddci_delta));
dpm              3331 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if ((*vddci - *vddc) > adev->pm.dpm.dyn_state.vddc_vddci_delta) {
dpm              3333 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						       (*vddci - adev->pm.dpm.dyn_state.vddc_vddci_delta));
dpm              3467 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;
dpm              3468 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk;
dpm              3476 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if ((adev->pm.dpm.new_active_crtc_count > 1) ||
dpm              3486 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              3488 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc;
dpm              3508 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm              3510 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              3512 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              3557 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk)
dpm              3558 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk;
dpm              3559 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (mclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk)
dpm              3560 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			mclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk;
dpm              3614 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm              3617 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              3620 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              3623 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk,
dpm              3637 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (ps->performance_levels[i].vddc > adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc)
dpm              3864 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct amdgpu_ps *rps = adev->pm.dpm.current_ps;
dpm              3888 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.forced_level = level;
dpm              4109 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	voltage_response_time = (u32)adev->pm.dpm.voltage_response_time;
dpm              4153 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.new_active_crtc_count > 0)
dpm              4158 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.new_active_crtc_count > 1)
dpm              4168 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if ((adev->pm.dpm.new_active_crtc_count > 0) &&
dpm              4169 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	    (!(adev->pm.dpm.new_active_crtcs & (1 << pipe)))) {
dpm              4172 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			if (adev->pm.dpm.new_active_crtcs & (1 << i))
dpm              4189 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	si_notify_smc_display_change(adev, adev->pm.dpm.new_active_crtc_count > 0);
dpm              4439 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              4460 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              4556 drivers/gpu/drm/amd/amdgpu/si_dpm.c 							      &adev->pm.dpm.dyn_state.phase_shedding_limits_table)) {
dpm              4618 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.dyn_state.cac_leakage_table.entries) {
dpm              4619 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE) {
dpm              4620 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL)
dpm              4623 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			for (v_index = 0; (u32)v_index < adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
dpm              4625 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				    (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
dpm              4627 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					if ((u32)v_index < adev->pm.dpm.dyn_state.cac_leakage_table.count)
dpm              4629 drivers/gpu/drm/amd/amdgpu/si_dpm.c 							adev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc;
dpm              4632 drivers/gpu/drm/amd/amdgpu/si_dpm.c 							adev->pm.dpm.dyn_state.cac_leakage_table.entries[adev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc;
dpm              4638 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				for (v_index = 0; (u32)v_index < adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
dpm              4640 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					    (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
dpm              4642 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						if ((u32)v_index < adev->pm.dpm.dyn_state.cac_leakage_table.count)
dpm              4644 drivers/gpu/drm/amd/amdgpu/si_dpm.c 								adev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc;
dpm              4647 drivers/gpu/drm/amd/amdgpu/si_dpm.c 								adev->pm.dpm.dyn_state.cac_leakage_table.entries[adev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc;
dpm              4653 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			if ((u32)voltage->index < adev->pm.dpm.dyn_state.cac_leakage_table.count)
dpm              4654 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				*std_voltage = adev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc;
dpm              4908 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						 &adev->pm.dpm.dyn_state.phase_shedding_limits_table,
dpm              4992 drivers/gpu/drm/amd/amdgpu/si_dpm.c 							 &adev->pm.dpm.dyn_state.phase_shedding_limits_table,
dpm              5020 drivers/gpu/drm/amd/amdgpu/si_dpm.c 							 &adev->pm.dpm.dyn_state.phase_shedding_limits_table,
dpm              5160 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct amdgpu_ps *amdgpu_boot_state = adev->pm.dpm.boot_ps;
dpm              5182 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC)
dpm              5185 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT) {
dpm              5190 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
dpm              5196 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY)
dpm              5199 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE) {
dpm              5201 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		vr_hot_gpio = adev->pm.dpm.backbias_response_time;
dpm              5467 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	    (adev->pm.dpm.new_active_crtc_count <= 2)) {
dpm              5532 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						       &adev->pm.dpm.dyn_state.phase_shedding_limits_table,
dpm              5622 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	for (i = 0; i < adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count; i++) {
dpm              5624 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		    adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) {
dpm              5626 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			    adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v)
dpm              5782 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.new_active_crtc_count == 0)
dpm              5786 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (adev->pm.dpm.new_active_crtcs & (1 << i)) {
dpm              6358 drivers/gpu/drm/amd/amdgpu/si_dpm.c 								&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk);
dpm              6362 drivers/gpu/drm/amd/amdgpu/si_dpm.c 								&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk);
dpm              6366 drivers/gpu/drm/amd/amdgpu/si_dpm.c 								&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk);
dpm              6437 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.thermal.min_temp = low_temp;
dpm              6438 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.thermal.max_temp = high_temp;
dpm              6477 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.fan.ucode_fan_control = false;
dpm              6484 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.fan.ucode_fan_control = false;
dpm              6488 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	tmp64 = (u64)adev->pm.dpm.fan.pwm_min * duty100;
dpm              6492 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	t_diff1 = adev->pm.dpm.fan.t_med - adev->pm.dpm.fan.t_min;
dpm              6493 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	t_diff2 = adev->pm.dpm.fan.t_high - adev->pm.dpm.fan.t_med;
dpm              6495 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	pwm_diff1 = adev->pm.dpm.fan.pwm_med - adev->pm.dpm.fan.pwm_min;
dpm              6496 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	pwm_diff2 = adev->pm.dpm.fan.pwm_high - adev->pm.dpm.fan.pwm_med;
dpm              6501 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	fan_table.temp_min = cpu_to_be16((50 + adev->pm.dpm.fan.t_min) / 100);
dpm              6502 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	fan_table.temp_med = cpu_to_be16((50 + adev->pm.dpm.fan.t_med) / 100);
dpm              6503 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	fan_table.temp_max = cpu_to_be16((50 + adev->pm.dpm.fan.t_max) / 100);
dpm              6507 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	fan_table.hys_down = cpu_to_be16(adev->pm.dpm.fan.t_hyst);
dpm              6513 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	fan_table.refresh_period = cpu_to_be32((adev->pm.dpm.fan.cycle_delay *
dpm              6528 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.fan.ucode_fan_control = false;
dpm              6629 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (adev->pm.dpm.fan.ucode_fan_control)
dpm              6634 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (adev->pm.dpm.fan.ucode_fan_control)
dpm              6692 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.fan.ucode_fan_control)
dpm              6725 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.fan.ucode_fan_control) {
dpm              6757 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.fan.ucode_fan_control) {
dpm              6786 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct amdgpu_ps *boot_ps = adev->pm.dpm.boot_ps;
dpm              6917 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct amdgpu_ps *boot_ps = adev->pm.dpm.boot_ps;
dpm              6942 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct amdgpu_ps requested_ps = *adev->pm.dpm.requested_ps;
dpm              6953 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct amdgpu_ps *new_ps = adev->pm.dpm.requested_ps;
dpm              7127 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.boot_ps = rps;
dpm              7129 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.uvd_ps = rps;
dpm              7201 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;
dpm              7202 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
dpm              7203 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;
dpm              7204 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;
dpm              7247 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,
dpm              7250 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (!adev->pm.dpm.ps)
dpm              7261 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			kfree(adev->pm.dpm.ps);
dpm              7264 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.ps[i].ps_priv = ps;
dpm              7265 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		si_parse_pplib_non_clock_info(adev, &adev->pm.dpm.ps[i],
dpm              7280 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						  &adev->pm.dpm.ps[i], k,
dpm              7286 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.num_ps = state_array->ucNumEntries;
dpm              7289 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
dpm              7291 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
dpm              7298 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.vce_states[i].sclk = sclk;
dpm              7299 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.vce_states[i].mclk = mclk;
dpm              7317 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.priv = si_pi;
dpm              7350 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries =
dpm              7354 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (!adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) {
dpm              7358 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4;
dpm              7359 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;
dpm              7360 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0;
dpm              7361 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;
dpm              7362 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720;
dpm              7363 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;
dpm              7364 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810;
dpm              7365 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;
dpm              7366 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900;
dpm              7368 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.voltage_response_time == 0)
dpm              7369 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT;
dpm              7370 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.backbias_response_time == 0)
dpm              7371 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT;
dpm              7448 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.mclk_sclk_ratio = 4;
dpm              7449 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.sclk_mclk_delta = 15000;
dpm              7450 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.vddc_vddci_delta = 200;
dpm              7451 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.valid_sclk_values.count = 0;
dpm              7452 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.valid_sclk_values.values = NULL;
dpm              7453 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.valid_mclk_values.count = 0;
dpm              7454 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.dyn_state.valid_mclk_values.values = NULL;
dpm              7459 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if ((adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
dpm              7460 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	    (adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))
dpm              7461 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.dyn_state.max_clock_voltage_on_dc =
dpm              7462 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			adev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              7473 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (adev->pm.dpm.ps)
dpm              7474 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		for (i = 0; i < adev->pm.dpm.num_ps; i++)
dpm              7475 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			kfree(adev->pm.dpm.ps[i].ps_priv);
dpm              7476 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	kfree(adev->pm.dpm.ps);
dpm              7477 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	kfree(adev->pm.dpm.priv);
dpm              7478 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	kfree(adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries);
dpm              7564 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.thermal.high_to_low = false;
dpm              7569 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.thermal.high_to_low = true;
dpm              7577 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		schedule_work(&adev->pm.dpm.thermal.work);
dpm              7693 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 230, &adev->pm.dpm.thermal.irq);
dpm              7697 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 231, &adev->pm.dpm.thermal.irq);
dpm              7702 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.state = POWER_STATE_TYPE_BALANCED;
dpm              7703 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;
dpm              7704 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.forced_level = AMD_DPM_FORCED_LEVEL_AUTO;
dpm              7718 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	INIT_WORK(&adev->pm.dpm.thermal.work, amdgpu_dpm_thermal_work_handler);
dpm              7723 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps;
dpm              7742 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	flush_work(&adev->pm.dpm.thermal.work);
dpm              7794 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps;
dpm              8078 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.thermal.irq.num_types = AMDGPU_THERMAL_IRQ_LAST;
dpm              8079 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	adev->pm.dpm.thermal.irq.funcs = &si_dpm_irq_funcs;
dpm               249 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	adev->pm.dpm.thermal.min_temp = range.min;
dpm               250 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	adev->pm.dpm.thermal.max_temp = range.max;
dpm               251 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	adev->pm.dpm.thermal.max_edge_emergency_temp = range.edge_emergency_max;
dpm               252 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	adev->pm.dpm.thermal.min_hotspot_temp = range.hotspot_min;
dpm               253 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	adev->pm.dpm.thermal.max_hotspot_crit_temp = range.hotspot_crit_max;
dpm               254 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	adev->pm.dpm.thermal.max_hotspot_emergency_temp = range.hotspot_emergency_max;
dpm               255 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	adev->pm.dpm.thermal.min_mem_temp = range.mem_min;
dpm               256 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	adev->pm.dpm.thermal.max_mem_crit_temp = range.mem_crit_max;
dpm               257 drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c 	adev->pm.dpm.thermal.max_mem_emergency_temp = range.mem_emergency_max;
dpm              1206 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	adev->pm.dpm.thermal.min_temp = range.min;
dpm              1207 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	adev->pm.dpm.thermal.max_temp = range.max;
dpm              1208 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	adev->pm.dpm.thermal.max_edge_emergency_temp = range.edge_emergency_max;
dpm              1209 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	adev->pm.dpm.thermal.min_hotspot_temp = range.hotspot_min;
dpm              1210 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	adev->pm.dpm.thermal.max_hotspot_crit_temp = range.hotspot_crit_max;
dpm              1211 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	adev->pm.dpm.thermal.max_hotspot_emergency_temp = range.hotspot_emergency_max;
dpm              1212 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	adev->pm.dpm.thermal.min_mem_temp = range.mem_min;
dpm              1213 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	adev->pm.dpm.thermal.max_mem_crit_temp = range.mem_crit_max;
dpm              1214 drivers/gpu/drm/amd/powerplay/smu_v11_0.c 	adev->pm.dpm.thermal.max_mem_emergency_temp = range.mem_emergency_max;
dpm              1232 drivers/gpu/drm/radeon/btc_dpm.c 	return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_mclk_values,
dpm              1239 drivers/gpu/drm/radeon/btc_dpm.c 	return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values,
dpm              1282 drivers/gpu/drm/radeon/btc_dpm.c 		if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio)
dpm              1286 drivers/gpu/drm/radeon/btc_dpm.c 						       (rdev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) /
dpm              1287 drivers/gpu/drm/radeon/btc_dpm.c 						      rdev->pm.dpm.dyn_state.mclk_sclk_ratio);
dpm              1289 drivers/gpu/drm/radeon/btc_dpm.c 		if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta)
dpm              1293 drivers/gpu/drm/radeon/btc_dpm.c 						      rdev->pm.dpm.dyn_state.sclk_mclk_delta);
dpm              1320 drivers/gpu/drm/radeon/btc_dpm.c 		if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) {
dpm              1322 drivers/gpu/drm/radeon/btc_dpm.c 						       (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta));
dpm              1326 drivers/gpu/drm/radeon/btc_dpm.c 		if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) {
dpm              1328 drivers/gpu/drm/radeon/btc_dpm.c 						       (*vddci - rdev->pm.dpm.dyn_state.vddc_vddci_delta));
dpm              1653 drivers/gpu/drm/radeon/btc_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC)
dpm              1656 drivers/gpu/drm/radeon/btc_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT)
dpm              1659 drivers/gpu/drm/radeon/btc_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
dpm              2105 drivers/gpu/drm/radeon/btc_dpm.c 	if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
dpm              2111 drivers/gpu/drm/radeon/btc_dpm.c 	if (rdev->pm.dpm.ac_power)
dpm              2112 drivers/gpu/drm/radeon/btc_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              2114 drivers/gpu/drm/radeon/btc_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;
dpm              2116 drivers/gpu/drm/radeon/btc_dpm.c 	if (rdev->pm.dpm.ac_power == false) {
dpm              2210 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm              2212 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              2214 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              2216 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk,
dpm              2219 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm              2221 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              2223 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              2225 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk,
dpm              2228 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm              2230 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              2232 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              2234 drivers/gpu/drm/radeon/btc_dpm.c 	btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk,
dpm              2244 drivers/gpu/drm/radeon/btc_dpm.c 	if ((ps->high.vddc <= rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) &&
dpm              2245 drivers/gpu/drm/radeon/btc_dpm.c 	    (ps->medium.vddc <= rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) &&
dpm              2246 drivers/gpu/drm/radeon/btc_dpm.c 	    (ps->low.vddc <= rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc))
dpm              2251 drivers/gpu/drm/radeon/btc_dpm.c 	if (ps->low.vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2)
dpm              2253 drivers/gpu/drm/radeon/btc_dpm.c 	if (ps->medium.vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2)
dpm              2255 drivers/gpu/drm/radeon/btc_dpm.c 	if (ps->high.vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2)
dpm              2294 drivers/gpu/drm/radeon/btc_dpm.c 	struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
dpm              2381 drivers/gpu/drm/radeon/btc_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              2419 drivers/gpu/drm/radeon/btc_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS)
dpm              2489 drivers/gpu/drm/radeon/btc_dpm.c 	btc_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
dpm              2530 drivers/gpu/drm/radeon/btc_dpm.c 	btc_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
dpm              2563 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.priv = eg_pi;
dpm              2585 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries =
dpm              2589 drivers/gpu/drm/radeon/btc_dpm.c 	if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) {
dpm              2593 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4;
dpm              2594 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;
dpm              2595 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0;
dpm              2596 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;
dpm              2597 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 800;
dpm              2598 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;
dpm              2599 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 800;
dpm              2600 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;
dpm              2601 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 800;
dpm              2603 drivers/gpu/drm/radeon/btc_dpm.c 	if (rdev->pm.dpm.voltage_response_time == 0)
dpm              2604 drivers/gpu/drm/radeon/btc_dpm.c 		rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT;
dpm              2605 drivers/gpu/drm/radeon/btc_dpm.c 	if (rdev->pm.dpm.backbias_response_time == 0)
dpm              2606 drivers/gpu/drm/radeon/btc_dpm.c 		rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT;
dpm              2701 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.mclk_sclk_ratio = 4;
dpm              2702 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.vddc_vddci_delta = 200;
dpm              2703 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2 = 900;
dpm              2704 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.count = ARRAY_SIZE(btc_valid_sclk);
dpm              2705 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.values = btc_valid_sclk;
dpm              2706 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0;
dpm              2707 drivers/gpu/drm/radeon/btc_dpm.c 	rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL;
dpm              2710 drivers/gpu/drm/radeon/btc_dpm.c 		rdev->pm.dpm.dyn_state.sclk_mclk_delta = 15000;
dpm              2712 drivers/gpu/drm/radeon/btc_dpm.c 		rdev->pm.dpm.dyn_state.sclk_mclk_delta = 10000;
dpm              2715 drivers/gpu/drm/radeon/btc_dpm.c 	if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
dpm              2716 drivers/gpu/drm/radeon/btc_dpm.c 	    (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))
dpm              2717 drivers/gpu/drm/radeon/btc_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc =
dpm              2718 drivers/gpu/drm/radeon/btc_dpm.c 			rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              2727 drivers/gpu/drm/radeon/btc_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              2728 drivers/gpu/drm/radeon/btc_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm              2730 drivers/gpu/drm/radeon/btc_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm              2731 drivers/gpu/drm/radeon/btc_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm              2732 drivers/gpu/drm/radeon/btc_dpm.c 	kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries);
dpm               198 drivers/gpu/drm/radeon/ci_dpm.c 	struct ci_power_info *pi = rdev->pm.dpm.priv;
dpm               283 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL)
dpm               285 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.dyn_state.cac_leakage_table.count > 8)
dpm               287 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.dyn_state.cac_leakage_table.count !=
dpm               288 drivers/gpu/drm/radeon/ci_dpm.c 	    rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count)
dpm               291 drivers/gpu/drm/radeon/ci_dpm.c 	for (i = 0; i < rdev->pm.dpm.dyn_state.cac_leakage_table.count; i++) {
dpm               292 drivers/gpu/drm/radeon/ci_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) {
dpm               293 drivers/gpu/drm/radeon/ci_dpm.c 			lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1);
dpm               294 drivers/gpu/drm/radeon/ci_dpm.c 			hi_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2);
dpm               295 drivers/gpu/drm/radeon/ci_dpm.c 			hi2_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3);
dpm               297 drivers/gpu/drm/radeon/ci_dpm.c 			lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc);
dpm               298 drivers/gpu/drm/radeon/ci_dpm.c 			hi_vid[i] = ci_convert_to_vid((u16)rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage);
dpm               338 drivers/gpu/drm/radeon/ci_dpm.c 	tdc_limit = rdev->pm.dpm.dyn_state.cac_tdp_table->tdc * 256;
dpm               371 drivers/gpu/drm/radeon/ci_dpm.c 	if ((rdev->pm.dpm.fan.fan_output_sensitivity & (1 << 15)) ||
dpm               372 drivers/gpu/drm/radeon/ci_dpm.c 	    (rdev->pm.dpm.fan.fan_output_sensitivity == 0))
dpm               373 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.fan.fan_output_sensitivity =
dpm               374 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.fan.default_fan_output_sensitivity;
dpm               377 drivers/gpu/drm/radeon/ci_dpm.c 		cpu_to_be16(rdev->pm.dpm.fan.fan_output_sensitivity);
dpm               420 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.dyn_state.cac_tdp_table;
dpm               437 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.dyn_state.cac_tdp_table;
dpm               438 drivers/gpu/drm/radeon/ci_dpm.c 	struct radeon_ppm_table *ppm = rdev->pm.dpm.dyn_state.ppm_table;
dpm               672 drivers/gpu/drm/radeon/ci_dpm.c 						rdev->pm.dpm.dyn_state.cac_tdp_table;
dpm               746 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.dyn_state.cac_tdp_table;
dpm               754 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.tdp_adjustment : (-1 * rdev->pm.dpm.tdp_adjustment);
dpm               806 drivers/gpu/drm/radeon/ci_dpm.c 		rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
dpm               807 drivers/gpu/drm/radeon/ci_dpm.c 		rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
dpm               813 drivers/gpu/drm/radeon/ci_dpm.c 	if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
dpm               824 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.ac_power)
dpm               825 drivers/gpu/drm/radeon/ci_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm               827 drivers/gpu/drm/radeon/ci_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;
dpm               829 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.ac_power == false) {
dpm               849 drivers/gpu/drm/radeon/ci_dpm.c 		if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk)
dpm               850 drivers/gpu/drm/radeon/ci_dpm.c 			sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk;
dpm               851 drivers/gpu/drm/radeon/ci_dpm.c 		if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk)
dpm               852 drivers/gpu/drm/radeon/ci_dpm.c 			mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk;
dpm               900 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.thermal.min_temp = low_temp;
dpm               901 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.thermal.max_temp = high_temp;
dpm               969 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.fan.ucode_fan_control = false;
dpm               976 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.fan.ucode_fan_control = false;
dpm               980 drivers/gpu/drm/radeon/ci_dpm.c 	tmp64 = (u64)rdev->pm.dpm.fan.pwm_min * duty100;
dpm               984 drivers/gpu/drm/radeon/ci_dpm.c 	t_diff1 = rdev->pm.dpm.fan.t_med - rdev->pm.dpm.fan.t_min;
dpm               985 drivers/gpu/drm/radeon/ci_dpm.c 	t_diff2 = rdev->pm.dpm.fan.t_high - rdev->pm.dpm.fan.t_med;
dpm               987 drivers/gpu/drm/radeon/ci_dpm.c 	pwm_diff1 = rdev->pm.dpm.fan.pwm_med - rdev->pm.dpm.fan.pwm_min;
dpm               988 drivers/gpu/drm/radeon/ci_dpm.c 	pwm_diff2 = rdev->pm.dpm.fan.pwm_high - rdev->pm.dpm.fan.pwm_med;
dpm               993 drivers/gpu/drm/radeon/ci_dpm.c 	fan_table.TempMin = cpu_to_be16((50 + rdev->pm.dpm.fan.t_min) / 100);
dpm               994 drivers/gpu/drm/radeon/ci_dpm.c 	fan_table.TempMed = cpu_to_be16((50 + rdev->pm.dpm.fan.t_med) / 100);
dpm               995 drivers/gpu/drm/radeon/ci_dpm.c 	fan_table.TempMax = cpu_to_be16((50 + rdev->pm.dpm.fan.t_max) / 100);
dpm              1002 drivers/gpu/drm/radeon/ci_dpm.c 	fan_table.HystDown = cpu_to_be16(rdev->pm.dpm.fan.t_hyst);
dpm              1012 drivers/gpu/drm/radeon/ci_dpm.c 	fan_table.RefreshPeriod = cpu_to_be32((rdev->pm.dpm.fan.cycle_delay *
dpm              1028 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.fan.ucode_fan_control = false;
dpm              1047 drivers/gpu/drm/radeon/ci_dpm.c 							rdev->pm.dpm.fan.default_max_fan_pwm);
dpm              1137 drivers/gpu/drm/radeon/ci_dpm.c 		if (rdev->pm.dpm.fan.ucode_fan_control)
dpm              1142 drivers/gpu/drm/radeon/ci_dpm.c 		if (rdev->pm.dpm.fan.ucode_fan_control)
dpm              1199 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.fan.ucode_fan_control)
dpm              1232 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.fan.ucode_fan_control) {
dpm              1264 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.fan.ucode_fan_control) {
dpm              1348 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) {
dpm              1450 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT)
dpm              1636 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.dyn_state.cac_tdp_table;
dpm              1995 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.new_active_crtc_count > 0)
dpm              2015 drivers/gpu/drm/radeon/ci_dpm.c 	ci_notify_smc_display_change(rdev, (rdev->pm.dpm.new_active_crtc_count == 1));
dpm              2147 drivers/gpu/drm/radeon/ci_dpm.c 						&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              2165 drivers/gpu/drm/radeon/ci_dpm.c 						&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              2183 drivers/gpu/drm/radeon/ci_dpm.c 						&rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk,
dpm              2314 drivers/gpu/drm/radeon/ci_dpm.c 		for (i = 0; i < rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count; i++) {
dpm              2315 drivers/gpu/drm/radeon/ci_dpm.c 			if (mclk <= rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries[i].clk) {
dpm              2321 drivers/gpu/drm/radeon/ci_dpm.c 		if (i >= rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.count)
dpm              2337 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL)
dpm              2340 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries) {
dpm              2341 drivers/gpu/drm/radeon/ci_dpm.c 		for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
dpm              2343 drivers/gpu/drm/radeon/ci_dpm.c 			    rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
dpm              2345 drivers/gpu/drm/radeon/ci_dpm.c 				if ((u32)v_index < rdev->pm.dpm.dyn_state.cac_leakage_table.count)
dpm              2348 drivers/gpu/drm/radeon/ci_dpm.c 					idx = rdev->pm.dpm.dyn_state.cac_leakage_table.count - 1;
dpm              2350 drivers/gpu/drm/radeon/ci_dpm.c 					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].vddc * VOLTAGE_SCALE;
dpm              2352 drivers/gpu/drm/radeon/ci_dpm.c 					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].leakage * VOLTAGE_SCALE;
dpm              2358 drivers/gpu/drm/radeon/ci_dpm.c 			for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
dpm              2360 drivers/gpu/drm/radeon/ci_dpm.c 				    rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
dpm              2362 drivers/gpu/drm/radeon/ci_dpm.c 					if ((u32)v_index < rdev->pm.dpm.dyn_state.cac_leakage_table.count)
dpm              2365 drivers/gpu/drm/radeon/ci_dpm.c 						idx = rdev->pm.dpm.dyn_state.cac_leakage_table.count - 1;
dpm              2367 drivers/gpu/drm/radeon/ci_dpm.c 						rdev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].vddc * VOLTAGE_SCALE;
dpm              2369 drivers/gpu/drm/radeon/ci_dpm.c 						rdev->pm.dpm.dyn_state.cac_leakage_table.entries[idx].leakage * VOLTAGE_SCALE;
dpm              2593 drivers/gpu/drm/radeon/ci_dpm.c 	for (level = 0; level < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; level++) {
dpm              2594 drivers/gpu/drm/radeon/ci_dpm.c 		if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[level].clk >=
dpm              2601 drivers/gpu/drm/radeon/ci_dpm.c 	for (level = 0; level < rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.count; level++) {
dpm              2602 drivers/gpu/drm/radeon/ci_dpm.c 		if (rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries[level].clk >=
dpm              2656 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count;
dpm              2660 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].vclk;
dpm              2662 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].dclk;
dpm              2664 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE;
dpm              2699 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count;
dpm              2703 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].evclk;
dpm              2705 drivers/gpu/drm/radeon/ci_dpm.c 			(u16)rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE;
dpm              2732 drivers/gpu/drm/radeon/ci_dpm.c 		(rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count);
dpm              2736 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[count].clk;
dpm              2738 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[count].v;
dpm              2764 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count;
dpm              2768 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[count].clk;
dpm              2770 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE;
dpm              2883 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries) {
dpm              2885 drivers/gpu/drm/radeon/ci_dpm.c 						    &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              2891 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries) {
dpm              2893 drivers/gpu/drm/radeon/ci_dpm.c 						    &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              2899 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries) {
dpm              2901 drivers/gpu/drm/radeon/ci_dpm.c 						    &rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk,
dpm              2911 drivers/gpu/drm/radeon/ci_dpm.c 						      &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
dpm              2933 drivers/gpu/drm/radeon/ci_dpm.c 	    (rdev->pm.dpm.new_active_crtc_count <= 2))
dpm              3126 drivers/gpu/drm/radeon/ci_dpm.c 	u16 ulv_voltage = rdev->pm.dpm.backbias_response_time;
dpm              3137 drivers/gpu/drm/radeon/ci_dpm.c 		if (ulv_voltage > rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v)
dpm              3141 drivers/gpu/drm/radeon/ci_dpm.c 				rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage;
dpm              3143 drivers/gpu/drm/radeon/ci_dpm.c 		if (ulv_voltage > rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v)
dpm              3147 drivers/gpu/drm/radeon/ci_dpm.c 				((rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage) *
dpm              3228 drivers/gpu/drm/radeon/ci_dpm.c 					    &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm              3240 drivers/gpu/drm/radeon/ci_dpm.c 						      &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
dpm              3445 drivers/gpu/drm/radeon/ci_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              3447 drivers/gpu/drm/radeon/ci_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk;
dpm              3449 drivers/gpu/drm/radeon/ci_dpm.c 		&rdev->pm.dpm.dyn_state.cac_leakage_table;
dpm              3514 drivers/gpu/drm/radeon/ci_dpm.c 	allowed_mclk_table = &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk;
dpm              3524 drivers/gpu/drm/radeon/ci_dpm.c 	allowed_mclk_table = &rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk;
dpm              3559 drivers/gpu/drm/radeon/ci_dpm.c 	struct radeon_ps *radeon_boot_state = rdev->pm.dpm.boot_ps;
dpm              3572 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC)
dpm              3575 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
dpm              3786 drivers/gpu/drm/radeon/ci_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk;
dpm              3788 drivers/gpu/drm/radeon/ci_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              3892 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.current_active_crtc_count !=
dpm              3893 drivers/gpu/drm/radeon/ci_dpm.c 	    rdev->pm.dpm.new_active_crtc_count)
dpm              3937 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.ac_power)
dpm              3938 drivers/gpu/drm/radeon/ci_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              3940 drivers/gpu/drm/radeon/ci_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;
dpm              3945 drivers/gpu/drm/radeon/ci_dpm.c 		for (i = rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count - 1; i >= 0; i--) {
dpm              3946 drivers/gpu/drm/radeon/ci_dpm.c 			if (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) {
dpm              3986 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.ac_power)
dpm              3987 drivers/gpu/drm/radeon/ci_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              3989 drivers/gpu/drm/radeon/ci_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;
dpm              3993 drivers/gpu/drm/radeon/ci_dpm.c 		for (i = rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count - 1; i >= 0; i--) {
dpm              3994 drivers/gpu/drm/radeon/ci_dpm.c 			if (rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) {
dpm              4019 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.ac_power)
dpm              4020 drivers/gpu/drm/radeon/ci_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              4022 drivers/gpu/drm/radeon/ci_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;
dpm              4026 drivers/gpu/drm/radeon/ci_dpm.c 		for (i = rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count - 1; i >= 0; i--) {
dpm              4027 drivers/gpu/drm/radeon/ci_dpm.c 			if (rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) {
dpm              4050 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.ac_power)
dpm              4051 drivers/gpu/drm/radeon/ci_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              4053 drivers/gpu/drm/radeon/ci_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;
dpm              4057 drivers/gpu/drm/radeon/ci_dpm.c 		for (i = rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count - 1; i >= 0; i--) {
dpm              4058 drivers/gpu/drm/radeon/ci_dpm.c 			if (rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) {
dpm              4084 drivers/gpu/drm/radeon/ci_dpm.c 		    (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count <= 0))
dpm              4088 drivers/gpu/drm/radeon/ci_dpm.c 				rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count - 1;
dpm              4104 drivers/gpu/drm/radeon/ci_dpm.c 		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              4331 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.forced_level = level;
dpm              4921 drivers/gpu/drm/radeon/ci_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              4923 drivers/gpu/drm/radeon/ci_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk;
dpm              4925 drivers/gpu/drm/radeon/ci_dpm.c 		&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk;
dpm              4948 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk =
dpm              4950 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk =
dpm              4952 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc =
dpm              4954 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci =
dpm              5067 drivers/gpu/drm/radeon/ci_dpm.c 								  &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk);
dpm              5069 drivers/gpu/drm/radeon/ci_dpm.c 								  &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk);
dpm              5071 drivers/gpu/drm/radeon/ci_dpm.c 								  &rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk);
dpm              5073 drivers/gpu/drm/radeon/ci_dpm.c 								   &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk);
dpm              5075 drivers/gpu/drm/radeon/ci_dpm.c 								      &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table);
dpm              5077 drivers/gpu/drm/radeon/ci_dpm.c 								      &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table);
dpm              5079 drivers/gpu/drm/radeon/ci_dpm.c 								  &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table);
dpm              5081 drivers/gpu/drm/radeon/ci_dpm.c 								  &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table);
dpm              5083 drivers/gpu/drm/radeon/ci_dpm.c 							       &rdev->pm.dpm.dyn_state.phase_shedding_limits_table);
dpm              5085 drivers/gpu/drm/radeon/ci_dpm.c 							&rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac);
dpm              5087 drivers/gpu/drm/radeon/ci_dpm.c 							&rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc);
dpm              5089 drivers/gpu/drm/radeon/ci_dpm.c 						     &rdev->pm.dpm.dyn_state.cac_leakage_table);
dpm              5133 drivers/gpu/drm/radeon/ci_dpm.c 	struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
dpm              5168 drivers/gpu/drm/radeon/ci_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              5323 drivers/gpu/drm/radeon/ci_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              5469 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.boot_ps = rps;
dpm              5471 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.uvd_ps = rps;
dpm              5575 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,
dpm              5578 drivers/gpu/drm/radeon/ci_dpm.c 	if (!rdev->pm.dpm.ps)
dpm              5591 drivers/gpu/drm/radeon/ci_dpm.c 			kfree(rdev->pm.dpm.ps);
dpm              5594 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.ps[i].ps_priv = ps;
dpm              5595 drivers/gpu/drm/radeon/ci_dpm.c 		ci_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
dpm              5610 drivers/gpu/drm/radeon/ci_dpm.c 						  &rdev->pm.dpm.ps[i], k,
dpm              5616 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.num_ps = state_array->ucNumEntries;
dpm              5621 drivers/gpu/drm/radeon/ci_dpm.c 		clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx;
dpm              5628 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.vce_states[i].sclk = sclk;
dpm              5629 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.vce_states[i].mclk = mclk;
dpm              5666 drivers/gpu/drm/radeon/ci_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              5667 drivers/gpu/drm/radeon/ci_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm              5669 drivers/gpu/drm/radeon/ci_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm              5670 drivers/gpu/drm/radeon/ci_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm              5671 drivers/gpu/drm/radeon/ci_dpm.c 	kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries);
dpm              5690 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.priv = pi;
dpm              5788 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries =
dpm              5792 drivers/gpu/drm/radeon/ci_dpm.c 	if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) {
dpm              5796 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4;
dpm              5797 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;
dpm              5798 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0;
dpm              5799 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;
dpm              5800 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720;
dpm              5801 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;
dpm              5802 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810;
dpm              5803 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;
dpm              5804 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900;
dpm              5806 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.mclk_sclk_ratio = 4;
dpm              5807 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.sclk_mclk_delta = 15000;
dpm              5808 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.vddc_vddci_delta = 200;
dpm              5810 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.count = 0;
dpm              5811 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.values = NULL;
dpm              5812 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0;
dpm              5813 drivers/gpu/drm/radeon/ci_dpm.c 	rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL;
dpm              5832 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.platform_caps |= ATOM_PP_PLATFORM_CAP_REGULATOR_HOT;
dpm              5835 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.platform_caps &= ~ATOM_PP_PLATFORM_CAP_REGULATOR_HOT;
dpm              5841 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.platform_caps |= ATOM_PP_PLATFORM_CAP_HARDWAREDC;
dpm              5844 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.platform_caps &= ~ATOM_PP_PLATFORM_CAP_HARDWAREDC;
dpm              5884 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL) {
dpm              5890 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.platform_caps &= ~ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL;
dpm              5893 drivers/gpu/drm/radeon/ci_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_MVDDCONTROL) {
dpm              5899 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.platform_caps &= ~ATOM_PP_PLATFORM_CAP_MVDDCONTROL;
dpm              5932 drivers/gpu/drm/radeon/ci_dpm.c 	if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
dpm              5933 drivers/gpu/drm/radeon/ci_dpm.c 	    (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))
dpm              5934 drivers/gpu/drm/radeon/ci_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc =
dpm              5935 drivers/gpu/drm/radeon/ci_dpm.c 			rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              8044 drivers/gpu/drm/radeon/cik.c 			rdev->pm.dpm.thermal.high_to_low = false;
dpm              8049 drivers/gpu/drm/radeon/cik.c 			rdev->pm.dpm.thermal.high_to_low = true;
dpm              8113 drivers/gpu/drm/radeon/cik.c 		schedule_work(&rdev->pm.dpm.thermal.work);
dpm              1636 drivers/gpu/drm/radeon/cypress_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC)
dpm              1639 drivers/gpu/drm/radeon/cypress_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT)
dpm              1642 drivers/gpu/drm/radeon/cypress_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
dpm              1749 drivers/gpu/drm/radeon/cypress_dpm.c 	if (rdev->pm.dpm.new_active_crtc_count > 0)
dpm              1754 drivers/gpu/drm/radeon/cypress_dpm.c 	if (rdev->pm.dpm.new_active_crtc_count > 1)
dpm              1764 drivers/gpu/drm/radeon/cypress_dpm.c 	if ((rdev->pm.dpm.new_active_crtc_count > 0) &&
dpm              1765 drivers/gpu/drm/radeon/cypress_dpm.c 	    (!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) {
dpm              1768 drivers/gpu/drm/radeon/cypress_dpm.c 			if (rdev->pm.dpm.new_active_crtcs & (1 << i))
dpm              1781 drivers/gpu/drm/radeon/cypress_dpm.c 	cypress_notify_smc_display_change(rdev, rdev->pm.dpm.new_active_crtc_count > 0);
dpm              1808 drivers/gpu/drm/radeon/cypress_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              1843 drivers/gpu/drm/radeon/cypress_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS)
dpm              1919 drivers/gpu/drm/radeon/cypress_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              1958 drivers/gpu/drm/radeon/cypress_dpm.c 	struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
dpm              1959 drivers/gpu/drm/radeon/cypress_dpm.c 	struct radeon_ps *old_ps = rdev->pm.dpm.current_ps;
dpm              2032 drivers/gpu/drm/radeon/cypress_dpm.c 	rdev->pm.dpm.priv = eg_pi;
dpm              2051 drivers/gpu/drm/radeon/cypress_dpm.c 	if (rdev->pm.dpm.voltage_response_time == 0)
dpm              2052 drivers/gpu/drm/radeon/cypress_dpm.c 		rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT;
dpm              2053 drivers/gpu/drm/radeon/cypress_dpm.c 	if (rdev->pm.dpm.backbias_response_time == 0)
dpm              2054 drivers/gpu/drm/radeon/cypress_dpm.c 		rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT;
dpm              2147 drivers/gpu/drm/radeon/cypress_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              2148 drivers/gpu/drm/radeon/cypress_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm              2150 drivers/gpu/drm/radeon/cypress_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm              2151 drivers/gpu/drm/radeon/cypress_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm              4886 drivers/gpu/drm/radeon/evergreen.c 			rdev->pm.dpm.thermal.high_to_low = false;
dpm              4891 drivers/gpu/drm/radeon/evergreen.c 			rdev->pm.dpm.thermal.high_to_low = true;
dpm              4920 drivers/gpu/drm/radeon/evergreen.c 		schedule_work(&rdev->pm.dpm.thermal.work);
dpm               253 drivers/gpu/drm/radeon/kv_dpm.c 	struct kv_power_info *pi = rdev->pm.dpm.priv;
dpm               558 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm               580 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm               721 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm               823 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;
dpm               896 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm               957 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table;
dpm              1023 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;
dpm              1082 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              1282 drivers/gpu/drm/radeon/kv_dpm.c 	kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
dpm              1331 drivers/gpu/drm/radeon/kv_dpm.c 	kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
dpm              1429 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;
dpm              1465 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              1481 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              1522 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table;
dpm              1553 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;
dpm              1586 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;
dpm              1714 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              1834 drivers/gpu/drm/radeon/kv_dpm.c 	rdev->pm.dpm.forced_level = level;
dpm              1842 drivers/gpu/drm/radeon/kv_dpm.c 	struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
dpm              1862 drivers/gpu/drm/radeon/kv_dpm.c 		ret = kv_smc_bapm_enable(rdev, rdev->pm.dpm.ac_power);
dpm              1989 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;
dpm              1991 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              1993 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table;
dpm              1995 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;
dpm              2109 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              2150 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              2153 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              2156 drivers/gpu/drm/radeon/kv_dpm.c 		new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
dpm              2157 drivers/gpu/drm/radeon/kv_dpm.c 		new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
dpm              2183 drivers/gpu/drm/radeon/kv_dpm.c 		if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk)
dpm              2184 drivers/gpu/drm/radeon/kv_dpm.c 			sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk;
dpm              2245 drivers/gpu/drm/radeon/kv_dpm.c 				pi->video_start || (rdev->pm.dpm.new_active_crtc_count >= 3) ||
dpm              2287 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              2304 drivers/gpu/drm/radeon/kv_dpm.c 			      (rdev->pm.dpm.new_active_crtc_count >= 3) || pi->video_start);
dpm              2354 drivers/gpu/drm/radeon/kv_dpm.c 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
dpm              2475 drivers/gpu/drm/radeon/kv_dpm.c 	rdev->pm.dpm.thermal.min_temp = low_temp;
dpm              2476 drivers/gpu/drm/radeon/kv_dpm.c 	rdev->pm.dpm.thermal.max_temp = high_temp;
dpm              2549 drivers/gpu/drm/radeon/kv_dpm.c 						    &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac);
dpm              2604 drivers/gpu/drm/radeon/kv_dpm.c 		rdev->pm.dpm.boot_ps = rps;
dpm              2608 drivers/gpu/drm/radeon/kv_dpm.c 		rdev->pm.dpm.uvd_ps = rps;
dpm              2665 drivers/gpu/drm/radeon/kv_dpm.c 	rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,
dpm              2668 drivers/gpu/drm/radeon/kv_dpm.c 	if (!rdev->pm.dpm.ps)
dpm              2681 drivers/gpu/drm/radeon/kv_dpm.c 			kfree(rdev->pm.dpm.ps);
dpm              2684 drivers/gpu/drm/radeon/kv_dpm.c 		rdev->pm.dpm.ps[i].ps_priv = ps;
dpm              2697 drivers/gpu/drm/radeon/kv_dpm.c 						  &rdev->pm.dpm.ps[i], k,
dpm              2701 drivers/gpu/drm/radeon/kv_dpm.c 		kv_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
dpm              2706 drivers/gpu/drm/radeon/kv_dpm.c 	rdev->pm.dpm.num_ps = state_array->ucNumEntries;
dpm              2711 drivers/gpu/drm/radeon/kv_dpm.c 		clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx;
dpm              2716 drivers/gpu/drm/radeon/kv_dpm.c 		rdev->pm.dpm.vce_states[i].sclk = sclk;
dpm              2717 drivers/gpu/drm/radeon/kv_dpm.c 		rdev->pm.dpm.vce_states[i].mclk = 0;
dpm              2731 drivers/gpu/drm/radeon/kv_dpm.c 	rdev->pm.dpm.priv = pi;
dpm              2871 drivers/gpu/drm/radeon/kv_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              2872 drivers/gpu/drm/radeon/kv_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm              2874 drivers/gpu/drm/radeon/kv_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm              2875 drivers/gpu/drm/radeon/kv_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm               730 drivers/gpu/drm/radeon/ni_dpm.c 	struct ni_power_info *pi = rdev->pm.dpm.priv;
dpm               797 drivers/gpu/drm/radeon/ni_dpm.c 	if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
dpm               803 drivers/gpu/drm/radeon/ni_dpm.c 	if (rdev->pm.dpm.ac_power)
dpm               804 drivers/gpu/drm/radeon/ni_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm               806 drivers/gpu/drm/radeon/ni_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;
dpm               808 drivers/gpu/drm/radeon/ni_dpm.c 	if (rdev->pm.dpm.ac_power == false) {
dpm               875 drivers/gpu/drm/radeon/ni_dpm.c 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm               878 drivers/gpu/drm/radeon/ni_dpm.c 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm               881 drivers/gpu/drm/radeon/ni_dpm.c 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm               884 drivers/gpu/drm/radeon/ni_dpm.c 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk,
dpm               898 drivers/gpu/drm/radeon/ni_dpm.c 		if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc)
dpm               901 drivers/gpu/drm/radeon/ni_dpm.c 		if (ps->performance_levels[i].vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2)
dpm              1014 drivers/gpu/drm/radeon/ni_dpm.c 								&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk);
dpm              1017 drivers/gpu/drm/radeon/ni_dpm.c 								&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk);
dpm              1077 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.forced_level = level;
dpm              1230 drivers/gpu/drm/radeon/ni_dpm.c 	voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time;
dpm              1231 drivers/gpu/drm/radeon/ni_dpm.c 	backbias_response_time = (u32)rdev->pm.dpm.backbias_response_time;
dpm              1348 drivers/gpu/drm/radeon/ni_dpm.c 	if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries &&
dpm              1349 drivers/gpu/drm/radeon/ni_dpm.c 	    ((u32)voltage->index < rdev->pm.dpm.dyn_state.cac_leakage_table.count))
dpm              1350 drivers/gpu/drm/radeon/ni_dpm.c 		*std_voltage = rdev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc;
dpm              1440 drivers/gpu/drm/radeon/ni_dpm.c 	if (tdp_adjustment > (u32)rdev->pm.dpm.tdp_od_limit)
dpm              1444 drivers/gpu/drm/radeon/ni_dpm.c 		*tdp_limit = ((100 + tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100;
dpm              1445 drivers/gpu/drm/radeon/ni_dpm.c 		*near_tdp_limit = rdev->pm.dpm.near_tdp_limit + (*tdp_limit - rdev->pm.dpm.tdp_limit);
dpm              1447 drivers/gpu/drm/radeon/ni_dpm.c 		*tdp_limit = ((100 - tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100;
dpm              1448 drivers/gpu/drm/radeon/ni_dpm.c 		*near_tdp_limit = rdev->pm.dpm.near_tdp_limit - (rdev->pm.dpm.tdp_limit - *tdp_limit);
dpm              1475 drivers/gpu/drm/radeon/ni_dpm.c 						       rdev->pm.dpm.tdp_adjustment,
dpm              1945 drivers/gpu/drm/radeon/ni_dpm.c 	struct radeon_ps *radeon_boot_state = rdev->pm.dpm.boot_ps;
dpm              1965 drivers/gpu/drm/radeon/ni_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC)
dpm              1968 drivers/gpu/drm/radeon/ni_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT)
dpm              1971 drivers/gpu/drm/radeon/ni_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
dpm              2478 drivers/gpu/drm/radeon/ni_dpm.c 					       rdev->pm.dpm.tdp_adjustment,
dpm              2553 drivers/gpu/drm/radeon/ni_dpm.c 	if (rdev->pm.dpm.sq_ramping_threshold == 0)
dpm              2575 drivers/gpu/drm/radeon/ni_dpm.c 		if ((state->performance_levels[i].sclk >= rdev->pm.dpm.sq_ramping_threshold) &&
dpm              3098 drivers/gpu/drm/radeon/ni_dpm.c 		&rdev->pm.dpm.dyn_state.cac_leakage_table;
dpm              3165 drivers/gpu/drm/radeon/ni_dpm.c 	ni_pi->cac_data.i_leakage = rdev->pm.dpm.cac_leakage;
dpm              3589 drivers/gpu/drm/radeon/ni_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              3707 drivers/gpu/drm/radeon/ni_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              3743 drivers/gpu/drm/radeon/ni_dpm.c 	struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
dpm              3768 drivers/gpu/drm/radeon/ni_dpm.c 	struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
dpm              3915 drivers/gpu/drm/radeon/ni_dpm.c 		rdev->pm.dpm.boot_ps = rps;
dpm              3917 drivers/gpu/drm/radeon/ni_dpm.c 		rdev->pm.dpm.uvd_ps = rps;
dpm              3978 drivers/gpu/drm/radeon/ni_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;
dpm              3979 drivers/gpu/drm/radeon/ni_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
dpm              3980 drivers/gpu/drm/radeon/ni_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;
dpm              3981 drivers/gpu/drm/radeon/ni_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;
dpm              4003 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates,
dpm              4006 drivers/gpu/drm/radeon/ni_dpm.c 	if (!rdev->pm.dpm.ps)
dpm              4023 drivers/gpu/drm/radeon/ni_dpm.c 				kfree(rdev->pm.dpm.ps);
dpm              4026 drivers/gpu/drm/radeon/ni_dpm.c 			rdev->pm.dpm.ps[i].ps_priv = ps;
dpm              4027 drivers/gpu/drm/radeon/ni_dpm.c 			ni_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
dpm              4037 drivers/gpu/drm/radeon/ni_dpm.c 							  &rdev->pm.dpm.ps[i], j,
dpm              4042 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates;
dpm              4057 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.priv = ni_pi;
dpm              4080 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries =
dpm              4084 drivers/gpu/drm/radeon/ni_dpm.c 	if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) {
dpm              4088 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4;
dpm              4089 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;
dpm              4090 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0;
dpm              4091 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;
dpm              4092 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720;
dpm              4093 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;
dpm              4094 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810;
dpm              4095 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;
dpm              4096 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900;
dpm              4100 drivers/gpu/drm/radeon/ni_dpm.c 	if (rdev->pm.dpm.voltage_response_time == 0)
dpm              4101 drivers/gpu/drm/radeon/ni_dpm.c 		rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT;
dpm              4102 drivers/gpu/drm/radeon/ni_dpm.c 	if (rdev->pm.dpm.backbias_response_time == 0)
dpm              4103 drivers/gpu/drm/radeon/ni_dpm.c 		rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT;
dpm              4197 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.mclk_sclk_ratio = 3;
dpm              4198 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.vddc_vddci_delta = 200;
dpm              4199 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2 = 900;
dpm              4200 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.count = ARRAY_SIZE(btc_valid_sclk);
dpm              4201 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.values = btc_valid_sclk;
dpm              4202 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0;
dpm              4203 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL;
dpm              4204 drivers/gpu/drm/radeon/ni_dpm.c 	rdev->pm.dpm.dyn_state.sclk_mclk_delta = 12500;
dpm              4261 drivers/gpu/drm/radeon/ni_dpm.c 	if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
dpm              4262 drivers/gpu/drm/radeon/ni_dpm.c 	    (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))
dpm              4263 drivers/gpu/drm/radeon/ni_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc =
dpm              4264 drivers/gpu/drm/radeon/ni_dpm.c 			rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              4273 drivers/gpu/drm/radeon/ni_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              4274 drivers/gpu/drm/radeon/ni_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm              4276 drivers/gpu/drm/radeon/ni_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm              4277 drivers/gpu/drm/radeon/ni_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm              4278 drivers/gpu/drm/radeon/ni_dpm.c 	kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries);
dpm              4306 drivers/gpu/drm/radeon/r600.c 			rdev->pm.dpm.thermal.high_to_low = false;
dpm              4311 drivers/gpu/drm/radeon/r600.c 			rdev->pm.dpm.thermal.high_to_low = true;
dpm              4332 drivers/gpu/drm/radeon/r600.c 		schedule_work(&rdev->pm.dpm.thermal.work);
dpm               147 drivers/gpu/drm/radeon/r600_dpm.c 	if (rps == rdev->pm.dpm.current_ps)
dpm               149 drivers/gpu/drm/radeon/r600_dpm.c 	if (rps == rdev->pm.dpm.requested_ps)
dpm               151 drivers/gpu/drm/radeon/r600_dpm.c 	if (rps == rdev->pm.dpm.boot_ps)
dpm               758 drivers/gpu/drm/radeon/r600_dpm.c 	rdev->pm.dpm.thermal.min_temp = low_temp;
dpm               759 drivers/gpu/drm/radeon/r600_dpm.c 	rdev->pm.dpm.thermal.max_temp = high_temp;
dpm               858 drivers/gpu/drm/radeon/r600_dpm.c 	rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);
dpm               859 drivers/gpu/drm/radeon/r600_dpm.c 	rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);
dpm               860 drivers/gpu/drm/radeon/r600_dpm.c 	rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);
dpm               895 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst;
dpm               896 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);
dpm               897 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);
dpm               898 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);
dpm               899 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin);
dpm               900 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.fan.pwm_med = le16_to_cpu(fan_info->fan.usPWMMed);
dpm               901 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.fan.pwm_high = le16_to_cpu(fan_info->fan.usPWMHigh);
dpm               903 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.fan.t_max = le16_to_cpu(fan_info->fan2.usTMax);
dpm               905 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.fan.t_max = 10900;
dpm               906 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.fan.cycle_delay = 100000;
dpm               908 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.fan.control_mode = fan_info->fan3.ucFanControlMode;
dpm               909 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.fan.default_max_fan_pwm =
dpm               911 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.fan.default_fan_output_sensitivity = 4836;
dpm               912 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.fan.fan_output_sensitivity =
dpm               915 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.fan.ucode_fan_control = true;
dpm               926 drivers/gpu/drm/radeon/r600_dpm.c 			ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm               935 drivers/gpu/drm/radeon/r600_dpm.c 			ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm               938 drivers/gpu/drm/radeon/r600_dpm.c 				kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries);
dpm               946 drivers/gpu/drm/radeon/r600_dpm.c 			ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm               949 drivers/gpu/drm/radeon/r600_dpm.c 				kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries);
dpm               950 drivers/gpu/drm/radeon/r600_dpm.c 				kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries);
dpm               958 drivers/gpu/drm/radeon/r600_dpm.c 			ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk,
dpm               961 drivers/gpu/drm/radeon/r600_dpm.c 				kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries);
dpm               962 drivers/gpu/drm/radeon/r600_dpm.c 				kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries);
dpm               963 drivers/gpu/drm/radeon/r600_dpm.c 				kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries);
dpm               973 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk =
dpm               976 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk =
dpm               979 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc =
dpm               981 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci =
dpm               992 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries =
dpm               996 drivers/gpu/drm/radeon/r600_dpm.c 			if (!rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) {
dpm              1003 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk =
dpm              1005 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk =
dpm              1007 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage =
dpm              1012 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count =
dpm              1020 drivers/gpu/drm/radeon/r600_dpm.c 		rdev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);
dpm              1021 drivers/gpu/drm/radeon/r600_dpm.c 		rdev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);
dpm              1022 drivers/gpu/drm/radeon/r600_dpm.c 		rdev->pm.dpm.near_tdp_limit_adjusted = rdev->pm.dpm.near_tdp_limit;
dpm              1023 drivers/gpu/drm/radeon/r600_dpm.c 		rdev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit);
dpm              1024 drivers/gpu/drm/radeon/r600_dpm.c 		if (rdev->pm.dpm.tdp_od_limit)
dpm              1025 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.power_control = true;
dpm              1027 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.power_control = false;
dpm              1028 drivers/gpu/drm/radeon/r600_dpm.c 		rdev->pm.dpm.tdp_adjustment = 0;
dpm              1029 drivers/gpu/drm/radeon/r600_dpm.c 		rdev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);
dpm              1030 drivers/gpu/drm/radeon/r600_dpm.c 		rdev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);
dpm              1031 drivers/gpu/drm/radeon/r600_dpm.c 		rdev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope);
dpm              1039 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.cac_leakage_table.entries = kzalloc(size, GFP_KERNEL);
dpm              1040 drivers/gpu/drm/radeon/r600_dpm.c 			if (!rdev->pm.dpm.dyn_state.cac_leakage_table.entries) {
dpm              1046 drivers/gpu/drm/radeon/r600_dpm.c 				if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) {
dpm              1047 drivers/gpu/drm/radeon/r600_dpm.c 					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1 =
dpm              1049 drivers/gpu/drm/radeon/r600_dpm.c 					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2 =
dpm              1051 drivers/gpu/drm/radeon/r600_dpm.c 					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3 =
dpm              1054 drivers/gpu/drm/radeon/r600_dpm.c 					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc =
dpm              1056 drivers/gpu/drm/radeon/r600_dpm.c 					rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage =
dpm              1062 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries;
dpm              1093 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries =
dpm              1095 drivers/gpu/drm/radeon/r600_dpm.c 			if (!rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries) {
dpm              1099 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count =
dpm              1107 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk =
dpm              1109 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk =
dpm              1111 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v =
dpm              1122 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.vce_states[i].evclk =
dpm              1124 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.vce_states[i].ecclk =
dpm              1126 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.vce_states[i].clk_idx =
dpm              1128 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.vce_states[i].pstate =
dpm              1147 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries =
dpm              1149 drivers/gpu/drm/radeon/r600_dpm.c 			if (!rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) {
dpm              1153 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count =
dpm              1160 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk =
dpm              1162 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk =
dpm              1164 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v =
dpm              1179 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries =
dpm              1181 drivers/gpu/drm/radeon/r600_dpm.c 			if (!rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries) {
dpm              1185 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count =
dpm              1189 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk =
dpm              1191 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v =
dpm              1202 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table =
dpm              1204 drivers/gpu/drm/radeon/r600_dpm.c 			if (!rdev->pm.dpm.dyn_state.ppm_table) {
dpm              1208 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign;
dpm              1209 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table->cpu_core_number =
dpm              1211 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table->platform_tdp =
dpm              1213 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdp =
dpm              1215 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table->platform_tdc =
dpm              1217 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdc =
dpm              1219 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table->apu_tdp =
dpm              1221 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table->dgpu_tdp =
dpm              1223 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table->dgpu_ulv_power =
dpm              1225 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.ppm_table->tj_max =
dpm              1237 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries =
dpm              1239 drivers/gpu/drm/radeon/r600_dpm.c 			if (!rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries) {
dpm              1243 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count =
dpm              1247 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk =
dpm              1249 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v =
dpm              1260 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.cac_tdp_table =
dpm              1262 drivers/gpu/drm/radeon/r600_dpm.c 			if (!rdev->pm.dpm.dyn_state.cac_tdp_table) {
dpm              1270 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit =
dpm              1277 drivers/gpu/drm/radeon/r600_dpm.c 				rdev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = 255;
dpm              1280 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.cac_tdp_table->tdp = le16_to_cpu(pt->usTDP);
dpm              1281 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.cac_tdp_table->configurable_tdp =
dpm              1283 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.cac_tdp_table->tdc = le16_to_cpu(pt->usTDC);
dpm              1284 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.cac_tdp_table->battery_power_limit =
dpm              1286 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.cac_tdp_table->small_power_limit =
dpm              1288 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.cac_tdp_table->low_cac_leakage =
dpm              1290 drivers/gpu/drm/radeon/r600_dpm.c 			rdev->pm.dpm.dyn_state.cac_tdp_table->high_cac_leakage =
dpm              1300 drivers/gpu/drm/radeon/r600_dpm.c 	struct radeon_dpm_dynamic_state *dyn_state = &rdev->pm.dpm.dyn_state;
dpm              1649 drivers/gpu/drm/radeon/radeon.h 	struct radeon_dpm       dpm;
dpm              1990 drivers/gpu/drm/radeon/radeon.h 	} dpm;
dpm              2770 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_init(rdev) rdev->asic->dpm.init((rdev))
dpm              2771 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_setup_asic(rdev) rdev->asic->dpm.setup_asic((rdev))
dpm              2772 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_enable(rdev) rdev->asic->dpm.enable((rdev))
dpm              2773 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_late_enable(rdev) rdev->asic->dpm.late_enable((rdev))
dpm              2774 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_disable(rdev) rdev->asic->dpm.disable((rdev))
dpm              2775 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_pre_set_power_state(rdev) rdev->asic->dpm.pre_set_power_state((rdev))
dpm              2776 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_set_power_state(rdev) rdev->asic->dpm.set_power_state((rdev))
dpm              2777 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_post_set_power_state(rdev) rdev->asic->dpm.post_set_power_state((rdev))
dpm              2778 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_display_configuration_changed(rdev) rdev->asic->dpm.display_configuration_changed((rdev))
dpm              2779 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_fini(rdev) rdev->asic->dpm.fini((rdev))
dpm              2780 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_sclk(rdev, l) rdev->asic->dpm.get_sclk((rdev), (l))
dpm              2781 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_mclk(rdev, l) rdev->asic->dpm.get_mclk((rdev), (l))
dpm              2782 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_print_power_state(rdev, ps) rdev->asic->dpm.print_power_state((rdev), (ps))
dpm              2783 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_debugfs_print_current_performance_level(rdev, m) rdev->asic->dpm.debugfs_print_current_performance_level((rdev), (m))
dpm              2784 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_force_performance_level(rdev, l) rdev->asic->dpm.force_performance_level((rdev), (l))
dpm              2785 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_vblank_too_short(rdev) rdev->asic->dpm.vblank_too_short((rdev))
dpm              2786 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_powergate_uvd(rdev, g) rdev->asic->dpm.powergate_uvd((rdev), (g))
dpm              2787 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_enable_bapm(rdev, e) rdev->asic->dpm.enable_bapm((rdev), (e))
dpm              2788 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_current_sclk(rdev) rdev->asic->dpm.get_current_sclk((rdev))
dpm              2789 drivers/gpu/drm/radeon/radeon.h #define radeon_dpm_get_current_mclk(rdev) rdev->asic->dpm.get_current_mclk((rdev))
dpm              1085 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              1178 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              1284 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              1404 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              1498 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              1591 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              1739 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              1860 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              1998 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              2168 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              2281 drivers/gpu/drm/radeon/radeon_asic.c 	.dpm = {
dpm              3316 drivers/gpu/drm/radeon/radeon_atombios.c 	u32 count = rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count;
dpm              3320 drivers/gpu/drm/radeon/radeon_atombios.c 		if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v ==
dpm              3332 drivers/gpu/drm/radeon/radeon_atombios.c 		cpu_to_le32(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk);
dpm               265 drivers/gpu/drm/radeon/radeon_drv.c MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
dpm               266 drivers/gpu/drm/radeon/radeon_drv.c module_param_named(dpm, radeon_dpm, int, 0444);
dpm               520 drivers/gpu/drm/radeon/radeon_kms.c 			*value = rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10;
dpm                79 drivers/gpu/drm/radeon/radeon_pm.c 			rdev->pm.dpm.ac_power = true;
dpm                81 drivers/gpu/drm/radeon/radeon_pm.c 			rdev->pm.dpm.ac_power = false;
dpm                83 drivers/gpu/drm/radeon/radeon_pm.c 			if (rdev->asic->dpm.enable_bapm)
dpm                84 drivers/gpu/drm/radeon/radeon_pm.c 				radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power);
dpm               473 drivers/gpu/drm/radeon/radeon_pm.c 	enum radeon_pm_state_type pm = rdev->pm.dpm.user_state;
dpm               490 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY;
dpm               492 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;
dpm               494 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE;
dpm               517 drivers/gpu/drm/radeon/radeon_pm.c 	enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;
dpm               554 drivers/gpu/drm/radeon/radeon_pm.c 	if (rdev->asic->dpm.force_performance_level) {
dpm               555 drivers/gpu/drm/radeon/radeon_pm.c 		if (rdev->pm.dpm.thermal_active) {
dpm               576 drivers/gpu/drm/radeon/radeon_pm.c 	if (rdev->asic->dpm.fan_ctrl_get_mode)
dpm               577 drivers/gpu/drm/radeon/radeon_pm.c 		pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev);
dpm               592 drivers/gpu/drm/radeon/radeon_pm.c 	if(!rdev->asic->dpm.fan_ctrl_set_mode)
dpm               601 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC);
dpm               604 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0);
dpm               639 drivers/gpu/drm/radeon/radeon_pm.c 	err = rdev->asic->dpm.set_fan_speed_percent(rdev, value);
dpm               654 drivers/gpu/drm/radeon/radeon_pm.c 	err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed);
dpm               700 drivers/gpu/drm/radeon/radeon_pm.c 		temp = rdev->pm.dpm.thermal.min_temp;
dpm               702 drivers/gpu/drm/radeon/radeon_pm.c 		temp = rdev->pm.dpm.thermal.max_temp;
dpm               753 drivers/gpu/drm/radeon/radeon_pm.c 	if ((!rdev->asic->dpm.get_fan_speed_percent &&
dpm               755 drivers/gpu/drm/radeon/radeon_pm.c 	    (!rdev->asic->dpm.fan_ctrl_get_mode &&
dpm               759 drivers/gpu/drm/radeon/radeon_pm.c 	if ((!rdev->asic->dpm.set_fan_speed_percent &&
dpm               761 drivers/gpu/drm/radeon/radeon_pm.c 	    (!rdev->asic->dpm.fan_ctrl_set_mode &&
dpm               766 drivers/gpu/drm/radeon/radeon_pm.c 	if ((!rdev->asic->dpm.set_fan_speed_percent &&
dpm               767 drivers/gpu/drm/radeon/radeon_pm.c 	     !rdev->asic->dpm.get_fan_speed_percent) &&
dpm               826 drivers/gpu/drm/radeon/radeon_pm.c 			     pm.dpm.thermal.work);
dpm               836 drivers/gpu/drm/radeon/radeon_pm.c 		if (temp < rdev->pm.dpm.thermal.min_temp)
dpm               838 drivers/gpu/drm/radeon/radeon_pm.c 			dpm_state = rdev->pm.dpm.user_state;
dpm               840 drivers/gpu/drm/radeon/radeon_pm.c 		if (rdev->pm.dpm.thermal.high_to_low)
dpm               842 drivers/gpu/drm/radeon/radeon_pm.c 			dpm_state = rdev->pm.dpm.user_state;
dpm               846 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.thermal_active = true;
dpm               848 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.thermal_active = false;
dpm               849 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.state = dpm_state;
dpm               857 drivers/gpu/drm/radeon/radeon_pm.c 	bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ?
dpm               861 drivers/gpu/drm/radeon/radeon_pm.c 	if (single_display && rdev->asic->dpm.vblank_too_short) {
dpm               894 drivers/gpu/drm/radeon/radeon_pm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm               895 drivers/gpu/drm/radeon/radeon_pm.c 		ps = &rdev->pm.dpm.ps[i];
dpm               928 drivers/gpu/drm/radeon/radeon_pm.c 			if (rdev->pm.dpm.uvd_ps)
dpm               929 drivers/gpu/drm/radeon/radeon_pm.c 				return rdev->pm.dpm.uvd_ps;
dpm               949 drivers/gpu/drm/radeon/radeon_pm.c 			return rdev->pm.dpm.boot_ps;
dpm               978 drivers/gpu/drm/radeon/radeon_pm.c 		if (rdev->pm.dpm.uvd_ps) {
dpm               979 drivers/gpu/drm/radeon/radeon_pm.c 			return rdev->pm.dpm.uvd_ps;
dpm              1014 drivers/gpu/drm/radeon/radeon_pm.c 	if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) {
dpm              1016 drivers/gpu/drm/radeon/radeon_pm.c 		if ((!rdev->pm.dpm.thermal_active) &&
dpm              1017 drivers/gpu/drm/radeon/radeon_pm.c 		    (!rdev->pm.dpm.uvd_active))
dpm              1018 drivers/gpu/drm/radeon/radeon_pm.c 			rdev->pm.dpm.state = rdev->pm.dpm.user_state;
dpm              1020 drivers/gpu/drm/radeon/radeon_pm.c 	dpm_state = rdev->pm.dpm.state;
dpm              1024 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.requested_ps = ps;
dpm              1029 drivers/gpu/drm/radeon/radeon_pm.c 	if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) {
dpm              1031 drivers/gpu/drm/radeon/radeon_pm.c 		if (ps->vce_active != rdev->pm.dpm.vce_active)
dpm              1034 drivers/gpu/drm/radeon/radeon_pm.c 		if (rdev->pm.dpm.single_display != single_display)
dpm              1040 drivers/gpu/drm/radeon/radeon_pm.c 			if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) {
dpm              1045 drivers/gpu/drm/radeon/radeon_pm.c 				rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
dpm              1046 drivers/gpu/drm/radeon/radeon_pm.c 				rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
dpm              1054 drivers/gpu/drm/radeon/radeon_pm.c 			if (rdev->pm.dpm.new_active_crtcs ==
dpm              1055 drivers/gpu/drm/radeon/radeon_pm.c 			    rdev->pm.dpm.current_active_crtcs) {
dpm              1058 drivers/gpu/drm/radeon/radeon_pm.c 				if ((rdev->pm.dpm.current_active_crtc_count > 1) &&
dpm              1059 drivers/gpu/drm/radeon/radeon_pm.c 				    (rdev->pm.dpm.new_active_crtc_count > 1)) {
dpm              1064 drivers/gpu/drm/radeon/radeon_pm.c 					rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
dpm              1065 drivers/gpu/drm/radeon/radeon_pm.c 					rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
dpm              1075 drivers/gpu/drm/radeon/radeon_pm.c 		radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps);
dpm              1077 drivers/gpu/drm/radeon/radeon_pm.c 		radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps);
dpm              1084 drivers/gpu/drm/radeon/radeon_pm.c 	ps->vce_active = rdev->pm.dpm.vce_active;
dpm              1106 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps;
dpm              1110 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
dpm              1111 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
dpm              1112 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.single_display = single_display;
dpm              1114 drivers/gpu/drm/radeon/radeon_pm.c 	if (rdev->asic->dpm.force_performance_level) {
dpm              1115 drivers/gpu/drm/radeon/radeon_pm.c 		if (rdev->pm.dpm.thermal_active) {
dpm              1116 drivers/gpu/drm/radeon/radeon_pm.c 			enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;
dpm              1120 drivers/gpu/drm/radeon/radeon_pm.c 			rdev->pm.dpm.forced_level = level;
dpm              1123 drivers/gpu/drm/radeon/radeon_pm.c 			radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level);
dpm              1136 drivers/gpu/drm/radeon/radeon_pm.c 	if (rdev->asic->dpm.powergate_uvd) {
dpm              1140 drivers/gpu/drm/radeon/radeon_pm.c 		enable |= rdev->pm.dpm.sd > 0;
dpm              1141 drivers/gpu/drm/radeon/radeon_pm.c 		enable |= rdev->pm.dpm.hd > 0;
dpm              1148 drivers/gpu/drm/radeon/radeon_pm.c 			rdev->pm.dpm.uvd_active = true;
dpm              1151 drivers/gpu/drm/radeon/radeon_pm.c 			if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0))
dpm              1153 drivers/gpu/drm/radeon/radeon_pm.c 			else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0))
dpm              1155 drivers/gpu/drm/radeon/radeon_pm.c 			else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1))
dpm              1157 drivers/gpu/drm/radeon/radeon_pm.c 			else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2))
dpm              1162 drivers/gpu/drm/radeon/radeon_pm.c 			rdev->pm.dpm.state = dpm_state;
dpm              1166 drivers/gpu/drm/radeon/radeon_pm.c 			rdev->pm.dpm.uvd_active = false;
dpm              1178 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.vce_active = true;
dpm              1180 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL;
dpm              1184 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.vce_active = false;
dpm              1209 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;
dpm              1265 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;
dpm              1361 drivers/gpu/drm/radeon/radeon_pm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              1363 drivers/gpu/drm/radeon/radeon_pm.c 		radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]);
dpm              1372 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED;
dpm              1373 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;
dpm              1374 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;
dpm              1391 drivers/gpu/drm/radeon/radeon_pm.c 	INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler);
dpm              1394 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;
dpm              1730 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.new_active_crtcs = 0;
dpm              1731 drivers/gpu/drm/radeon/radeon_pm.c 	rdev->pm.dpm.new_active_crtc_count = 0;
dpm              1737 drivers/gpu/drm/radeon/radeon_pm.c 				rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id);
dpm              1738 drivers/gpu/drm/radeon/radeon_pm.c 				rdev->pm.dpm.new_active_crtc_count++;
dpm              1745 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.ac_power = true;
dpm              1747 drivers/gpu/drm/radeon/radeon_pm.c 		rdev->pm.dpm.ac_power = false;
dpm              1876 drivers/gpu/drm/radeon/radeon_pm.c 		if (rdev->asic->dpm.debugfs_print_current_performance_level)
dpm               877 drivers/gpu/drm/radeon/radeon_uvd.c 			radeon_uvd_count_handles(rdev, &rdev->pm.dpm.sd,
dpm               878 drivers/gpu/drm/radeon/radeon_uvd.c 						 &rdev->pm.dpm.hd);
dpm               899 drivers/gpu/drm/radeon/radeon_uvd.c 		if ((rdev->pm.dpm.sd != sd) ||
dpm               900 drivers/gpu/drm/radeon/radeon_uvd.c 		    (rdev->pm.dpm.hd != hd)) {
dpm               901 drivers/gpu/drm/radeon/radeon_uvd.c 			rdev->pm.dpm.sd = sd;
dpm               902 drivers/gpu/drm/radeon/radeon_uvd.c 			rdev->pm.dpm.hd = hd;
dpm                45 drivers/gpu/drm/radeon/rs780_dpm.c 	struct igp_power_info *pi = rdev->pm.dpm.priv;
dpm               382 drivers/gpu/drm/radeon/rs780_dpm.c 	struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps);
dpm               409 drivers/gpu/drm/radeon/rs780_dpm.c 	struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps);
dpm               602 drivers/gpu/drm/radeon/rs780_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm               654 drivers/gpu/drm/radeon/rs780_dpm.c 	struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
dpm               655 drivers/gpu/drm/radeon/rs780_dpm.c 	struct radeon_ps *old_ps = rdev->pm.dpm.current_ps;
dpm               744 drivers/gpu/drm/radeon/rs780_dpm.c 		rdev->pm.dpm.boot_ps = rps;
dpm               746 drivers/gpu/drm/radeon/rs780_dpm.c 		rdev->pm.dpm.uvd_ps = rps;
dpm               809 drivers/gpu/drm/radeon/rs780_dpm.c 	rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates,
dpm               812 drivers/gpu/drm/radeon/rs780_dpm.c 	if (!rdev->pm.dpm.ps)
dpm               833 drivers/gpu/drm/radeon/rs780_dpm.c 				kfree(rdev->pm.dpm.ps);
dpm               836 drivers/gpu/drm/radeon/rs780_dpm.c 			rdev->pm.dpm.ps[i].ps_priv = ps;
dpm               837 drivers/gpu/drm/radeon/rs780_dpm.c 			rs780_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
dpm               841 drivers/gpu/drm/radeon/rs780_dpm.c 						     &rdev->pm.dpm.ps[i],
dpm               845 drivers/gpu/drm/radeon/rs780_dpm.c 	rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates;
dpm               861 drivers/gpu/drm/radeon/rs780_dpm.c 	rdev->pm.dpm.priv = pi;
dpm               959 drivers/gpu/drm/radeon/rs780_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm               960 drivers/gpu/drm/radeon/rs780_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm               962 drivers/gpu/drm/radeon/rs780_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm               963 drivers/gpu/drm/radeon/rs780_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm               968 drivers/gpu/drm/radeon/rs780_dpm.c 	struct igp_ps *requested_state = rs780_get_ps(rdev->pm.dpm.requested_ps);
dpm               986 drivers/gpu/drm/radeon/rs780_dpm.c 	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
dpm              1033 drivers/gpu/drm/radeon/rs780_dpm.c 	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
dpm              1076 drivers/gpu/drm/radeon/rs780_dpm.c 	rdev->pm.dpm.forced_level = level;
dpm                45 drivers/gpu/drm/radeon/rv6xx_dpm.c 	struct rv6xx_power_info *pi = rdev->pm.dpm.priv;
dpm               921 drivers/gpu/drm/radeon/rv6xx_dpm.c 							  rdev->pm.dpm.voltage_response_time,
dpm               925 drivers/gpu/drm/radeon/rv6xx_dpm.c 					   rdev->pm.dpm.backbias_response_time,
dpm              1185 drivers/gpu/drm/radeon/rv6xx_dpm.c 	if (rdev->pm.dpm.new_active_crtcs & 1) {
dpm              1188 drivers/gpu/drm/radeon/rv6xx_dpm.c 	} else if (rdev->pm.dpm.new_active_crtcs & 2) {
dpm              1298 drivers/gpu/drm/radeon/rv6xx_dpm.c 		msleep((rdev->pm.dpm.voltage_response_time + 999) / 1000);
dpm              1548 drivers/gpu/drm/radeon/rv6xx_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              1553 drivers/gpu/drm/radeon/rv6xx_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS)
dpm              1615 drivers/gpu/drm/radeon/rv6xx_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              1633 drivers/gpu/drm/radeon/rv6xx_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS)
dpm              1659 drivers/gpu/drm/radeon/rv6xx_dpm.c 	struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
dpm              1660 drivers/gpu/drm/radeon/rv6xx_dpm.c 	struct radeon_ps *old_ps = rdev->pm.dpm.current_ps;
dpm              1683 drivers/gpu/drm/radeon/rv6xx_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
dpm              1687 drivers/gpu/drm/radeon/rv6xx_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS)
dpm              1696 drivers/gpu/drm/radeon/rv6xx_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS)
dpm              1700 drivers/gpu/drm/radeon/rv6xx_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
dpm              1702 drivers/gpu/drm/radeon/rv6xx_dpm.c 		msleep((rdev->pm.dpm.voltage_response_time + 999) / 1000);
dpm              1720 drivers/gpu/drm/radeon/rv6xx_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) {
dpm              1728 drivers/gpu/drm/radeon/rv6xx_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS)
dpm              1759 drivers/gpu/drm/radeon/rv6xx_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L0s)
dpm              1761 drivers/gpu/drm/radeon/rv6xx_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L1)
dpm              1763 drivers/gpu/drm/radeon/rv6xx_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1)
dpm              1811 drivers/gpu/drm/radeon/rv6xx_dpm.c 		rdev->pm.dpm.boot_ps = rps;
dpm              1813 drivers/gpu/drm/radeon/rv6xx_dpm.c 		rdev->pm.dpm.uvd_ps = rps;
dpm              1890 drivers/gpu/drm/radeon/rv6xx_dpm.c 	rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates,
dpm              1893 drivers/gpu/drm/radeon/rv6xx_dpm.c 	if (!rdev->pm.dpm.ps)
dpm              1910 drivers/gpu/drm/radeon/rv6xx_dpm.c 				kfree(rdev->pm.dpm.ps);
dpm              1913 drivers/gpu/drm/radeon/rv6xx_dpm.c 			rdev->pm.dpm.ps[i].ps_priv = ps;
dpm              1914 drivers/gpu/drm/radeon/rv6xx_dpm.c 			rv6xx_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
dpm              1923 drivers/gpu/drm/radeon/rv6xx_dpm.c 							     &rdev->pm.dpm.ps[i], j,
dpm              1928 drivers/gpu/drm/radeon/rv6xx_dpm.c 	rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates;
dpm              1942 drivers/gpu/drm/radeon/rv6xx_dpm.c 	rdev->pm.dpm.priv = pi;
dpm              1952 drivers/gpu/drm/radeon/rv6xx_dpm.c 	if (rdev->pm.dpm.voltage_response_time == 0)
dpm              1953 drivers/gpu/drm/radeon/rv6xx_dpm.c 		rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT;
dpm              1954 drivers/gpu/drm/radeon/rv6xx_dpm.c 	if (rdev->pm.dpm.backbias_response_time == 0)
dpm              1955 drivers/gpu/drm/radeon/rv6xx_dpm.c 		rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT;
dpm              2031 drivers/gpu/drm/radeon/rv6xx_dpm.c 	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
dpm              2056 drivers/gpu/drm/radeon/rv6xx_dpm.c 	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
dpm              2079 drivers/gpu/drm/radeon/rv6xx_dpm.c 	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
dpm              2103 drivers/gpu/drm/radeon/rv6xx_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              2104 drivers/gpu/drm/radeon/rv6xx_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm              2106 drivers/gpu/drm/radeon/rv6xx_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm              2107 drivers/gpu/drm/radeon/rv6xx_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm              2112 drivers/gpu/drm/radeon/rv6xx_dpm.c 	struct rv6xx_ps *requested_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps);
dpm              2122 drivers/gpu/drm/radeon/rv6xx_dpm.c 	struct rv6xx_ps *requested_state = rv6xx_get_ps(rdev->pm.dpm.requested_ps);
dpm              2156 drivers/gpu/drm/radeon/rv6xx_dpm.c 	rdev->pm.dpm.forced_level = level;
dpm                56 drivers/gpu/drm/radeon/rv770_dpm.c 	struct rv7xx_power_info *pi = rdev->pm.dpm.priv;
dpm                63 drivers/gpu/drm/radeon/rv770_dpm.c 	struct evergreen_power_info *pi = rdev->pm.dpm.priv;
dpm              1190 drivers/gpu/drm/radeon/rv770_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) {
dpm              1193 drivers/gpu/drm/radeon/rv770_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT)
dpm              1196 drivers/gpu/drm/radeon/rv770_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT)
dpm              1200 drivers/gpu/drm/radeon/rv770_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
dpm              1346 drivers/gpu/drm/radeon/rv770_dpm.c 	if (rdev->pm.dpm.new_active_crtcs & 1) {
dpm              1349 drivers/gpu/drm/radeon/rv770_dpm.c 	} else if (rdev->pm.dpm.new_active_crtcs & 2) {
dpm              1498 drivers/gpu/drm/radeon/rv770_dpm.c 	rdev->pm.dpm.forced_level = level;
dpm              1707 drivers/gpu/drm/radeon/rv770_dpm.c 	voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time;
dpm              1708 drivers/gpu/drm/radeon/rv770_dpm.c 	backbias_response_time = (u32)rdev->pm.dpm.backbias_response_time;
dpm              1887 drivers/gpu/drm/radeon/rv770_dpm.c 	rdev->pm.dpm.thermal.min_temp = low_temp;
dpm              1888 drivers/gpu/drm/radeon/rv770_dpm.c 	rdev->pm.dpm.thermal.max_temp = high_temp;
dpm              1896 drivers/gpu/drm/radeon/rv770_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              1925 drivers/gpu/drm/radeon/rv770_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS)
dpm              2039 drivers/gpu/drm/radeon/rv770_dpm.c 	struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
dpm              2040 drivers/gpu/drm/radeon/rv770_dpm.c 	struct radeon_ps *old_ps = rdev->pm.dpm.current_ps;
dpm              2083 drivers/gpu/drm/radeon/rv770_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              2108 drivers/gpu/drm/radeon/rv770_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L0s)
dpm              2110 drivers/gpu/drm/radeon/rv770_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L1)
dpm              2112 drivers/gpu/drm/radeon/rv770_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1)
dpm              2168 drivers/gpu/drm/radeon/rv770_dpm.c 		rdev->pm.dpm.boot_ps = rps;
dpm              2170 drivers/gpu/drm/radeon/rv770_dpm.c 		rdev->pm.dpm.uvd_ps = rps;
dpm              2259 drivers/gpu/drm/radeon/rv770_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;
dpm              2260 drivers/gpu/drm/radeon/rv770_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
dpm              2261 drivers/gpu/drm/radeon/rv770_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;
dpm              2262 drivers/gpu/drm/radeon/rv770_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;
dpm              2284 drivers/gpu/drm/radeon/rv770_dpm.c 	rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates,
dpm              2287 drivers/gpu/drm/radeon/rv770_dpm.c 	if (!rdev->pm.dpm.ps)
dpm              2304 drivers/gpu/drm/radeon/rv770_dpm.c 				kfree(rdev->pm.dpm.ps);
dpm              2307 drivers/gpu/drm/radeon/rv770_dpm.c 			rdev->pm.dpm.ps[i].ps_priv = ps;
dpm              2308 drivers/gpu/drm/radeon/rv770_dpm.c 			rv7xx_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
dpm              2318 drivers/gpu/drm/radeon/rv770_dpm.c 							     &rdev->pm.dpm.ps[i], j,
dpm              2323 drivers/gpu/drm/radeon/rv770_dpm.c 	rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates;
dpm              2352 drivers/gpu/drm/radeon/rv770_dpm.c 	rdev->pm.dpm.priv = pi;
dpm              2368 drivers/gpu/drm/radeon/rv770_dpm.c 	if (rdev->pm.dpm.voltage_response_time == 0)
dpm              2369 drivers/gpu/drm/radeon/rv770_dpm.c 		rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT;
dpm              2370 drivers/gpu/drm/radeon/rv770_dpm.c 	if (rdev->pm.dpm.backbias_response_time == 0)
dpm              2371 drivers/gpu/drm/radeon/rv770_dpm.c 		rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT;
dpm              2468 drivers/gpu/drm/radeon/rv770_dpm.c 	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
dpm              2497 drivers/gpu/drm/radeon/rv770_dpm.c 	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
dpm              2519 drivers/gpu/drm/radeon/rv770_dpm.c 	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
dpm              2543 drivers/gpu/drm/radeon/rv770_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              2544 drivers/gpu/drm/radeon/rv770_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm              2546 drivers/gpu/drm/radeon/rv770_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm              2547 drivers/gpu/drm/radeon/rv770_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm              2552 drivers/gpu/drm/radeon/rv770_dpm.c 	struct rv7xx_ps *requested_state = rv770_get_ps(rdev->pm.dpm.requested_ps);
dpm              2562 drivers/gpu/drm/radeon/rv770_dpm.c 	struct rv7xx_ps *requested_state = rv770_get_ps(rdev->pm.dpm.requested_ps);
dpm              6414 drivers/gpu/drm/radeon/si.c 			rdev->pm.dpm.thermal.high_to_low = false;
dpm              6419 drivers/gpu/drm/radeon/si.c 			rdev->pm.dpm.thermal.high_to_low = true;
dpm              6444 drivers/gpu/drm/radeon/si.c 		schedule_work(&rdev->pm.dpm.thermal.work);
dpm              1767 drivers/gpu/drm/radeon/si_dpm.c 	struct si_power_info *pi = rdev->pm.dpm.priv;
dpm              1841 drivers/gpu/drm/radeon/si_dpm.c 	u32 p_limit1 = rdev->pm.dpm.tdp_limit;
dpm              1842 drivers/gpu/drm/radeon/si_dpm.c 	u32 p_limit2 = rdev->pm.dpm.near_tdp_limit;
dpm              2132 drivers/gpu/drm/radeon/si_dpm.c 	if (tdp_adjustment > (u32)rdev->pm.dpm.tdp_od_limit)
dpm              2135 drivers/gpu/drm/radeon/si_dpm.c 	max_tdp_limit = ((100 + 100) * rdev->pm.dpm.tdp_limit) / 100;
dpm              2138 drivers/gpu/drm/radeon/si_dpm.c 		*tdp_limit = ((100 + tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100;
dpm              2139 drivers/gpu/drm/radeon/si_dpm.c 		*near_tdp_limit = rdev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - rdev->pm.dpm.tdp_limit);
dpm              2141 drivers/gpu/drm/radeon/si_dpm.c 		*tdp_limit = ((100 - tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100;
dpm              2142 drivers/gpu/drm/radeon/si_dpm.c 		adjustment_delta  = rdev->pm.dpm.tdp_limit - *tdp_limit;
dpm              2143 drivers/gpu/drm/radeon/si_dpm.c 		if (adjustment_delta < rdev->pm.dpm.near_tdp_limit_adjusted)
dpm              2144 drivers/gpu/drm/radeon/si_dpm.c 			*near_tdp_limit = rdev->pm.dpm.near_tdp_limit_adjusted - adjustment_delta;
dpm              2166 drivers/gpu/drm/radeon/si_dpm.c 		struct radeon_ppm_table *ppm = rdev->pm.dpm.dyn_state.ppm_table;
dpm              2179 drivers/gpu/drm/radeon/si_dpm.c 						       rdev->pm.dpm.tdp_adjustment,
dpm              2236 drivers/gpu/drm/radeon/si_dpm.c 			cpu_to_be32(si_scale_power_for_smc(rdev->pm.dpm.near_tdp_limit_adjusted, scaling_factor) * 1000);
dpm              2238 drivers/gpu/drm/radeon/si_dpm.c 			cpu_to_be32(si_scale_power_for_smc((rdev->pm.dpm.near_tdp_limit_adjusted * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, scaling_factor) * 1000);
dpm              2398 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.sq_ramping_threshold == 0)
dpm              2420 drivers/gpu/drm/radeon/si_dpm.c 		if ((state->performance_levels[i].sclk >= rdev->pm.dpm.sq_ramping_threshold) &&
dpm              2539 drivers/gpu/drm/radeon/si_dpm.c 		&rdev->pm.dpm.dyn_state.cac_leakage_table;
dpm              2676 drivers/gpu/drm/radeon/si_dpm.c 	si_pi->dyn_powertune_data.cac_leakage = rdev->pm.dpm.cac_leakage;
dpm              2703 drivers/gpu/drm/radeon/si_dpm.c 	load_line_slope = ((u32)rdev->pm.dpm.load_line_slope << SMC_SISLANDS_SCALE_R) / 100;
dpm              2942 drivers/gpu/drm/radeon/si_dpm.c 		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              3008 drivers/gpu/drm/radeon/si_dpm.c 		rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
dpm              3009 drivers/gpu/drm/radeon/si_dpm.c 		rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
dpm              3017 drivers/gpu/drm/radeon/si_dpm.c 	if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
dpm              3026 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.ac_power)
dpm              3027 drivers/gpu/drm/radeon/si_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              3029 drivers/gpu/drm/radeon/si_dpm.c 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;
dpm              3035 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.ac_power == false) {
dpm              3049 drivers/gpu/drm/radeon/si_dpm.c 	btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm              3051 drivers/gpu/drm/radeon/si_dpm.c 	btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              3053 drivers/gpu/drm/radeon/si_dpm.c 	btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              3098 drivers/gpu/drm/radeon/si_dpm.c 		if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk)
dpm              3099 drivers/gpu/drm/radeon/si_dpm.c 			sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk;
dpm              3100 drivers/gpu/drm/radeon/si_dpm.c 		if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk)
dpm              3101 drivers/gpu/drm/radeon/si_dpm.c 			mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk;
dpm              3155 drivers/gpu/drm/radeon/si_dpm.c 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
dpm              3158 drivers/gpu/drm/radeon/si_dpm.c 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              3161 drivers/gpu/drm/radeon/si_dpm.c 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              3164 drivers/gpu/drm/radeon/si_dpm.c 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk,
dpm              3178 drivers/gpu/drm/radeon/si_dpm.c 		if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc)
dpm              3404 drivers/gpu/drm/radeon/si_dpm.c 	struct radeon_ps *rps = rdev->pm.dpm.current_ps;
dpm              3428 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.forced_level = level;
dpm              3649 drivers/gpu/drm/radeon/si_dpm.c 	voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time;
dpm              3650 drivers/gpu/drm/radeon/si_dpm.c 	backbias_response_time = (u32)rdev->pm.dpm.backbias_response_time;
dpm              3688 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.new_active_crtc_count > 0)
dpm              3693 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.new_active_crtc_count > 1)
dpm              3703 drivers/gpu/drm/radeon/si_dpm.c 	if ((rdev->pm.dpm.new_active_crtc_count > 0) &&
dpm              3704 drivers/gpu/drm/radeon/si_dpm.c 	    (!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) {
dpm              3707 drivers/gpu/drm/radeon/si_dpm.c 			if (rdev->pm.dpm.new_active_crtcs & (1 << i))
dpm              3724 drivers/gpu/drm/radeon/si_dpm.c 	si_notify_smc_display_change(rdev, rdev->pm.dpm.new_active_crtc_count > 0);
dpm              3977 drivers/gpu/drm/radeon/si_dpm.c 						&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
dpm              3998 drivers/gpu/drm/radeon/si_dpm.c 						&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
dpm              4094 drivers/gpu/drm/radeon/si_dpm.c 							      &rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) {
dpm              4156 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries) {
dpm              4157 drivers/gpu/drm/radeon/si_dpm.c 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE) {
dpm              4158 drivers/gpu/drm/radeon/si_dpm.c 			if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL)
dpm              4161 drivers/gpu/drm/radeon/si_dpm.c 			for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
dpm              4163 drivers/gpu/drm/radeon/si_dpm.c 				    (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
dpm              4165 drivers/gpu/drm/radeon/si_dpm.c 					if ((u32)v_index < rdev->pm.dpm.dyn_state.cac_leakage_table.count)
dpm              4167 drivers/gpu/drm/radeon/si_dpm.c 							rdev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc;
dpm              4170 drivers/gpu/drm/radeon/si_dpm.c 							rdev->pm.dpm.dyn_state.cac_leakage_table.entries[rdev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc;
dpm              4176 drivers/gpu/drm/radeon/si_dpm.c 				for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
dpm              4178 drivers/gpu/drm/radeon/si_dpm.c 					    (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
dpm              4180 drivers/gpu/drm/radeon/si_dpm.c 						if ((u32)v_index < rdev->pm.dpm.dyn_state.cac_leakage_table.count)
dpm              4182 drivers/gpu/drm/radeon/si_dpm.c 								rdev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc;
dpm              4185 drivers/gpu/drm/radeon/si_dpm.c 								rdev->pm.dpm.dyn_state.cac_leakage_table.entries[rdev->pm.dpm.dyn_state.cac_leakage_table.count-1].vddc;
dpm              4191 drivers/gpu/drm/radeon/si_dpm.c 			if ((u32)voltage->index < rdev->pm.dpm.dyn_state.cac_leakage_table.count)
dpm              4192 drivers/gpu/drm/radeon/si_dpm.c 				*std_voltage = rdev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc;
dpm              4444 drivers/gpu/drm/radeon/si_dpm.c 						 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
dpm              4530 drivers/gpu/drm/radeon/si_dpm.c 							 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
dpm              4557 drivers/gpu/drm/radeon/si_dpm.c 							 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
dpm              4698 drivers/gpu/drm/radeon/si_dpm.c 	struct radeon_ps *radeon_boot_state = rdev->pm.dpm.boot_ps;
dpm              4720 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC)
dpm              4723 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT) {
dpm              4728 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
dpm              4734 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY)
dpm              4737 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE) {
dpm              4739 drivers/gpu/drm/radeon/si_dpm.c 		vr_hot_gpio = rdev->pm.dpm.backbias_response_time;
dpm              5005 drivers/gpu/drm/radeon/si_dpm.c 	    (rdev->pm.dpm.new_active_crtc_count <= 2)) {
dpm              5070 drivers/gpu/drm/radeon/si_dpm.c 						       &rdev->pm.dpm.dyn_state.phase_shedding_limits_table,
dpm              5160 drivers/gpu/drm/radeon/si_dpm.c 	for (i = 0; i < rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count; i++) {
dpm              5162 drivers/gpu/drm/radeon/si_dpm.c 		    rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) {
dpm              5164 drivers/gpu/drm/radeon/si_dpm.c 			    rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v)
dpm              5322 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.new_active_crtc_count == 0)
dpm              5326 drivers/gpu/drm/radeon/si_dpm.c 		if (rdev->pm.dpm.new_active_crtcs & (1 << i)) {
dpm              5906 drivers/gpu/drm/radeon/si_dpm.c 								&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk);
dpm              5908 drivers/gpu/drm/radeon/si_dpm.c 								&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk);
dpm              5910 drivers/gpu/drm/radeon/si_dpm.c 								&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk);
dpm              6002 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.thermal.min_temp = low_temp;
dpm              6003 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.thermal.max_temp = high_temp;
dpm              6042 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.fan.ucode_fan_control = false;
dpm              6049 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.fan.ucode_fan_control = false;
dpm              6053 drivers/gpu/drm/radeon/si_dpm.c 	tmp64 = (u64)rdev->pm.dpm.fan.pwm_min * duty100;
dpm              6057 drivers/gpu/drm/radeon/si_dpm.c 	t_diff1 = rdev->pm.dpm.fan.t_med - rdev->pm.dpm.fan.t_min;
dpm              6058 drivers/gpu/drm/radeon/si_dpm.c 	t_diff2 = rdev->pm.dpm.fan.t_high - rdev->pm.dpm.fan.t_med;
dpm              6060 drivers/gpu/drm/radeon/si_dpm.c 	pwm_diff1 = rdev->pm.dpm.fan.pwm_med - rdev->pm.dpm.fan.pwm_min;
dpm              6061 drivers/gpu/drm/radeon/si_dpm.c 	pwm_diff2 = rdev->pm.dpm.fan.pwm_high - rdev->pm.dpm.fan.pwm_med;
dpm              6066 drivers/gpu/drm/radeon/si_dpm.c 	fan_table.temp_min = cpu_to_be16((50 + rdev->pm.dpm.fan.t_min) / 100);
dpm              6067 drivers/gpu/drm/radeon/si_dpm.c 	fan_table.temp_med = cpu_to_be16((50 + rdev->pm.dpm.fan.t_med) / 100);
dpm              6068 drivers/gpu/drm/radeon/si_dpm.c 	fan_table.temp_max = cpu_to_be16((50 + rdev->pm.dpm.fan.t_max) / 100);
dpm              6075 drivers/gpu/drm/radeon/si_dpm.c 	fan_table.hys_down = cpu_to_be16(rdev->pm.dpm.fan.t_hyst);
dpm              6085 drivers/gpu/drm/radeon/si_dpm.c 	fan_table.refresh_period = cpu_to_be32((rdev->pm.dpm.fan.cycle_delay *
dpm              6101 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.fan.ucode_fan_control = false;
dpm              6198 drivers/gpu/drm/radeon/si_dpm.c 		if (rdev->pm.dpm.fan.ucode_fan_control)
dpm              6203 drivers/gpu/drm/radeon/si_dpm.c 		if (rdev->pm.dpm.fan.ucode_fan_control)
dpm              6260 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.fan.ucode_fan_control)
dpm              6293 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.fan.ucode_fan_control) {
dpm              6325 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.fan.ucode_fan_control) {
dpm              6354 drivers/gpu/drm/radeon/si_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              6499 drivers/gpu/drm/radeon/si_dpm.c 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
dpm              6523 drivers/gpu/drm/radeon/si_dpm.c 	struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
dpm              6535 drivers/gpu/drm/radeon/si_dpm.c 	struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
dpm              6727 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.boot_ps = rps;
dpm              6729 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.uvd_ps = rps;
dpm              6801 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;
dpm              6802 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
dpm              6803 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;
dpm              6804 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;
dpm              6840 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,
dpm              6843 drivers/gpu/drm/radeon/si_dpm.c 	if (!rdev->pm.dpm.ps)
dpm              6856 drivers/gpu/drm/radeon/si_dpm.c 			kfree(rdev->pm.dpm.ps);
dpm              6859 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.ps[i].ps_priv = ps;
dpm              6860 drivers/gpu/drm/radeon/si_dpm.c 		si_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
dpm              6875 drivers/gpu/drm/radeon/si_dpm.c 						  &rdev->pm.dpm.ps[i], k,
dpm              6881 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.num_ps = state_array->ucNumEntries;
dpm              6886 drivers/gpu/drm/radeon/si_dpm.c 		clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx;
dpm              6893 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.vce_states[i].sclk = sclk;
dpm              6894 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.vce_states[i].mclk = mclk;
dpm              6914 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.priv = si_pi;
dpm              6960 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries =
dpm              6964 drivers/gpu/drm/radeon/si_dpm.c 	if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) {
dpm              6968 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4;
dpm              6969 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;
dpm              6970 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0;
dpm              6971 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;
dpm              6972 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720;
dpm              6973 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;
dpm              6974 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810;
dpm              6975 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;
dpm              6976 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900;
dpm              6978 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.voltage_response_time == 0)
dpm              6979 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT;
dpm              6980 drivers/gpu/drm/radeon/si_dpm.c 	if (rdev->pm.dpm.backbias_response_time == 0)
dpm              6981 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT;
dpm              7058 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.mclk_sclk_ratio = 4;
dpm              7059 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.sclk_mclk_delta = 15000;
dpm              7060 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.vddc_vddci_delta = 200;
dpm              7061 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.count = 0;
dpm              7062 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.valid_sclk_values.values = NULL;
dpm              7063 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0;
dpm              7064 drivers/gpu/drm/radeon/si_dpm.c 	rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL;
dpm              7069 drivers/gpu/drm/radeon/si_dpm.c 	if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
dpm              7070 drivers/gpu/drm/radeon/si_dpm.c 	    (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))
dpm              7071 drivers/gpu/drm/radeon/si_dpm.c 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc =
dpm              7072 drivers/gpu/drm/radeon/si_dpm.c 			rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
dpm              7083 drivers/gpu/drm/radeon/si_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              7084 drivers/gpu/drm/radeon/si_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm              7086 drivers/gpu/drm/radeon/si_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm              7087 drivers/gpu/drm/radeon/si_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm              7088 drivers/gpu/drm/radeon/si_dpm.c 	kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries);
dpm                83 drivers/gpu/drm/radeon/sumo_dpm.c 	struct sumo_power_info *pi = rdev->pm.dpm.priv;
dpm              1174 drivers/gpu/drm/radeon/sumo_dpm.c 	rdev->pm.dpm.thermal.min_temp = low_temp;
dpm              1175 drivers/gpu/drm/radeon/sumo_dpm.c 	rdev->pm.dpm.thermal.max_temp = high_temp;
dpm              1232 drivers/gpu/drm/radeon/sumo_dpm.c 	sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
dpm              1277 drivers/gpu/drm/radeon/sumo_dpm.c 	sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
dpm              1283 drivers/gpu/drm/radeon/sumo_dpm.c 	struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
dpm              1422 drivers/gpu/drm/radeon/sumo_dpm.c 		rdev->pm.dpm.boot_ps = rps;
dpm              1426 drivers/gpu/drm/radeon/sumo_dpm.c 		rdev->pm.dpm.uvd_ps = rps;
dpm              1484 drivers/gpu/drm/radeon/sumo_dpm.c 	rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,
dpm              1487 drivers/gpu/drm/radeon/sumo_dpm.c 	if (!rdev->pm.dpm.ps)
dpm              1500 drivers/gpu/drm/radeon/sumo_dpm.c 			kfree(rdev->pm.dpm.ps);
dpm              1503 drivers/gpu/drm/radeon/sumo_dpm.c 		rdev->pm.dpm.ps[i].ps_priv = ps;
dpm              1515 drivers/gpu/drm/radeon/sumo_dpm.c 						    &rdev->pm.dpm.ps[i], k,
dpm              1519 drivers/gpu/drm/radeon/sumo_dpm.c 		sumo_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
dpm              1524 drivers/gpu/drm/radeon/sumo_dpm.c 	rdev->pm.dpm.num_ps = state_array->ucNumEntries;
dpm              1749 drivers/gpu/drm/radeon/sumo_dpm.c 	rdev->pm.dpm.priv = pi;
dpm              1874 drivers/gpu/drm/radeon/sumo_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              1875 drivers/gpu/drm/radeon/sumo_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm              1877 drivers/gpu/drm/radeon/sumo_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm              1878 drivers/gpu/drm/radeon/sumo_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm              1942 drivers/gpu/drm/radeon/sumo_dpm.c 	rdev->pm.dpm.forced_level = level;
dpm               358 drivers/gpu/drm/radeon/trinity_dpm.c 	struct trinity_power_info *pi = rdev->pm.dpm.priv;
dpm              1062 drivers/gpu/drm/radeon/trinity_dpm.c 	rdev->pm.dpm.thermal.min_temp = low_temp;
dpm              1063 drivers/gpu/drm/radeon/trinity_dpm.c 	rdev->pm.dpm.thermal.max_temp = high_temp;
dpm              1125 drivers/gpu/drm/radeon/trinity_dpm.c 	trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
dpm              1173 drivers/gpu/drm/radeon/trinity_dpm.c 	trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
dpm              1228 drivers/gpu/drm/radeon/trinity_dpm.c 	rdev->pm.dpm.forced_level = level;
dpm              1236 drivers/gpu/drm/radeon/trinity_dpm.c 	struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
dpm              1257 drivers/gpu/drm/radeon/trinity_dpm.c 			trinity_dpm_bapm_enable(rdev, rdev->pm.dpm.ac_power);
dpm              1511 drivers/gpu/drm/radeon/trinity_dpm.c 		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
dpm              1548 drivers/gpu/drm/radeon/trinity_dpm.c 	u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count;
dpm              1556 drivers/gpu/drm/radeon/trinity_dpm.c 		new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
dpm              1557 drivers/gpu/drm/radeon/trinity_dpm.c 		new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
dpm              1574 drivers/gpu/drm/radeon/trinity_dpm.c 			if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk)
dpm              1575 drivers/gpu/drm/radeon/trinity_dpm.c 				ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk;
dpm              1638 drivers/gpu/drm/radeon/trinity_dpm.c 	u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count;
dpm              1701 drivers/gpu/drm/radeon/trinity_dpm.c 		rdev->pm.dpm.boot_ps = rps;
dpm              1705 drivers/gpu/drm/radeon/trinity_dpm.c 		rdev->pm.dpm.uvd_ps = rps;
dpm              1762 drivers/gpu/drm/radeon/trinity_dpm.c 	rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,
dpm              1765 drivers/gpu/drm/radeon/trinity_dpm.c 	if (!rdev->pm.dpm.ps)
dpm              1778 drivers/gpu/drm/radeon/trinity_dpm.c 			kfree(rdev->pm.dpm.ps);
dpm              1781 drivers/gpu/drm/radeon/trinity_dpm.c 		rdev->pm.dpm.ps[i].ps_priv = ps;
dpm              1794 drivers/gpu/drm/radeon/trinity_dpm.c 						       &rdev->pm.dpm.ps[i], k,
dpm              1798 drivers/gpu/drm/radeon/trinity_dpm.c 		trinity_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
dpm              1803 drivers/gpu/drm/radeon/trinity_dpm.c 	rdev->pm.dpm.num_ps = state_array->ucNumEntries;
dpm              1808 drivers/gpu/drm/radeon/trinity_dpm.c 		clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx;
dpm              1813 drivers/gpu/drm/radeon/trinity_dpm.c 		rdev->pm.dpm.vce_states[i].sclk = sclk;
dpm              1814 drivers/gpu/drm/radeon/trinity_dpm.c 		rdev->pm.dpm.vce_states[i].mclk = 0;
dpm              1956 drivers/gpu/drm/radeon/trinity_dpm.c 	rdev->pm.dpm.priv = pi;
dpm              2083 drivers/gpu/drm/radeon/trinity_dpm.c 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
dpm              2084 drivers/gpu/drm/radeon/trinity_dpm.c 		kfree(rdev->pm.dpm.ps[i].ps_priv);
dpm              2086 drivers/gpu/drm/radeon/trinity_dpm.c 	kfree(rdev->pm.dpm.ps);
dpm              2087 drivers/gpu/drm/radeon/trinity_dpm.c 	kfree(rdev->pm.dpm.priv);
dpm               228 drivers/net/can/janz-ican3.c 	void __iomem *dpm;
dpm               315 drivers/net/can/janz-ican3.c 	peer = ioread8(mod->dpm + MSYNC_PEER);
dpm               316 drivers/net/can/janz-ican3.c 	locl = ioread8(mod->dpm + MSYNC_LOCL);
dpm               333 drivers/net/can/janz-ican3.c 	memcpy_fromio(msg, mod->dpm, sizeof(*msg));
dpm               342 drivers/net/can/janz-ican3.c 	iowrite8(locl, mod->dpm + MSYNC_LOCL);
dpm               360 drivers/net/can/janz-ican3.c 	peer = ioread8(mod->dpm + MSYNC_PEER);
dpm               361 drivers/net/can/janz-ican3.c 	locl = ioread8(mod->dpm + MSYNC_LOCL);
dpm               375 drivers/net/can/janz-ican3.c 	memcpy_toio(mod->dpm, msg, sizeof(*msg));
dpm               382 drivers/net/can/janz-ican3.c 	iowrite8(locl, mod->dpm + MSYNC_LOCL);
dpm               405 drivers/net/can/janz-ican3.c 	dst = mod->dpm;
dpm               423 drivers/net/can/janz-ican3.c 	dst = mod->dpm;
dpm               444 drivers/net/can/janz-ican3.c 	dst = mod->dpm;
dpm               454 drivers/net/can/janz-ican3.c 	dst = mod->dpm;
dpm               500 drivers/net/can/janz-ican3.c 		dst = mod->dpm + addr;
dpm               536 drivers/net/can/janz-ican3.c 		dst = mod->dpm + addr;
dpm               560 drivers/net/can/janz-ican3.c 	void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
dpm               573 drivers/net/can/janz-ican3.c 	memcpy_toio(mod->dpm, msg, sizeof(*msg));
dpm               591 drivers/net/can/janz-ican3.c 	void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
dpm               604 drivers/net/can/janz-ican3.c 	memcpy_fromio(msg, mod->dpm, sizeof(*msg));
dpm              1357 drivers/net/can/janz-ican3.c 	desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
dpm              1386 drivers/net/can/janz-ican3.c 	desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
dpm              1532 drivers/net/can/janz-ican3.c 	runold = ioread8(mod->dpm + TARGET_RUNNING);
dpm              1541 drivers/net/can/janz-ican3.c 		runnew = ioread8(mod->dpm + TARGET_RUNNING);
dpm              1572 drivers/net/can/janz-ican3.c 	memcpy_fromio(mod->fwinfo, mod->dpm + FIRMWARE_STAMP, sizeof(mod->fwinfo) - 1);
dpm              1705 drivers/net/can/janz-ican3.c 	desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
dpm              1953 drivers/net/can/janz-ican3.c 	mod->dpm = ioremap(res->start, resource_size(res));
dpm              1954 drivers/net/can/janz-ican3.c 	if (!mod->dpm) {
dpm              1960 drivers/net/can/janz-ican3.c 	mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
dpm              2010 drivers/net/can/janz-ican3.c 	iounmap(mod->dpm);
dpm              2033 drivers/net/can/janz-ican3.c 	iounmap(mod->dpm);
dpm              7349 drivers/net/ethernet/sun/niu.c 	u16 sport, dport, spm, dpm;
dpm              7378 drivers/net/ethernet/sun/niu.c 		dpm = be16_to_cpu(fsp->m_u.tcp_ip4_spec.pdst);
dpm              7381 drivers/net/ethernet/sun/niu.c 		tp->key_mask[2] |= (((u64)spm << 16) | dpm);