dphy_range_info   107 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c static const struct dsi_phy_range dphy_range_info[] = {
dphy_range_info   140 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		for (i = 0; i < ARRAY_SIZE(dphy_range_info); i++)
dphy_range_info   141 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			if (f_kHz >= dphy_range_info[i].min_range_kHz &&
dphy_range_info   142 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			    f_kHz <= dphy_range_info[i].max_range_kHz)
dphy_range_info   145 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		if (i == ARRAY_SIZE(dphy_range_info)) {
dphy_range_info   150 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		phy->pll_vco_750M = dphy_range_info[i].pll_vco_750M;
dphy_range_info   151 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		phy->hstx_ckg_sel = dphy_range_info[i].hstx_ckg_sel;