dpcd_buf          500 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	uint8_t dpcd_buf[6] = {0};
dpcd_buf          510 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		(uint8_t *)(dpcd_buf),
dpcd_buf          511 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		sizeof(dpcd_buf));
dpcd_buf          518 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 			get_nibble_at_index(&dpcd_buf[0], lane);
dpcd_buf          520 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 			get_nibble_at_index(&dpcd_buf[4], lane);
dpcd_buf          523 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 	ln_status_updated->raw = dpcd_buf[2];
dpcd_buf          527 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		DP_LANE0_1_STATUS, dpcd_buf[0],
dpcd_buf          528 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		DP_LANE2_3_STATUS, dpcd_buf[1]);
dpcd_buf          533 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		dpcd_buf[4],
dpcd_buf          535 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		dpcd_buf[5]);
dpcd_buf          182 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c 	u8 dpcd_buf, new_dpcd_buf, edp_backlight_mode;
dpcd_buf          185 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c 			DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) != 1) {
dpcd_buf          191 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c 	new_dpcd_buf = dpcd_buf;
dpcd_buf          192 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c 	edp_backlight_mode = dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK;
dpcd_buf          212 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c 	if (new_dpcd_buf != dpcd_buf) {