dp0_auxcfg1       617 drivers/gpu/drm/bridge/tc358767.c 	u32 dp0_auxcfg1;
dp0_auxcfg1       649 drivers/gpu/drm/bridge/tc358767.c 	dp0_auxcfg1  = AUX_RX_FILTER_EN;
dp0_auxcfg1       650 drivers/gpu/drm/bridge/tc358767.c 	dp0_auxcfg1 |= 0x06 << 8; /* Aux Bit Period Calculator Threshold */
dp0_auxcfg1       651 drivers/gpu/drm/bridge/tc358767.c 	dp0_auxcfg1 |= 0x3f << 0; /* Aux Response Timeout Timer */
dp0_auxcfg1       653 drivers/gpu/drm/bridge/tc358767.c 	ret = regmap_write(tc->regmap, DP0_AUXCFG1, dp0_auxcfg1);