down_hyst_offset 2774 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp;
down_hyst_offset 2803 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				down_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i)
down_hyst_offset 2808 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, levels[i].DownH, sizeof(uint8_t));
down_hyst_offset 2838 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				down_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i)
down_hyst_offset 2843 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownH, sizeof(uint8_t));
down_hyst_offset 2566 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp;
down_hyst_offset 2595 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				down_hyst_offset = array + (sizeof(SMU73_Discrete_GraphicsLevel) * i)
down_hyst_offset 2600 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, levels[i].DownHyst, sizeof(uint8_t));
down_hyst_offset 2630 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				down_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i)
down_hyst_offset 2635 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t));
down_hyst_offset 2479 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp;
down_hyst_offset 2508 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				down_hyst_offset = array + (sizeof(SMU74_Discrete_GraphicsLevel) * i)
down_hyst_offset 2513 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, levels[i].DownHyst, sizeof(uint8_t));
down_hyst_offset 2543 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				down_hyst_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i)
down_hyst_offset 2548 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t));
down_hyst_offset 3162 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp;
down_hyst_offset 3191 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				down_hyst_offset = array + (sizeof(SMU72_Discrete_GraphicsLevel) * i)
down_hyst_offset 3196 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, levels[i].DownHyst, sizeof(uint8_t));
down_hyst_offset 3226 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				down_hyst_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i)
down_hyst_offset 3231 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[i].DownHyst, sizeof(uint8_t));