dmif_total_page_close_open_time  290 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h 				bw_fixed_to_int(data->dmif_total_page_close_open_time));
dmif_total_page_close_open_time 1115 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->dmif_total_page_close_open_time = bw_div(bw_mul((bw_add(bw_add(data->dmif_total_number_of_data_request_page_close_open, data->scatter_gather_total_pte_request_groups), data->cursor_total_request_groups)), vbios->trc), bw_int_to_fixed(1000));
dmif_total_page_close_open_time 1188 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->dmif_burst_time[i][j] = bw_max3(data->dmif_total_page_close_open_time, bw_div(data->total_display_reads_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))), bw_div(data->total_display_reads_required_data, (bw_mul(bw_mul(sclk[j], vbios->data_return_bus_width), bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100)))));
dmif_total_page_close_open_time 1523 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->required_dmifmc_urgent_latency_for_page_close_open = bw_div((bw_sub(data->min_read_buffer_size_in_time, data->dmif_total_page_close_open_time)), data->total_dmifmc_urgent_trips);
dmif_total_page_close_open_time 1913 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	data->dmifdram_access_efficiency = bw_min2(bw_div(bw_div(data->total_display_reads_required_dram_access_data, data->dram_bandwidth), data->dmif_total_page_close_open_time), bw_int_to_fixed(1));
dmif_total_page_close_open_time 1998 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		if (pipe_check == bw_def_ok && (bw_mtn(data->display_reads_time_for_data_transfer_and_urgent_latency, data->dmif_total_page_close_open_time))) {
dmif_total_page_close_open_time  307 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h 	struct bw_fixed dmif_total_page_close_open_time;