dmfc              149 drivers/gpu/drm/imx/ipuv3-plane.c 	if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
dmfc              150 drivers/gpu/drm/imx/ipuv3-plane.c 		ipu_dmfc_put(ipu_plane->dmfc);
dmfc              180 drivers/gpu/drm/imx/ipuv3-plane.c 	ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
dmfc              181 drivers/gpu/drm/imx/ipuv3-plane.c 	if (IS_ERR(ipu_plane->dmfc)) {
dmfc              182 drivers/gpu/drm/imx/ipuv3-plane.c 		ret = PTR_ERR(ipu_plane->dmfc);
dmfc              222 drivers/gpu/drm/imx/ipuv3-plane.c 	ipu_dmfc_enable_channel(ipu_plane->dmfc);
dmfc              247 drivers/gpu/drm/imx/ipuv3-plane.c 	ipu_dmfc_disable_channel(ipu_plane->dmfc);
dmfc              626 drivers/gpu/drm/imx/ipuv3-plane.c 	ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
dmfc               23 drivers/gpu/drm/imx/ipuv3-plane.h 	struct dmfc_channel	*dmfc;
dmfc              101 drivers/gpu/ipu-v3/ipu-dmfc.c int ipu_dmfc_enable_channel(struct dmfc_channel *dmfc)
dmfc              103 drivers/gpu/ipu-v3/ipu-dmfc.c 	struct ipu_dmfc_priv *priv = dmfc->priv;
dmfc              117 drivers/gpu/ipu-v3/ipu-dmfc.c void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc)
dmfc              119 drivers/gpu/ipu-v3/ipu-dmfc.c 	struct ipu_dmfc_priv *priv = dmfc->priv;
dmfc              135 drivers/gpu/ipu-v3/ipu-dmfc.c void ipu_dmfc_config_wait4eot(struct dmfc_channel *dmfc, int width)
dmfc              137 drivers/gpu/ipu-v3/ipu-dmfc.c 	struct ipu_dmfc_priv *priv = dmfc->priv;
dmfc              144 drivers/gpu/ipu-v3/ipu-dmfc.c 	if ((dmfc->slots * 64 * 4) / width > dmfc->data->max_fifo_lines)
dmfc              145 drivers/gpu/ipu-v3/ipu-dmfc.c 		dmfc_gen1 |= 1 << dmfc->data->eot_shift;
dmfc              147 drivers/gpu/ipu-v3/ipu-dmfc.c 		dmfc_gen1 &= ~(1 << dmfc->data->eot_shift);
dmfc              167 drivers/gpu/ipu-v3/ipu-dmfc.c void ipu_dmfc_put(struct dmfc_channel *dmfc)
dmfc              310 include/video/imx-ipu-v3.h int ipu_dmfc_enable_channel(struct dmfc_channel *dmfc);
dmfc              311 include/video/imx-ipu-v3.h void ipu_dmfc_disable_channel(struct dmfc_channel *dmfc);
dmfc              312 include/video/imx-ipu-v3.h void ipu_dmfc_config_wait4eot(struct dmfc_channel *dmfc, int width);
dmfc              314 include/video/imx-ipu-v3.h void ipu_dmfc_put(struct dmfc_channel *dmfc);