dma_lch_in        149 drivers/crypto/atmel-sha.c 	struct atmel_sha_dma	dma_lch_in;
dma_lch_in        647 drivers/crypto/atmel-sha.c 	dd->dma_lch_in.dma_conf.src_maxburst = 16;
dma_lch_in        648 drivers/crypto/atmel-sha.c 	dd->dma_lch_in.dma_conf.dst_maxburst = 16;
dma_lch_in        650 drivers/crypto/atmel-sha.c 	dmaengine_slave_config(dd->dma_lch_in.chan, &dd->dma_lch_in.dma_conf);
dma_lch_in        658 drivers/crypto/atmel-sha.c 		in_desc = dmaengine_prep_slave_sg(dd->dma_lch_in.chan, sg, 2,
dma_lch_in        664 drivers/crypto/atmel-sha.c 		in_desc = dmaengine_prep_slave_sg(dd->dma_lch_in.chan, sg, 1,
dma_lch_in        687 drivers/crypto/atmel-sha.c 	dma_async_issue_pending(dd->dma_lch_in.chan);
dma_lch_in       1458 drivers/crypto/atmel-sha.c 	struct atmel_sha_dma *dma = &dd->dma_lch_in;
dma_lch_in       1492 drivers/crypto/atmel-sha.c 	struct atmel_sha_dma *dma = &dd->dma_lch_in;
dma_lch_in       1513 drivers/crypto/atmel-sha.c 	struct atmel_sha_dma *dma = &dd->dma_lch_in;
dma_lch_in       2627 drivers/crypto/atmel-sha.c 	dd->dma_lch_in.chan = dma_request_slave_channel_compat(mask_in,
dma_lch_in       2629 drivers/crypto/atmel-sha.c 	if (!dd->dma_lch_in.chan) {
dma_lch_in       2634 drivers/crypto/atmel-sha.c 	dd->dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
dma_lch_in       2635 drivers/crypto/atmel-sha.c 	dd->dma_lch_in.dma_conf.dst_addr = dd->phys_base +
dma_lch_in       2637 drivers/crypto/atmel-sha.c 	dd->dma_lch_in.dma_conf.src_maxburst = 1;
dma_lch_in       2638 drivers/crypto/atmel-sha.c 	dd->dma_lch_in.dma_conf.src_addr_width =
dma_lch_in       2640 drivers/crypto/atmel-sha.c 	dd->dma_lch_in.dma_conf.dst_maxburst = 1;
dma_lch_in       2641 drivers/crypto/atmel-sha.c 	dd->dma_lch_in.dma_conf.dst_addr_width =
dma_lch_in       2643 drivers/crypto/atmel-sha.c 	dd->dma_lch_in.dma_conf.device_fc = false;
dma_lch_in       2650 drivers/crypto/atmel-sha.c 	dma_release_channel(dd->dma_lch_in.chan);
dma_lch_in       2830 drivers/crypto/atmel-sha.c 				dma_chan_name(sha_dd->dma_lch_in.chan));
dma_lch_in        125 drivers/crypto/atmel-tdes.c 	struct atmel_tdes_dma	dma_lch_in;
dma_lch_in        450 drivers/crypto/atmel-tdes.c 		dd->dma_lch_in.dma_conf.dst_addr_width =
dma_lch_in        455 drivers/crypto/atmel-tdes.c 		dd->dma_lch_in.dma_conf.dst_addr_width =
dma_lch_in        460 drivers/crypto/atmel-tdes.c 		dd->dma_lch_in.dma_conf.dst_addr_width =
dma_lch_in        466 drivers/crypto/atmel-tdes.c 	dmaengine_slave_config(dd->dma_lch_in.chan, &dd->dma_lch_in.dma_conf);
dma_lch_in        479 drivers/crypto/atmel-tdes.c 	in_desc = dmaengine_prep_slave_sg(dd->dma_lch_in.chan, &sg[0],
dma_lch_in        498 drivers/crypto/atmel-tdes.c 	dma_async_issue_pending(dd->dma_lch_in.chan);
dma_lch_in        726 drivers/crypto/atmel-tdes.c 	dd->dma_lch_in.chan = dma_request_slave_channel_compat(mask,
dma_lch_in        728 drivers/crypto/atmel-tdes.c 	if (!dd->dma_lch_in.chan)
dma_lch_in        731 drivers/crypto/atmel-tdes.c 	dd->dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
dma_lch_in        732 drivers/crypto/atmel-tdes.c 	dd->dma_lch_in.dma_conf.dst_addr = dd->phys_base +
dma_lch_in        734 drivers/crypto/atmel-tdes.c 	dd->dma_lch_in.dma_conf.src_maxburst = 1;
dma_lch_in        735 drivers/crypto/atmel-tdes.c 	dd->dma_lch_in.dma_conf.src_addr_width =
dma_lch_in        737 drivers/crypto/atmel-tdes.c 	dd->dma_lch_in.dma_conf.dst_maxburst = 1;
dma_lch_in        738 drivers/crypto/atmel-tdes.c 	dd->dma_lch_in.dma_conf.dst_addr_width =
dma_lch_in        740 drivers/crypto/atmel-tdes.c 	dd->dma_lch_in.dma_conf.device_fc = false;
dma_lch_in        761 drivers/crypto/atmel-tdes.c 	dma_release_channel(dd->dma_lch_in.chan);
dma_lch_in        769 drivers/crypto/atmel-tdes.c 	dma_release_channel(dd->dma_lch_in.chan);
dma_lch_in       1323 drivers/crypto/atmel-tdes.c 				dma_chan_name(tdes_dd->dma_lch_in.chan),
dma_lch_in        179 drivers/crypto/omap-aes.c 	if (dd->dma_lch_in != NULL)
dma_lch_in        235 drivers/crypto/omap-aes.c 	dd->dma_lch_in = NULL;
dma_lch_in        237 drivers/crypto/omap-aes.c 	dd->dma_lch_in = dma_request_chan(dd->dev, "rx");
dma_lch_in        238 drivers/crypto/omap-aes.c 	if (IS_ERR(dd->dma_lch_in)) {
dma_lch_in        240 drivers/crypto/omap-aes.c 		return PTR_ERR(dd->dma_lch_in);
dma_lch_in        253 drivers/crypto/omap-aes.c 	dma_release_channel(dd->dma_lch_in);
dma_lch_in        264 drivers/crypto/omap-aes.c 	dma_release_channel(dd->dma_lch_in);
dma_lch_in        298 drivers/crypto/omap-aes.c 	ret = dmaengine_slave_config(dd->dma_lch_in, &cfg);
dma_lch_in        305 drivers/crypto/omap-aes.c 	tx_in = dmaengine_prep_slave_sg(dd->dma_lch_in, in_sg, in_sg_len,
dma_lch_in        341 drivers/crypto/omap-aes.c 	dma_async_issue_pending(dd->dma_lch_in);
dma_lch_in        188 drivers/crypto/omap-aes.h 	struct dma_chan		*dma_lch_in;
dma_lch_in        161 drivers/crypto/omap-des.c 	struct dma_chan		*dma_lch_in;
dma_lch_in        291 drivers/crypto/omap-des.c 	if (dd->dma_lch_in != NULL)
dma_lch_in        344 drivers/crypto/omap-des.c 	dd->dma_lch_in = NULL;
dma_lch_in        346 drivers/crypto/omap-des.c 	dd->dma_lch_in = dma_request_chan(dd->dev, "rx");
dma_lch_in        347 drivers/crypto/omap-des.c 	if (IS_ERR(dd->dma_lch_in)) {
dma_lch_in        349 drivers/crypto/omap-des.c 		return PTR_ERR(dd->dma_lch_in);
dma_lch_in        362 drivers/crypto/omap-des.c 	dma_release_channel(dd->dma_lch_in);
dma_lch_in        373 drivers/crypto/omap-des.c 	dma_release_channel(dd->dma_lch_in);
dma_lch_in        408 drivers/crypto/omap-des.c 	ret = dmaengine_slave_config(dd->dma_lch_in, &cfg);
dma_lch_in        415 drivers/crypto/omap-des.c 	tx_in = dmaengine_prep_slave_sg(dd->dma_lch_in, in_sg, in_sg_len,
dma_lch_in        448 drivers/crypto/omap-des.c 	dma_async_issue_pending(dd->dma_lch_in);
dma_lch_in        510 drivers/crypto/omap-des.c 	dmaengine_terminate_all(dd->dma_lch_in);