dma_base 359 arch/alpha/kernel/core_apecs.c *(vuip)APECS_IOC_PB2R = hose->sg_isa->dma_base | 0x000c0000; dma_base 375 arch/alpha/kernel/core_cia.c addr0 = arena->dma_base; dma_base 735 arch/alpha/kernel/core_cia.c *(vip)CIA_IOC_PCI_W0_BASE = hose->sg_isa->dma_base | 3; dma_base 284 arch/alpha/kernel/core_lca.c *(vulp)LCA_IOC_W_BASE0 = hose->sg_isa->dma_base | (3UL << 32); dma_base 295 arch/alpha/kernel/core_marvel.c hose->sg_isa->dma_base | wbase_m_ena | wbase_m_sg; dma_base 313 arch/alpha/kernel/core_marvel.c hose->sg_pci->dma_base | wbase_m_ena | wbase_m_sg; dma_base 730 arch/alpha/kernel/core_marvel.c baddr >= (unsigned long)hose->sg_pci->dma_base && dma_base 731 arch/alpha/kernel/core_marvel.c last < (unsigned long)hose->sg_pci->dma_base + hose->sg_pci->size) { dma_base 736 arch/alpha/kernel/core_marvel.c baddr -= hose->sg_pci->dma_base; dma_base 737 arch/alpha/kernel/core_marvel.c last -= hose->sg_pci->dma_base; dma_base 930 arch/alpha/kernel/core_marvel.c aper->arena->dma_base + aper->pg_start * PAGE_SIZE; dma_base 1042 arch/alpha/kernel/core_marvel.c unsigned long baddr = addr - aper->arena->dma_base; dma_base 376 arch/alpha/kernel/core_mcpcia.c *(vuip)MCPCIA_W0_BASE(mid) = hose->sg_isa->dma_base | 3; dma_base 380 arch/alpha/kernel/core_mcpcia.c *(vuip)MCPCIA_W1_BASE(mid) = hose->sg_pci->dma_base | 3; dma_base 327 arch/alpha/kernel/core_titan.c port->wsba[0].csr = hose->sg_isa->dma_base | 3; dma_base 335 arch/alpha/kernel/core_titan.c port->wsba[2].csr = hose->sg_pci->dma_base | 3; dma_base 499 arch/alpha/kernel/core_titan.c baddr >= (unsigned long)hose->sg_pci->dma_base && dma_base 500 arch/alpha/kernel/core_titan.c last < (unsigned long)hose->sg_pci->dma_base + hose->sg_pci->size){ dma_base 505 arch/alpha/kernel/core_titan.c baddr -= hose->sg_pci->dma_base; dma_base 506 arch/alpha/kernel/core_titan.c last -= hose->sg_pci->dma_base; dma_base 613 arch/alpha/kernel/core_titan.c aper->arena->dma_base + aper->pg_start * PAGE_SIZE; dma_base 703 arch/alpha/kernel/core_titan.c unsigned long baddr = addr - aper->arena->dma_base; dma_base 335 arch/alpha/kernel/core_tsunami.c pchip->wsba[0].csr = hose->sg_isa->dma_base | 3; dma_base 339 arch/alpha/kernel/core_tsunami.c pchip->wsba[1].csr = hose->sg_pci->dma_base | 3; dma_base 121 arch/alpha/kernel/core_wildfire.c pci->pci_window[0].wbase.csr = hose->sg_isa->dma_base | 3; dma_base 133 arch/alpha/kernel/core_wildfire.c pci->pci_window[3].wbase.csr = hose->sg_pci->dma_base | 3; dma_base 101 arch/alpha/kernel/pci.c if (pci && pci->dma_base + pci->size >= 0xfff00000UL) dma_base 102 arch/alpha/kernel/pci.c pci->size = 0xfff00000UL - pci->dma_base; dma_base 336 arch/alpha/kernel/pci.c sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0; dma_base 140 arch/alpha/kernel/pci_impl.h dma_addr_t dma_base; dma_base 114 arch/alpha/kernel/pci_iommu.c arena->dma_base = base; dma_base 143 arch/alpha/kernel/pci_iommu.c base = arena->dma_base >> PAGE_SHIFT; dma_base 310 arch/alpha/kernel/pci_iommu.c if (!arena || arena->dma_base + arena->size - 1 > max_dma) dma_base 329 arch/alpha/kernel/pci_iommu.c ret = arena->dma_base + dma_ofs * PAGE_SIZE; dma_base 412 arch/alpha/kernel/pci_iommu.c if (!arena || dma_addr < arena->dma_base) dma_base 415 arch/alpha/kernel/pci_iommu.c dma_ofs = (dma_addr - arena->dma_base) >> PAGE_SHIFT; dma_base 419 arch/alpha/kernel/pci_iommu.c dma_addr, arena->dma_base, arena->size); dma_base 621 arch/alpha/kernel/pci_iommu.c out->dma_address = arena->dma_base + dma_ofs*PAGE_SIZE + paddr; dma_base 700 arch/alpha/kernel/pci_iommu.c if (!arena || arena->dma_base + arena->size - 1 > max_dma) dma_base 763 arch/alpha/kernel/pci_iommu.c if (!arena || arena->dma_base + arena->size - 1 > max_dma) dma_base 800 arch/alpha/kernel/pci_iommu.c ofs = (addr - arena->dma_base) >> PAGE_SHIFT; dma_base 811 arch/alpha/kernel/pci_iommu.c if ((fend - arena->dma_base) >> PAGE_SHIFT >= arena->next_entry) dma_base 839 arch/alpha/kernel/pci_iommu.c if (arena && arena->dma_base + arena->size - 1 <= mask) dma_base 842 arch/alpha/kernel/pci_iommu.c if (arena && arena->dma_base + arena->size - 1 <= mask) dma_base 93 arch/arc/mm/dma.c void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, dma_base 24 arch/arm/mach-davinci/sram.c dma_addr_t dma_base = davinci_soc_info.sram_dma; dma_base 28 arch/arm/mach-davinci/sram.c if (!sram_pool || (dma && !dma_base)) dma_base 174 arch/arm/mach-omap1/dma.c static void __iomem *dma_base; dma_base 177 arch/arm/mach-omap1/dma.c void __iomem *addr = dma_base; dma_base 189 arch/arm/mach-omap1/dma.c void __iomem *addr = dma_base; dma_base 324 arch/arm/mach-omap1/dma.c dma_base = ioremap(res[0].start, resource_size(&res[0])); dma_base 325 arch/arm/mach-omap1/dma.c if (!dma_base) { dma_base 409 arch/arm/mach-omap1/dma.c iounmap(dma_base); dma_base 84 arch/arm/mach-omap2/dma.c static void __iomem *dma_base; dma_base 87 arch/arm/mach-omap2/dma.c void __iomem *addr = dma_base; dma_base 97 arch/arm/mach-omap2/dma.c void __iomem *addr = dma_base; dma_base 264 arch/arm/mach-omap2/dma.c dma_base = ioremap(mem->start, resource_size(mem)); dma_base 265 arch/arm/mach-omap2/dma.c if (!dma_base) { dma_base 191 arch/arm/mm/dma-mapping-nommu.c void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, dma_base 2242 arch/arm/mm/dma-mapping.c static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size, dma_base 2250 arch/arm/mm/dma-mapping.c mapping = arm_iommu_create_mapping(dev->bus, dma_base, size); dma_base 2280 arch/arm/mm/dma-mapping.c static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size, dma_base 2292 arch/arm/mm/dma-mapping.c void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, dma_base 2310 arch/arm/mm/dma-mapping.c if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu)) dma_base 40 arch/arm64/mm/dma-mapping.c void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, dma_base 53 arch/arm64/mm/dma-mapping.c iommu_setup_dma_ops(dev, dma_base, size); dma_base 31 arch/c6x/mm/dma-coherent.c static phys_addr_t dma_base; dma_base 52 arch/c6x/mm/dma-coherent.c return dma_base + (pos << PAGE_SHIFT); dma_base 58 arch/c6x/mm/dma-coherent.c u32 pos = (addr - dma_base) >> PAGE_SHIFT; dma_base 60 arch/c6x/mm/dma-coherent.c if (addr < dma_base || (pos + (1 << order)) >= dma_pages) { dma_base 127 arch/c6x/mm/dma-coherent.c dma_base = start; dma_base 145 arch/mips/mm/dma-noncoherent.c void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, dma_base 848 arch/mips/txx9/generic/setup.c unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS; dma_base 859 arch/mips/txx9/generic/setup.c .start = dma_base + dma_chan_out, dma_base 863 arch/mips/txx9/generic/setup.c .start = dma_base + dma_chan_in, dma_base 323 arch/powerpc/platforms/pseries/iommu.c __be64 dma_base; /* address hi,lo */ dma_base 383 arch/powerpc/platforms/pseries/iommu.c dma_offset = next + be64_to_cpu(maprange->dma_base); dma_base 408 arch/powerpc/platforms/pseries/iommu.c be64_to_cpu(maprange->dma_base); dma_base 453 arch/powerpc/platforms/pseries/iommu.c dma_offset = next + be64_to_cpu(maprange->dma_base); dma_base 830 arch/powerpc/platforms/pseries/iommu.c dma_addr = be64_to_cpu(direct64->dma_base); dma_base 1088 arch/powerpc/platforms/pseries/iommu.c ddwprop->dma_base = cpu_to_be64(((u64)create.addr_hi << 32) | dma_base 1121 arch/powerpc/platforms/pseries/iommu.c dma_addr = be64_to_cpu(ddwprop->dma_base); dma_base 58 drivers/ata/pata_octeon_cf.c u64 dma_base; dma_base 252 drivers/ata/pata_octeon_cf.c c = (cf_port->dma_base & 8) >> 3; dma_base 282 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_TIM, dma_tim.u64); dma_base 577 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_INT, mio_boot_dma_int.u64); dma_base 580 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_INT_EN, mio_boot_dma_int.u64); dma_base 612 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_CFG, mio_boot_dma_cfg.u64); dma_base 637 drivers/ata/pata_octeon_cf.c dma_cfg.u64 = cvmx_read_csr(cf_port->dma_base + DMA_CFG); dma_base 647 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_CFG, dma_cfg.u64); dma_base 651 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_INT_EN, dma_int.u64); dma_base 655 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_INT, dma_int.u64); dma_base 692 drivers/ata/pata_octeon_cf.c dma_int.u64 = cvmx_read_csr(cf_port->dma_base + DMA_INT); dma_base 693 drivers/ata/pata_octeon_cf.c dma_cfg.u64 = cvmx_read_csr(cf_port->dma_base + DMA_CFG); dma_base 723 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_INT, dma_base 894 drivers/ata/pata_octeon_cf.c cf_port->dma_base = (u64)devm_ioremap_nocache(&pdev->dev, res_dma->start, dma_base 896 drivers/ata/pata_octeon_cf.c if (!cf_port->dma_base) { dma_base 1016 drivers/ata/pata_octeon_cf.c if (cf_port->dma_base) { dma_base 1020 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_CFG, dma_cfg.u64); dma_base 1024 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_INT_EN, dma_int.u64); dma_base 1028 drivers/ata/pata_octeon_cf.c cvmx_write_csr(cf_port->dma_base + DMA_INT, dma_int.u64); dma_base 153 drivers/dma/mv_xor_v2.c void __iomem *dma_base; dma_base 227 drivers/dma/mv_xor_v2.c writel(num_of_desc, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_ADD_OFF); dma_base 237 drivers/dma/mv_xor_v2.c writel(num_of_desc, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_DEALLOC_OFF); dma_base 247 drivers/dma/mv_xor_v2.c xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_CTRL_OFF); dma_base 261 drivers/dma/mv_xor_v2.c reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF); dma_base 265 drivers/dma/mv_xor_v2.c writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF); dma_base 268 drivers/dma/mv_xor_v2.c reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_TMOT); dma_base 271 drivers/dma/mv_xor_v2.c writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_TMOT); dma_base 280 drivers/dma/mv_xor_v2.c reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_DONE_OFF); dma_base 538 drivers/dma/mv_xor_v2.c reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_DONE_OFF); dma_base 618 drivers/dma/mv_xor_v2.c xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_BALR_OFF); dma_base 620 drivers/dma/mv_xor_v2.c xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_BAHR_OFF); dma_base 622 drivers/dma/mv_xor_v2.c xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_CDAT_OFF); dma_base 631 drivers/dma/mv_xor_v2.c xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_SIZE_OFF); dma_base 635 drivers/dma/mv_xor_v2.c xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_BALR_OFF); dma_base 637 drivers/dma/mv_xor_v2.c xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_BAHR_OFF); dma_base 648 drivers/dma/mv_xor_v2.c reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_ARATTR_OFF); dma_base 652 drivers/dma/mv_xor_v2.c writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_ARATTR_OFF); dma_base 654 drivers/dma/mv_xor_v2.c reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_AWATTR_OFF); dma_base 658 drivers/dma/mv_xor_v2.c writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_AWATTR_OFF); dma_base 683 drivers/dma/mv_xor_v2.c writel(0, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_STOP_OFF); dma_base 693 drivers/dma/mv_xor_v2.c writel(0x1, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_STOP_OFF); dma_base 726 drivers/dma/mv_xor_v2.c xor_dev->dma_base = devm_ioremap_resource(&pdev->dev, res); dma_base 727 drivers/dma/mv_xor_v2.c if (IS_ERR(xor_dev->dma_base)) dma_base 728 drivers/dma/mv_xor_v2.c return PTR_ERR(xor_dev->dma_base); dma_base 90 drivers/gpu/drm/msm/dsi/dsi.h bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len); dma_base 154 drivers/gpu/drm/msm/dsi/dsi.h u32 dma_base, u32 len); dma_base 1239 drivers/gpu/drm/msm/dsi/dsi_host.c int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *dma_base) dma_base 1244 drivers/gpu/drm/msm/dsi/dsi_host.c if (!dma_base) dma_base 1248 drivers/gpu/drm/msm/dsi/dsi_host.c priv->kms->aspace, dma_base); dma_base 1251 drivers/gpu/drm/msm/dsi/dsi_host.c int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *dma_base) dma_base 1253 drivers/gpu/drm/msm/dsi/dsi_host.c if (!dma_base) dma_base 1256 drivers/gpu/drm/msm/dsi/dsi_host.c *dma_base = msm_host->tx_buf_paddr; dma_base 1264 drivers/gpu/drm/msm/dsi/dsi_host.c uint64_t dma_base; dma_base 1267 drivers/gpu/drm/msm/dsi/dsi_host.c ret = cfg_hnd->ops->dma_base_get(msm_host, &dma_base); dma_base 1278 drivers/gpu/drm/msm/dsi/dsi_host.c msm_host->id, dma_base, len); dma_base 2178 drivers/gpu/drm/msm/dsi/dsi_host.c void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host, u32 dma_base, dma_base 2183 drivers/gpu/drm/msm/dsi/dsi_host.c dsi_write(msm_host, REG_DSI_DMA_BASE, dma_base); dma_base 768 drivers/gpu/drm/msm/dsi/dsi_manager.c bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len) dma_base 778 drivers/gpu/drm/msm/dsi/dsi_manager.c msm_dsi_host_cmd_xfer_commit(msm_dsi0->host, dma_base, len); dma_base 780 drivers/gpu/drm/msm/dsi/dsi_manager.c msm_dsi_host_cmd_xfer_commit(host, dma_base, len); dma_base 104 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c u32 dma_base; dma_base 275 drivers/ide/aec62xx.c unsigned long dma_base = pci_resource_start(dev, 4); dma_base 277 drivers/ide/aec62xx.c if (inb(dma_base + 2) & 0x10) { dma_base 475 drivers/ide/alim15x3.c hwif->dma_base = base; dma_base 259 drivers/ide/cmd64x.c dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); dma_base 261 drivers/ide/cmd64x.c dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); dma_base 263 drivers/ide/cmd64x.c outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD); dma_base 265 drivers/ide/cmd64x.c outb(dma_stat | 6, hwif->dma_base + ATA_DMA_STATUS); dma_base 40 drivers/ide/cs5530.c #define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20)) dma_base 723 drivers/ide/hpt366.c dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); dma_base 725 drivers/ide/hpt366.c outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD); dma_base 740 drivers/ide/hpt366.c u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); dma_base 745 drivers/ide/hpt366.c dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); dma_base 766 drivers/ide/hpt366.c dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); dma_base 1231 drivers/ide/hpt366.c hwif->dma_base = base; dma_base 56 drivers/ide/ide-dma-sff.c unsigned long addr = hwif->dma_base + ATA_DMA_STATUS; dma_base 67 drivers/ide/ide-dma-sff.c unsigned long addr = hwif->dma_base + ATA_DMA_STATUS; dma_base 204 drivers/ide/ide-dma-sff.c (void __iomem *)(hwif->dma_base + ATA_DMA_TABLE_OFS)); dma_base 206 drivers/ide/ide-dma-sff.c outl(hwif->dmatable_dma, hwif->dma_base + ATA_DMA_TABLE_OFS); dma_base 210 drivers/ide/ide-dma-sff.c writeb(rw, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); dma_base 212 drivers/ide/ide-dma-sff.c outb(rw, hwif->dma_base + ATA_DMA_CMD); dma_base 275 drivers/ide/ide-dma-sff.c dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); dma_base 277 drivers/ide/ide-dma-sff.c (void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); dma_base 279 drivers/ide/ide-dma-sff.c dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); dma_base 280 drivers/ide/ide-dma-sff.c outb(dma_cmd | ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD); dma_base 293 drivers/ide/ide-dma-sff.c dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); dma_base 295 drivers/ide/ide-dma-sff.c (void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); dma_base 297 drivers/ide/ide-dma-sff.c dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); dma_base 298 drivers/ide/ide-dma-sff.c outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD); dma_base 1119 drivers/ide/ide-probe.c hwif->dma_base = 0; dma_base 1127 drivers/ide/ide-probe.c ((d->host_flags & IDE_HFLAG_SERIALIZE_DMA) && hwif->dma_base)) dma_base 578 drivers/ide/it821x.c if (hwif->dma_base == 0) dma_base 62 drivers/ide/ns87415.c return superio_ide_inb(hwif->dma_base + ATA_DMA_STATUS); dma_base 192 drivers/ide/ns87415.c dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); dma_base 194 drivers/ide/ns87415.c outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD); dma_base 196 drivers/ide/ns87415.c dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); dma_base 197 drivers/ide/ns87415.c outb(dma_cmd | 6, hwif->dma_base + ATA_DMA_CMD); dma_base 266 drivers/ide/ns87415.c if (!hwif->dma_base) dma_base 269 drivers/ide/ns87415.c outb(0x60, hwif->dma_base + ATA_DMA_STATUS); dma_base 181 drivers/ide/palm_bk3710.c void __iomem *base = (void __iomem *)hwif->dma_base; dma_base 199 drivers/ide/palm_bk3710.c void __iomem *base = (void __iomem *)hwif->dma_base; dma_base 279 drivers/ide/palm_bk3710.c hwif->dma_base = hwif->io_ports.data_addr - IDE_PALM_ATA_PRI_REG_OFFSET; dma_base 71 drivers/ide/pdc202xx_new.c outb(index, hwif->dma_base + 1); dma_base 72 drivers/ide/pdc202xx_new.c value = inb(hwif->dma_base + 3); dma_base 85 drivers/ide/pdc202xx_new.c outb(index, hwif->dma_base + 1); dma_base 86 drivers/ide/pdc202xx_new.c outb(value, hwif->dma_base + 3); dma_base 200 drivers/ide/pdc202xx_new.c static long read_counter(u32 dma_base) dma_base 202 drivers/ide/pdc202xx_new.c u32 pri_dma_base = dma_base, sec_dma_base = dma_base + 0x08; dma_base 240 drivers/ide/pdc202xx_new.c static long detect_pll_input_clock(unsigned long dma_base) dma_base 247 drivers/ide/pdc202xx_new.c start_count = read_counter(dma_base); dma_base 251 drivers/ide/pdc202xx_new.c outb(0x01, dma_base + 0x01); dma_base 252 drivers/ide/pdc202xx_new.c scr1 = inb(dma_base + 0x03); dma_base 254 drivers/ide/pdc202xx_new.c outb(scr1 | 0x40, dma_base + 0x03); dma_base 259 drivers/ide/pdc202xx_new.c end_count = read_counter(dma_base); dma_base 263 drivers/ide/pdc202xx_new.c outb(0x01, dma_base + 0x01); dma_base 264 drivers/ide/pdc202xx_new.c scr1 = inb(dma_base + 0x03); dma_base 266 drivers/ide/pdc202xx_new.c outb(scr1 & ~0x40, dma_base + 0x03); dma_base 301 drivers/ide/pdc202xx_new.c unsigned long dma_base = pci_resource_start(dev, 4); dma_base 302 drivers/ide/pdc202xx_new.c unsigned long sec_dma_base = dma_base + 0x08; dma_base 307 drivers/ide/pdc202xx_new.c if (dma_base == 0) dma_base 332 drivers/ide/pdc202xx_new.c pll_input = detect_pll_input_clock(dma_base); dma_base 235 drivers/ide/piix.c if (drive->waiting_for_dma || hwif->dma_base == 0) dma_base 239 drivers/ide/piix.c dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); dma_base 241 drivers/ide/piix.c outb(dma_stat, hwif->dma_base + ATA_DMA_STATUS); dma_base 302 drivers/ide/piix.c if (!hwif->dma_base) dma_base 174 drivers/ide/sc1200.c unsigned long dma_base = hwif->dma_base; dma_base 177 drivers/ide/sc1200.c dma_stat = inb(dma_base+2); /* get DMA status */ dma_base 183 drivers/ide/sc1200.c outb(dma_stat|0x1b, dma_base+2); /* clear the INTR & ERROR bits */ dma_base 184 drivers/ide/sc1200.c outb(inb(dma_base)&~1, dma_base); /* !! DO THIS HERE !! stop DMA */ dma_base 62 drivers/ide/setup-pci.c static int ide_pci_clear_simplex(unsigned long dma_base, const char *name) dma_base 64 drivers/ide/setup-pci.c u8 dma_stat = inb(dma_base + 2); dma_base 66 drivers/ide/setup-pci.c outb(dma_stat & 0x60, dma_base + 2); dma_base 67 drivers/ide/setup-pci.c dma_stat = inb(dma_base + 2); dma_base 83 drivers/ide/setup-pci.c unsigned long dma_base = 0; dma_base 86 drivers/ide/setup-pci.c return hwif->dma_base; dma_base 88 drivers/ide/setup-pci.c if (hwif->mate && hwif->mate->dma_base) { dma_base 89 drivers/ide/setup-pci.c dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8); dma_base 93 drivers/ide/setup-pci.c dma_base = pci_resource_start(dev, baridx); dma_base 95 drivers/ide/setup-pci.c if (dma_base == 0) { dma_base 103 drivers/ide/setup-pci.c dma_base += 8; dma_base 105 drivers/ide/setup-pci.c return dma_base; dma_base 118 drivers/ide/setup-pci.c if (ide_pci_clear_simplex(hwif->dma_base, d->name)) dma_base 135 drivers/ide/setup-pci.c if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) { dma_base 366 drivers/ide/setup-pci.c hwif->dma_base = base; dma_base 387 drivers/ide/siimage.c if (readb((void __iomem *)(hwif->dma_base + ATA_DMA_STATUS)) & 4) dma_base 602 drivers/ide/siimage.c hwif->dma_base = (unsigned long)addr + (ch ? 0x08 : 0x00); dma_base 169 drivers/ide/sl82c105.c dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); dma_base 171 drivers/ide/sl82c105.c outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD); dma_base 69 drivers/ide/tc86c001.c u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); dma_base 77 drivers/ide/tc86c001.c u8 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); dma_base 83 drivers/ide/tc86c001.c outb(dma_cmd & ~0x01, hwif->dma_base + ATA_DMA_CMD); dma_base 92 drivers/ide/tc86c001.c outb(0x00, hwif->dma_base + ATA_DMA_CMD); dma_base 94 drivers/ide/tc86c001.c outb(0x01, hwif->dma_base + ATA_DMA_CMD); dma_base 165 drivers/ide/tc86c001.c if (!hwif->dma_base) dma_base 202 drivers/ide/trm290.c outl(hwif->dmatable_dma | rw, hwif->dma_base); dma_base 204 drivers/ide/trm290.c outw(count * 2 - 1, hwif->dma_base + 2); dma_base 216 drivers/ide/trm290.c u16 status = inw(drive->hwif->dma_base + 2); dma_base 225 drivers/ide/trm290.c u16 status = inw(drive->hwif->dma_base + 2); dma_base 249 drivers/ide/trm290.c hwif->dma_base = (cfg_base + 4) ^ (hwif->channel ? 0x80 : 0); dma_base 252 drivers/ide/trm290.c hwif->name, hwif->dma_base, hwif->dma_base + 3); dma_base 411 drivers/ide/tx4939ide.c hwif->dma_base = dma_base 1115 drivers/iommu/dma-iommu.c void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size) dma_base 1127 drivers/iommu/dma-iommu.c if (iommu_dma_init_domain(domain, dma_base, size, dev)) dma_base 1143 drivers/media/platform/s5p-mfc/s5p_mfc.c mfc_dev->dma_base[BANK_L_CTX] = mfc_dev->fw_buf.dma; dma_base 1159 drivers/media/platform/s5p-mfc/s5p_mfc.c mfc_dev->dma_base[BANK_R_CTX] = bank2_dma_addr - align_size; dma_base 1207 drivers/media/platform/s5p-mfc/s5p_mfc.c mfc_dev->dma_base[BANK_L_CTX] = mfc_dev->mem_base; dma_base 1208 drivers/media/platform/s5p-mfc/s5p_mfc.c mfc_dev->dma_base[BANK_R_CTX] = mfc_dev->mem_base; dma_base 1218 drivers/media/platform/s5p-mfc/s5p_mfc.c mfc_dev->dma_base[BANK_L_CTX] += offset; dma_base 1219 drivers/media/platform/s5p-mfc/s5p_mfc.c mfc_dev->dma_base[BANK_R_CTX] += offset; dma_base 324 drivers/media/platform/s5p-mfc/s5p_mfc_common.h dma_addr_t dma_base[BANK_CTX_NUM]; dma_base 176 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c mfc_write(dev, dev->dma_base[BANK_L_CTX], dma_base 179 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c &dev->dma_base[BANK_L_CTX]); dma_base 181 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c mfc_write(dev, dev->dma_base[BANK_L_CTX], dma_base 183 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c mfc_write(dev, dev->dma_base[BANK_R_CTX], dma_base 186 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c &dev->dma_base[BANK_L_CTX], dma_base 187 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c &dev->dma_base[BANK_R_CTX]); dma_base 58 drivers/media/platform/s5p-mfc/s5p_mfc_opr.c dma_addr_t base = dev->dma_base[mem_ctx]; dma_base 30 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c #define OFFSETA(x) (((x) - dev->dma_base[BANK_L_CTX]) >> MFC_OFFSET_SHIFT) dma_base 31 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c #define OFFSETB(x) (((x) - dev->dma_base[BANK_R_CTX]) >> MFC_OFFSET_SHIFT) dma_base 233 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c ctx->shm.ofs = ctx->shm.dma - dev->dma_base[BANK_L_CTX]; dma_base 532 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c *y_addr = dev->dma_base[BANK_R_CTX] + dma_base 534 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c *c_addr = dev->dma_base[BANK_R_CTX] + dma_base 1212 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->dma_base[BANK_R_CTX], dma_base 1213 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c dev->dma_base[BANK_R_CTX]); dma_base 1222 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c dev->dma_base[BANK_R_CTX], dma_base 1223 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v5.c dev->dma_base[BANK_R_CTX]); dma_base 227 drivers/mmc/host/cavium-octeon.c host->dma_base = (void __iomem *)base; dma_base 317 drivers/mmc/host/cavium-octeon.c dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host)); dma_base 319 drivers/mmc/host/cavium-octeon.c writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host)); dma_base 83 drivers/mmc/host/cavium-thunderx.c host->dma_base = host->base; dma_base 173 drivers/mmc/host/cavium-thunderx.c dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host)); dma_base 175 drivers/mmc/host/cavium-thunderx.c writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host)); dma_base 387 drivers/mmc/host/cavium.c fifo_cfg = readq(host->dma_base + MIO_EMM_DMA_FIFO_CFG(host)); dma_base 396 drivers/mmc/host/cavium.c writeq(BIT_ULL(16), host->dma_base + MIO_EMM_DMA_FIFO_CFG(host)); dma_base 539 drivers/mmc/host/cavium.c writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host)); dma_base 545 drivers/mmc/host/cavium.c writeq(addr, host->dma_base + MIO_EMM_DMA_ADR(host)); dma_base 567 drivers/mmc/host/cavium.c writeq(0, host->dma_base + MIO_EMM_DMA_FIFO_CFG(host)); dma_base 574 drivers/mmc/host/cavium.c writeq(addr, host->dma_base + MIO_EMM_DMA_FIFO_ADR(host)); dma_base 597 drivers/mmc/host/cavium.c writeq(fifo_cmd, host->dma_base + MIO_EMM_DMA_FIFO_CMD(host)); dma_base 614 drivers/mmc/host/cavium.c writeq(BIT_ULL(16), host->dma_base + MIO_EMM_DMA_FIFO_CFG(host)); dma_base 58 drivers/mmc/host/cavium.h void __iomem *dma_base; dma_base 67 drivers/net/ethernet/8390/etherh.c void __iomem *dma_base; dma_base 309 drivers/net/ethernet/8390/etherh.c void __iomem *dma_base, *addr; dma_base 327 drivers/net/ethernet/8390/etherh.c dma_base = etherh_priv(dev)->dma_base; dma_base 348 drivers/net/ethernet/8390/etherh.c writesw (dma_base, buf, count >> 1); dma_base 350 drivers/net/ethernet/8390/etherh.c writesb (dma_base, buf, count); dma_base 374 drivers/net/ethernet/8390/etherh.c void __iomem *dma_base, *addr; dma_base 386 drivers/net/ethernet/8390/etherh.c dma_base = etherh_priv(dev)->dma_base; dma_base 397 drivers/net/ethernet/8390/etherh.c readsw (dma_base, buf, count >> 1); dma_base 399 drivers/net/ethernet/8390/etherh.c buf[count - 1] = readb (dma_base); dma_base 401 drivers/net/ethernet/8390/etherh.c readsb (dma_base, buf, count); dma_base 414 drivers/net/ethernet/8390/etherh.c void __iomem *dma_base, *addr; dma_base 426 drivers/net/ethernet/8390/etherh.c dma_base = etherh_priv(dev)->dma_base; dma_base 436 drivers/net/ethernet/8390/etherh.c readsw (dma_base, hdr, sizeof (*hdr) >> 1); dma_base 438 drivers/net/ethernet/8390/etherh.c readsb (dma_base, hdr, sizeof (*hdr)); dma_base 708 drivers/net/ethernet/8390/etherh.c eh->dma_base = eh->memc + data->dataport_offset; dma_base 339 drivers/net/ethernet/amd/xgbe/xgbe-desc.c bd->dma_base = pa->pages_dma; dma_base 1465 drivers/net/ethernet/amd/xgbe/xgbe-dev.c hdr_dma = rdata->rx.hdr.dma_base + rdata->rx.hdr.dma_off; dma_base 1466 drivers/net/ethernet/amd/xgbe/xgbe-dev.c buf_dma = rdata->rx.buf.dma_base + rdata->rx.buf.dma_off; dma_base 2563 drivers/net/ethernet/amd/xgbe/xgbe-drv.c dma_sync_single_range_for_cpu(pdata->dev, rdata->rx.hdr.dma_base, dma_base 2778 drivers/net/ethernet/amd/xgbe/xgbe-drv.c rdata->rx.buf.dma_base, dma_base 398 drivers/net/ethernet/amd/xgbe/xgbe.h dma_addr_t dma_base; dma_base 149 drivers/net/ethernet/broadcom/b44.c dma_addr_t dma_base, dma_base 153 drivers/net/ethernet/broadcom/b44.c dma_sync_single_for_device(sdev->dma_dev, dma_base + offset, dma_base 158 drivers/net/ethernet/broadcom/b44.c dma_addr_t dma_base, dma_base 162 drivers/net/ethernet/broadcom/b44.c dma_sync_single_for_cpu(sdev->dma_dev, dma_base + offset, dma_base 585 drivers/net/ethernet/broadcom/bgmac.c ring->dma_base); dma_base 638 drivers/net/ethernet/broadcom/bgmac.c &ring->dma_base, dma_base 649 drivers/net/ethernet/broadcom/bgmac.c ring->index_base = lower_32_bits(ring->dma_base); dma_base 663 drivers/net/ethernet/broadcom/bgmac.c &ring->dma_base, dma_base 674 drivers/net/ethernet/broadcom/bgmac.c ring->index_base = lower_32_bits(ring->dma_base); dma_base 697 drivers/net/ethernet/broadcom/bgmac.c lower_32_bits(ring->dma_base)); dma_base 699 drivers/net/ethernet/broadcom/bgmac.c upper_32_bits(ring->dma_base)); dma_base 715 drivers/net/ethernet/broadcom/bgmac.c lower_32_bits(ring->dma_base)); dma_base 717 drivers/net/ethernet/broadcom/bgmac.c upper_32_bits(ring->dma_base)); dma_base 465 drivers/net/ethernet/broadcom/bgmac.h dma_addr_t dma_base; dma_base 110 drivers/net/ethernet/cortina/gemini.c void __iomem *dma_base; dma_base 523 drivers/net/ethernet/cortina/gemini.c val = readl(port->dma_base + GMAC_AHB_WEIGHT_REG); dma_base 524 drivers/net/ethernet/cortina/gemini.c writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG); dma_base 527 drivers/net/ethernet/cortina/gemini.c port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG); dma_base 529 drivers/net/ethernet/cortina/gemini.c port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG); dma_base 563 drivers/net/ethernet/cortina/gemini.c rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; dma_base 586 drivers/net/ethernet/cortina/gemini.c port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG); dma_base 687 drivers/net/ethernet/cortina/gemini.c rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; dma_base 697 drivers/net/ethernet/cortina/gemini.c writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG); dma_base 1243 drivers/net/ethernet/cortina/gemini.c ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE_PTR_REG(txq_num); dma_base 1562 drivers/net/ethernet/cortina/gemini.c reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG); dma_base 1563 drivers/net/ethernet/cortina/gemini.c reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG); dma_base 1569 drivers/net/ethernet/cortina/gemini.c reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG); dma_base 1570 drivers/net/ethernet/cortina/gemini.c reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG); dma_base 1571 drivers/net/ethernet/cortina/gemini.c reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG); dma_base 1572 drivers/net/ethernet/cortina/gemini.c reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG); dma_base 1577 drivers/net/ethernet/cortina/gemini.c ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; dma_base 1579 drivers/net/ethernet/cortina/gemini.c reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG); dma_base 1580 drivers/net/ethernet/cortina/gemini.c reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG); dma_base 1586 drivers/net/ethernet/cortina/gemini.c reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG); dma_base 1587 drivers/net/ethernet/cortina/gemini.c reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG); dma_base 1588 drivers/net/ethernet/cortina/gemini.c reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG); dma_base 1589 drivers/net/ethernet/cortina/gemini.c reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG); dma_base 1736 drivers/net/ethernet/cortina/gemini.c void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG; dma_base 1757 drivers/net/ethernet/cortina/gemini.c void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG; dma_base 2411 drivers/net/ethernet/cortina/gemini.c port->dma_base = devm_ioremap_resource(dev, dmares); dma_base 2412 drivers/net/ethernet/cortina/gemini.c if (IS_ERR(port->dma_base)) dma_base 2413 drivers/net/ethernet/cortina/gemini.c return PTR_ERR(port->dma_base); dma_base 372 drivers/net/ethernet/synopsys/dwc-xlgmac-desc.c bd->dma_base = pa->pages_dma; dma_base 1110 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c hdr_dma = desc_data->rx.hdr.dma_base + desc_data->rx.hdr.dma_off; dma_base 1111 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c buf_dma = desc_data->rx.buf.dma_base + desc_data->rx.buf.dma_off; dma_base 1003 drivers/net/ethernet/synopsys/dwc-xlgmac-net.c dma_sync_single_range_for_cpu(pdata->dev, desc_data->rx.hdr.dma_base, dma_base 1019 drivers/net/ethernet/synopsys/dwc-xlgmac-net.c desc_data->rx.buf.dma_base, dma_base 1199 drivers/net/ethernet/synopsys/dwc-xlgmac-net.c desc_data->rx.buf.dma_base, dma_base 234 drivers/net/ethernet/synopsys/dwc-xlgmac.h dma_addr_t dma_base; dma_base 214 drivers/ntb/test/ntb_tool.c dma_addr_t dma_base; dma_base 594 drivers/ntb/test/ntb_tool.c &inmw->dma_base, GFP_KERNEL); dma_base 598 drivers/ntb/test/ntb_tool.c if (!IS_ALIGNED(inmw->dma_base, addr_align)) { dma_base 603 drivers/ntb/test/ntb_tool.c ret = ntb_mw_set_trans(tc->ntb, pidx, widx, inmw->dma_base, inmw->size); dma_base 616 drivers/ntb/test/ntb_tool.c inmw->dma_base); dma_base 618 drivers/ntb/test/ntb_tool.c inmw->dma_base = 0; dma_base 633 drivers/ntb/test/ntb_tool.c inmw->mm_base, inmw->dma_base); dma_base 637 drivers/ntb/test/ntb_tool.c inmw->dma_base = 0; dma_base 678 drivers/ntb/test/ntb_tool.c &inmw->dma_base); dma_base 96 drivers/spi/spi-pic32.c dma_addr_t dma_base; dma_base 365 drivers/spi/spi-pic32.c cfg.src_addr = pic32s->dma_base + buf_offset; dma_base 366 drivers/spi/spi-pic32.c cfg.dst_addr = pic32s->dma_base + buf_offset; dma_base 710 drivers/spi/spi-pic32.c pic32s->dma_base = mem->start; dma_base 122 drivers/usb/mtu3/mtu3_qmu.c dma_addr_t dma_base = ring->dma; dma_base 124 drivers/usb/mtu3/mtu3_qmu.c u32 offset = (dma_addr - dma_base) / sizeof(*gpd_head); dma_base 135 drivers/usb/mtu3/mtu3_qmu.c dma_addr_t dma_base = ring->dma; dma_base 143 drivers/usb/mtu3/mtu3_qmu.c return dma_base + (offset * sizeof(*gpd)); dma_base 22 include/linux/dma-iommu.h void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size); dma_base 47 include/linux/dma-iommu.h static inline void iommu_setup_dma_ops(struct device *dev, u64 dma_base, dma_base 705 include/linux/dma-mapping.h void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, dma_base 708 include/linux/dma-mapping.h static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, dma_base 776 include/linux/ide.h unsigned long dma_base; /* base addr for dma ports */ dma_base 252 sound/pci/azt3328.c unsigned int dma_base; /* helper to avoid an indirection in hotpath */ dma_base 1451 sound/pci/azt3328.c codec->dma_base = runtime->dma_addr; dma_base 1635 sound/pci/azt3328.c result -= codec->dma_base; dma_base 55 sound/ppc/pmac.c &rec->dma_base, GFP_KERNEL); dma_base 61 sound/ppc/pmac.c rec->addr = rec->dma_base + (unsigned long)((char *)rec->cmds - (char *)rec->space); dma_base 71 sound/ppc/pmac.c dma_free_coherent(&chip->pdev->dev, rsize, rec->space, rec->dma_base); dma_base 40 sound/ppc/pmac.h dma_addr_t dma_base; dma_base 833 sound/soc/bcm/bcm2835-i2s.c dma_addr_t dma_base; dma_base 865 sound/soc/bcm/bcm2835-i2s.c dma_base = be32_to_cpup(addr); dma_base 868 sound/soc/bcm/bcm2835-i2s.c dma_base + BCM2835_I2S_FIFO_A_REG; dma_base 871 sound/soc/bcm/bcm2835-i2s.c dma_base + BCM2835_I2S_FIFO_A_REG; dma_base 109 sound/soc/intel/common/sst-acpi.c sst_pdata->dma_base = desc->resindex_dma_base; dma_base 200 sound/soc/intel/common/sst-dsp.h u32 dma_base; dma_base 294 sound/soc/intel/common/sst-firmware.c mem.start = sst->addr.lpe_base + sst_pdata->dma_base; dma_base 295 sound/soc/intel/common/sst-firmware.c mem.end = sst->addr.lpe_base + sst_pdata->dma_base + sst_pdata->dma_size - 1;