dm_fat_tbl         90 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
dm_fat_tbl         96 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		dm_fat_tbl->Bssid[i] = 0;
dm_fat_tbl         97 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		dm_fat_tbl->antSumRSSI[i] = 0;
dm_fat_tbl         98 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		dm_fat_tbl->antRSSIcnt[i] = 0;
dm_fat_tbl         99 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		dm_fat_tbl->antAveRSSI[i] = 0;
dm_fat_tbl        101 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	dm_fat_tbl->TrainIdx = 0;
dm_fat_tbl        102 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	dm_fat_tbl->FAT_State = FAT_NORMAL_STATE;
dm_fat_tbl        153 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
dm_fat_tbl        157 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	if (dm_fat_tbl->RxIdleAnt != ant) {
dm_fat_tbl        186 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	dm_fat_tbl->RxIdleAnt = ant;
dm_fat_tbl        191 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
dm_fat_tbl        198 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	dm_fat_tbl->antsel_a[mac_id] = target_ant & BIT(0);
dm_fat_tbl        199 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	dm_fat_tbl->antsel_b[mac_id] = (target_ant & BIT(1)) >> 1;
dm_fat_tbl        200 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	dm_fat_tbl->antsel_c[mac_id] = (target_ant & BIT(2)) >> 2;
dm_fat_tbl        206 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
dm_fat_tbl        210 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		SET_TX_DESC_ANTSEL_A_88E(desc, dm_fat_tbl->antsel_a[mac_id]);
dm_fat_tbl        211 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		SET_TX_DESC_ANTSEL_B_88E(desc, dm_fat_tbl->antsel_b[mac_id]);
dm_fat_tbl        212 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		SET_TX_DESC_ANTSEL_C_88E(desc, dm_fat_tbl->antsel_c[mac_id]);
dm_fat_tbl        219 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
dm_fat_tbl        223 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			dm_fat_tbl->MainAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl        224 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			dm_fat_tbl->MainAnt_Cnt[mac_id]++;
dm_fat_tbl        226 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			dm_fat_tbl->AuxAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl        227 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			dm_fat_tbl->AuxAnt_Cnt[mac_id]++;
dm_fat_tbl        231 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			dm_fat_tbl->MainAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl        232 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			dm_fat_tbl->MainAnt_Cnt[mac_id]++;
dm_fat_tbl        234 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			dm_fat_tbl->AuxAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl        235 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			dm_fat_tbl->AuxAnt_Cnt[mac_id]++;
dm_fat_tbl        242 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
dm_fat_tbl        254 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			main_rssi = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ?
dm_fat_tbl        255 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 				     (dm_fat_tbl->MainAnt_Sum[i] /
dm_fat_tbl        256 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 				      dm_fat_tbl->MainAnt_Cnt[i]) : 0;
dm_fat_tbl        257 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			aux_rssi = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ?
dm_fat_tbl        258 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 				    (dm_fat_tbl->AuxAnt_Sum[i] /
dm_fat_tbl        259 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 				     dm_fat_tbl->AuxAnt_Cnt[i]) : 0;
dm_fat_tbl        270 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			if ((dm_fat_tbl->RxIdleAnt == MAIN_ANT) &&
dm_fat_tbl        273 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			else if ((dm_fat_tbl->RxIdleAnt == AUX_ANT) &&
dm_fat_tbl        286 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		dm_fat_tbl->MainAnt_Sum[i] = 0;
dm_fat_tbl        287 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		dm_fat_tbl->AuxAnt_Sum[i] = 0;
dm_fat_tbl        288 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		dm_fat_tbl->MainAnt_Cnt[i] = 0;
dm_fat_tbl        289 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		dm_fat_tbl->AuxAnt_Cnt[i] = 0;
dm_fat_tbl        301 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 	struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
dm_fat_tbl        309 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		if (dm_fat_tbl->bBecomeLinked) {
dm_fat_tbl        318 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
dm_fat_tbl        322 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 		if (!dm_fat_tbl->bBecomeLinked) {
dm_fat_tbl        331 drivers/staging/rtl8188eu/hal/odm_rtl8188e.c 			dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;