Div               127 arch/arm/mach-pxa/include/mach/regs-lcd.h #define LCCR3_PixClkDiv(Div)	(((Div) << FShft (LCCR3_PCD)))
Div               341 arch/arm/mach-sa1100/include/mach/SA-1100.h #define UTCR1_BdRtDiv(Div)      	/*  Baud Rate Divisor [16..65536]  */ \
Div               342 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 16)/16 >> FSize (UTCR2_BRD) << \
Div               344 arch/arm/mach-sa1100/include/mach/SA-1100.h #define UTCR2_BdRtDiv(Div)      	/*  Baud Rate Divisor [16..65536]  */ \
Div               345 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 16)/16 & FAlnMsk (UTCR2_BRD) << \
Div               349 arch/arm/mach-sa1100/include/mach/SA-1100.h #define UTCR1_CeilBdRtDiv(Div)  	/*  Ceil. of BdRtDiv [16..65536]   */ \
Div               350 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 1)/16 >> FSize (UTCR2_BRD) << \
Div               352 arch/arm/mach-sa1100/include/mach/SA-1100.h #define UTCR2_CeilBdRtDiv(Div)  	/*  Ceil. of BdRtDiv [16..65536]   */ \
Div               353 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 1)/16 & FAlnMsk (UTCR2_BRD) << \
Div               480 arch/arm/mach-sa1100/include/mach/SA-1100.h #define SDCR3_BdRtDiv(Div)      	/*  Baud Rate Divisor [16..65536]  */ \
Div               481 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 16)/16 >> FSize (SDCR4_BRD) << \
Div               483 arch/arm/mach-sa1100/include/mach/SA-1100.h #define SDCR4_BdRtDiv(Div)      	/*  Baud Rate Divisor [16..65536]  */ \
Div               484 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 16)/16 & FAlnMsk (SDCR4_BRD) << \
Div               488 arch/arm/mach-sa1100/include/mach/SA-1100.h #define SDCR3_CeilBdRtDiv(Div)  	/*  Ceil. of BdRtDiv [16..65536]   */ \
Div               489 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 1)/16 >> FSize (SDCR4_BRD) << \
Div               491 arch/arm/mach-sa1100/include/mach/SA-1100.h #define SDCR4_CeilBdRtDiv(Div)  	/*  Ceil. of BdRtDiv [16..65536]   */ \
Div               492 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 1)/16 & FAlnMsk (SDCR4_BRD) << \
Div               641 arch/arm/mach-sa1100/include/mach/SA-1100.h #define MCCR0_AudSmpDiv(Div)    	/*  Audio Sampling rate Divisor    */ \
Div               643 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	((Div)/32 << FShft (MCCR0_ASD))
Div               646 arch/arm/mach-sa1100/include/mach/SA-1100.h #define MCCR0_CeilAudSmpDiv(Div)	/*  Ceil. of AudSmpDiv [192..4064] */ \
Div               647 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) + 31)/32 << FShft (MCCR0_ASD))
Div               654 arch/arm/mach-sa1100/include/mach/SA-1100.h #define MCCR0_TcmSmpDiv(Div)    	/*  Telecom Sampling rate Divisor  */ \
Div               656 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	((Div)/32 << FShft (MCCR0_TSD))
Div               659 arch/arm/mach-sa1100/include/mach/SA-1100.h #define MCCR0_CeilTcmSmpDiv(Div)	/*  Ceil. of TcmSmpDiv [512..4064] */ \
Div               660 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) + 31)/32 << FShft (MCCR0_TSD))
Div               681 arch/arm/mach-sa1100/include/mach/SA-1100.h #define MCCR0_ExtClkDiv(Div)    	/*  External Clock Divisor [1..4]  */ \
Div               682 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 1) << FShft (MCCR0_ECP))
Div               774 arch/arm/mach-sa1100/include/mach/SA-1100.h #define SSCR0_SerClkDiv(Div)    	/*  Serial Clock Divisor [2..512]  */ \
Div               775 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 2)/2 << FShft (SSCR0_SCR))
Div               778 arch/arm/mach-sa1100/include/mach/SA-1100.h #define SSCR0_CeilSerClkDiv(Div)	/*  Ceil. of SerClkDiv [2..512]    */ \
Div               779 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 1)/2 << FShft (SSCR0_SCR))
Div              1754 arch/arm/mach-sa1100/include/mach/SA-1100.h #define LCCR3_PixClkDiv(Div)    	/*  Pixel Clock Divisor [6..514]   */ \
Div              1755 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 4)/2 << FShft (LCCR3_PCD))
Div              1758 arch/arm/mach-sa1100/include/mach/SA-1100.h #define LCCR3_CeilPixClkDiv(Div)	/*  Ceil. of PixClkDiv [6..514]    */ \
Div              1759 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 3)/2 << FShft (LCCR3_PCD))
Div              1764 arch/arm/mach-sa1100/include/mach/SA-1100.h #define LCCR3_ACBsDiv(Div)      	/*  AC Bias clock Divisor [2..512] */ \
Div              1765 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 2)/2 << FShft (LCCR3_ACB))
Div              1768 arch/arm/mach-sa1100/include/mach/SA-1100.h #define LCCR3_CeilACBsDiv(Div)  	/*  Ceil. of ACBsDiv [2..512]      */ \
Div              1769 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(((Div) - 1)/2 << FShft (LCCR3_ACB))
Div               325 drivers/media/dvb-frontends/tda18271c2dd.c 	u8  Div;
Div               329 drivers/media/dvb-frontends/tda18271c2dd.c 	if (!SearchMap3(m_Main_PLL_Map, freq, &PostDiv, &Div))
Div               332 drivers/media/dvb-frontends/tda18271c2dd.c 	OscFreq = (u64) freq * (u64) Div;
Div               348 drivers/media/dvb-frontends/tda18271c2dd.c 	u8 Div;
Div               352 drivers/media/dvb-frontends/tda18271c2dd.c 	if (!SearchMap3(m_Cal_PLL_Map, freq, &PostDiv, &Div))
Div               355 drivers/media/dvb-frontends/tda18271c2dd.c 	OscFreq = (u64)freq * (u64)Div;
Div              1062 drivers/media/dvb-frontends/tda18271c2dd.c 			u8 Div;
Div              1067 drivers/media/dvb-frontends/tda18271c2dd.c 			SearchMap3(m_Cal_PLL_Map, Frequency + IntermediateFrequency, &PostDiv, &Div);
Div              1430 drivers/media/tuners/mt2063.c static u32 MT2063_CalcLO1Mult(u32 *Div,
Div              1436 drivers/media/tuners/mt2063.c 	*Div = f_LO / f_Ref;
Div              1443 drivers/media/tuners/mt2063.c 	return (f_Ref * (*Div)) + MT2063_fLO_FractionalTerm(f_Ref, *FracN, 64);
Div              1461 drivers/media/tuners/mt2063.c static u32 MT2063_CalcLO2Mult(u32 *Div,
Div              1467 drivers/media/tuners/mt2063.c 	*Div = f_LO / f_Ref;
Div              1474 drivers/media/tuners/mt2063.c 	return (f_Ref * (*Div)) + MT2063_fLO_FractionalTerm(f_Ref, *FracN,