dlg_attr 578 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 585 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_H_BLANK_END, dlg_attr->refcyc_h_blank_end, dlg_attr 586 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DLG_V_BLANK_END, dlg_attr->dlg_vblank_end); dlg_attr 589 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); dlg_attr 592 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_HTOTAL, dlg_attr->refcyc_per_htotal); dlg_attr 595 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_X_AFTER_SCALER, dlg_attr->refcyc_x_after_scaler, dlg_attr 596 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_AFTER_SCALER, dlg_attr->dst_y_after_scaler); dlg_attr 599 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REF_FREQ_TO_PIX_FREQ, dlg_attr->ref_freq_to_pix_freq); dlg_attr 603 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_PTE_GROUP_VBLANK_L, dlg_attr->refcyc_per_pte_group_vblank_l); dlg_attr 607 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_PTE_ROW_NOM_L, dlg_attr->dst_y_per_pte_row_nom_l); dlg_attr 611 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_PTE_GROUP_NOM_L, dlg_attr->refcyc_per_pte_group_nom_l); dlg_attr 614 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_META_ROW_NOM_L, dlg_attr->dst_y_per_meta_row_nom_l); dlg_attr 617 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_META_CHUNK_NOM_L, dlg_attr->refcyc_per_meta_chunk_nom_l); dlg_attr 620 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_L, dlg_attr->refcyc_per_line_delivery_l, dlg_attr 621 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_C, dlg_attr->refcyc_per_line_delivery_c); dlg_attr 624 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_PTE_GROUP_VBLANK_C, dlg_attr->refcyc_per_pte_group_vblank_c); dlg_attr 628 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_PTE_ROW_NOM_C, dlg_attr->dst_y_per_pte_row_nom_c); dlg_attr 632 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_PTE_GROUP_NOM_C, dlg_attr->refcyc_per_pte_group_nom_c); dlg_attr 635 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_META_ROW_NOM_C, dlg_attr->dst_y_per_meta_row_nom_c); dlg_attr 638 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_META_CHUNK_NOM_C, dlg_attr->refcyc_per_meta_chunk_nom_c); dlg_attr 666 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 675 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c hubp1_program_deadline(hubp, dlg_attr, ttu_attr); dlg_attr 681 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 687 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PREFETCH, dlg_attr->dst_y_prefetch, dlg_attr 688 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c VRATIO_PREFETCH, dlg_attr->vratio_prefetch); dlg_attr 691 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c VRATIO_PREFETCH_C, dlg_attr->vratio_prefetch_c); dlg_attr 694 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_VM_VBLANK, dlg_attr->dst_y_per_vm_vblank, dlg_attr 695 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_ROW_VBLANK, dlg_attr->dst_y_per_row_vblank); dlg_attr 698 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_META_CHUNK_VBLANK_L, dlg_attr->refcyc_per_meta_chunk_vblank_l); dlg_attr 701 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_META_CHUNK_VBLANK_C, dlg_attr->refcyc_per_meta_chunk_vblank_c); dlg_attr 704 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_L, dlg_attr->refcyc_per_line_delivery_pre_l, dlg_attr 705 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_C, dlg_attr->refcyc_per_line_delivery_pre_c); dlg_attr 850 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr = &s->dlg_attr; dlg_attr 865 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_H_BLANK_END, &dlg_attr->refcyc_h_blank_end, dlg_attr 866 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DLG_V_BLANK_END, &dlg_attr->dlg_vblank_end); dlg_attr 869 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); dlg_attr 872 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_HTOTAL, &dlg_attr->refcyc_per_htotal); dlg_attr 875 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_X_AFTER_SCALER, &dlg_attr->refcyc_x_after_scaler, dlg_attr 876 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_AFTER_SCALER, &dlg_attr->dst_y_after_scaler); dlg_attr 880 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PREFETCH, &dlg_attr->dst_y_prefetch, dlg_attr 881 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c VRATIO_PREFETCH, &dlg_attr->vratio_prefetch); dlg_attr 884 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PREFETCH, &dlg_attr->dst_y_prefetch, dlg_attr 885 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c VRATIO_PREFETCH, &dlg_attr->vratio_prefetch); dlg_attr 888 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_VM_VBLANK, &dlg_attr->dst_y_per_vm_vblank, dlg_attr 889 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_ROW_VBLANK, &dlg_attr->dst_y_per_row_vblank); dlg_attr 892 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REF_FREQ_TO_PIX_FREQ, &dlg_attr->ref_freq_to_pix_freq); dlg_attr 896 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_PTE_GROUP_VBLANK_L, &dlg_attr->refcyc_per_pte_group_vblank_l); dlg_attr 899 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_META_CHUNK_VBLANK_L, &dlg_attr->refcyc_per_meta_chunk_vblank_l); dlg_attr 903 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_PTE_ROW_NOM_L, &dlg_attr->dst_y_per_pte_row_nom_l); dlg_attr 907 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_PTE_GROUP_NOM_L, &dlg_attr->refcyc_per_pte_group_nom_l); dlg_attr 910 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_META_ROW_NOM_L, &dlg_attr->dst_y_per_meta_row_nom_l); dlg_attr 913 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_META_CHUNK_NOM_L, &dlg_attr->refcyc_per_meta_chunk_nom_l); dlg_attr 916 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_L, &dlg_attr->refcyc_per_line_delivery_pre_l, dlg_attr 917 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_C, &dlg_attr->refcyc_per_line_delivery_pre_c); dlg_attr 920 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_L, &dlg_attr->refcyc_per_line_delivery_l, dlg_attr 921 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_LINE_DELIVERY_C, &dlg_attr->refcyc_per_line_delivery_c); dlg_attr 925 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c VRATIO_PREFETCH_C, &dlg_attr->vratio_prefetch_c); dlg_attr 928 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c VRATIO_PREFETCH_C, &dlg_attr->vratio_prefetch_c); dlg_attr 931 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_PTE_GROUP_VBLANK_C, &dlg_attr->refcyc_per_pte_group_vblank_c); dlg_attr 934 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_META_CHUNK_VBLANK_C, &dlg_attr->refcyc_per_meta_chunk_vblank_c); dlg_attr 938 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_PTE_ROW_NOM_C, &dlg_attr->dst_y_per_pte_row_nom_c); dlg_attr 942 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_PTE_GROUP_NOM_C, &dlg_attr->refcyc_per_pte_group_nom_c); dlg_attr 945 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c DST_Y_PER_META_ROW_NOM_C, &dlg_attr->dst_y_per_meta_row_nom_c); dlg_attr 948 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REFCYC_PER_META_CHUNK_NOM_C, &dlg_attr->refcyc_per_meta_chunk_nom_c); dlg_attr 632 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h struct _vcs_dpi_display_dlg_regs_st dlg_attr; dlg_attr 672 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 194 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c struct _vcs_dpi_display_dlg_regs_st *dlg_regs = &s->dlg_attr; dlg_attr 250 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c struct _vcs_dpi_display_dlg_regs_st *dlg_regs = &s->dlg_attr; dlg_attr 79 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 86 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_H_BLANK_END, dlg_attr->refcyc_h_blank_end, dlg_attr 87 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DLG_V_BLANK_END, dlg_attr->dlg_vblank_end); dlg_attr 90 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); dlg_attr 93 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_HTOTAL, dlg_attr->refcyc_per_htotal); dlg_attr 96 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_X_AFTER_SCALER, dlg_attr->refcyc_x_after_scaler, dlg_attr 97 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_AFTER_SCALER, dlg_attr->dst_y_after_scaler); dlg_attr 100 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REF_FREQ_TO_PIX_FREQ, dlg_attr->ref_freq_to_pix_freq); dlg_attr 104 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_PTE_GROUP_VBLANK_L, dlg_attr->refcyc_per_pte_group_vblank_l); dlg_attr 108 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_PTE_ROW_NOM_L, dlg_attr->dst_y_per_pte_row_nom_l); dlg_attr 112 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_PTE_GROUP_NOM_L, dlg_attr->refcyc_per_pte_group_nom_l); dlg_attr 115 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_META_ROW_NOM_L, dlg_attr->dst_y_per_meta_row_nom_l); dlg_attr 118 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_NOM_L, dlg_attr->refcyc_per_meta_chunk_nom_l); dlg_attr 121 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_L, dlg_attr->refcyc_per_line_delivery_l, dlg_attr 122 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_C, dlg_attr->refcyc_per_line_delivery_c); dlg_attr 125 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_PTE_GROUP_VBLANK_C, dlg_attr->refcyc_per_pte_group_vblank_c); dlg_attr 129 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_PTE_ROW_NOM_C, dlg_attr->dst_y_per_pte_row_nom_c); dlg_attr 133 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_PTE_GROUP_NOM_C, dlg_attr->refcyc_per_pte_group_nom_c); dlg_attr 136 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_META_ROW_NOM_C, dlg_attr->dst_y_per_meta_row_nom_c); dlg_attr 139 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_NOM_C, dlg_attr->refcyc_per_meta_chunk_nom_c); dlg_attr 165 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_PTE_GROUP_FLIP_L, dlg_attr->refcyc_per_pte_group_flip_l); dlg_attr 225 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 236 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c hubp2_program_deadline(hubp, dlg_attr, ttu_attr); dlg_attr 242 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 248 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PREFETCH, dlg_attr->dst_y_prefetch, dlg_attr 249 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c VRATIO_PREFETCH, dlg_attr->vratio_prefetch); dlg_attr 252 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c VRATIO_PREFETCH_C, dlg_attr->vratio_prefetch_c); dlg_attr 255 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_VM_VBLANK, dlg_attr->dst_y_per_vm_vblank, dlg_attr 256 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_ROW_VBLANK, dlg_attr->dst_y_per_row_vblank); dlg_attr 259 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_VM_FLIP, dlg_attr->dst_y_per_vm_flip, dlg_attr 260 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_ROW_FLIP, dlg_attr->dst_y_per_row_flip); dlg_attr 263 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_VBLANK_L, dlg_attr->refcyc_per_meta_chunk_vblank_l); dlg_attr 266 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_VBLANK_C, dlg_attr->refcyc_per_meta_chunk_vblank_c); dlg_attr 269 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_FLIP_L, dlg_attr->refcyc_per_meta_chunk_flip_l); dlg_attr 272 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_L, dlg_attr->refcyc_per_line_delivery_pre_l, dlg_attr 273 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_C, dlg_attr->refcyc_per_line_delivery_pre_c); dlg_attr 1048 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr = &s->dlg_attr; dlg_attr 1063 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_H_BLANK_END, &dlg_attr->refcyc_h_blank_end, dlg_attr 1064 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DLG_V_BLANK_END, &dlg_attr->dlg_vblank_end); dlg_attr 1067 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); dlg_attr 1070 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_HTOTAL, &dlg_attr->refcyc_per_htotal); dlg_attr 1073 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_X_AFTER_SCALER, &dlg_attr->refcyc_x_after_scaler, dlg_attr 1074 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_AFTER_SCALER, &dlg_attr->dst_y_after_scaler); dlg_attr 1078 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PREFETCH, &dlg_attr->dst_y_prefetch, dlg_attr 1079 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c VRATIO_PREFETCH, &dlg_attr->vratio_prefetch); dlg_attr 1082 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PREFETCH, &dlg_attr->dst_y_prefetch, dlg_attr 1083 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c VRATIO_PREFETCH, &dlg_attr->vratio_prefetch); dlg_attr 1086 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_VM_VBLANK, &dlg_attr->dst_y_per_vm_vblank, dlg_attr 1087 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_ROW_VBLANK, &dlg_attr->dst_y_per_row_vblank); dlg_attr 1090 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REF_FREQ_TO_PIX_FREQ, &dlg_attr->ref_freq_to_pix_freq); dlg_attr 1094 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_PTE_GROUP_VBLANK_L, &dlg_attr->refcyc_per_pte_group_vblank_l); dlg_attr 1097 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_VBLANK_L, &dlg_attr->refcyc_per_meta_chunk_vblank_l); dlg_attr 1101 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_PTE_ROW_NOM_L, &dlg_attr->dst_y_per_pte_row_nom_l); dlg_attr 1105 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_PTE_GROUP_NOM_L, &dlg_attr->refcyc_per_pte_group_nom_l); dlg_attr 1108 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_META_ROW_NOM_L, &dlg_attr->dst_y_per_meta_row_nom_l); dlg_attr 1111 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_NOM_L, &dlg_attr->refcyc_per_meta_chunk_nom_l); dlg_attr 1114 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_L, &dlg_attr->refcyc_per_line_delivery_pre_l, dlg_attr 1115 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_PRE_C, &dlg_attr->refcyc_per_line_delivery_pre_c); dlg_attr 1118 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_L, &dlg_attr->refcyc_per_line_delivery_l, dlg_attr 1119 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_LINE_DELIVERY_C, &dlg_attr->refcyc_per_line_delivery_c); dlg_attr 1123 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c VRATIO_PREFETCH_C, &dlg_attr->vratio_prefetch_c); dlg_attr 1126 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c VRATIO_PREFETCH_C, &dlg_attr->vratio_prefetch_c); dlg_attr 1129 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_PTE_GROUP_VBLANK_C, &dlg_attr->refcyc_per_pte_group_vblank_c); dlg_attr 1132 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_VBLANK_C, &dlg_attr->refcyc_per_meta_chunk_vblank_c); dlg_attr 1136 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_PTE_ROW_NOM_C, &dlg_attr->dst_y_per_pte_row_nom_c); dlg_attr 1140 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_PTE_GROUP_NOM_C, &dlg_attr->refcyc_per_pte_group_nom_c); dlg_attr 1143 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c DST_Y_PER_META_ROW_NOM_C, &dlg_attr->dst_y_per_meta_row_nom_c); dlg_attr 1146 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REFCYC_PER_META_CHUNK_NOM_C, &dlg_attr->refcyc_per_meta_chunk_nom_c); dlg_attr 242 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 281 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 73 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr) dlg_attr 79 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c if (cur_value > dlg_attr->refcyc_per_vm_group_vblank) dlg_attr 81 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c REFCYC_PER_VM_GROUP_VBLANK, dlg_attr->refcyc_per_vm_group_vblank); dlg_attr 86 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c if (cur_value > dlg_attr->refcyc_per_vm_req_vblank) dlg_attr 88 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c REFCYC_PER_VM_REQ_VBLANK, dlg_attr->refcyc_per_vm_req_vblank); dlg_attr 91 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c if (cur_value > dlg_attr->refcyc_per_vm_group_flip) dlg_attr 93 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c REFCYC_PER_VM_GROUP_FLIP, dlg_attr->refcyc_per_vm_group_flip); dlg_attr 96 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c if (cur_value > dlg_attr->refcyc_per_vm_req_flip) dlg_attr 98 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c REFCYC_PER_VM_REQ_FLIP, dlg_attr->refcyc_per_vm_req_flip); dlg_attr 101 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c REFCYC_PER_PTE_GROUP_FLIP_C, dlg_attr->refcyc_per_pte_group_flip_c); dlg_attr 103 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c REFCYC_PER_META_CHUNK_FLIP_C, dlg_attr->refcyc_per_meta_chunk_flip_c); dlg_attr 108 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 111 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c hubp2_program_deadline(hubp, dlg_attr, ttu_attr); dlg_attr 113 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c apply_DEDCN21_142_wa_for_hostvm_deadline(hubp, dlg_attr); dlg_attr 150 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c struct _vcs_dpi_display_dlg_regs_st *dlg_attr, dlg_attr 161 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c hubp21_program_deadline(hubp, dlg_attr, ttu_attr); dlg_attr 123 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.h struct _vcs_dpi_display_dlg_regs_st *dlg_attr); dlg_attr 127 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.h struct _vcs_dpi_display_dlg_regs_st *dlg_attr,