divsv             379 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 	u32 divsm = 0, divsv = 0;
divsv             412 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 			divsv |= P1 << 8;
divsv             415 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 			divsv |= P2 << 8;
divsv             436 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 			divsv |= P1;
divsv             447 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c 	clk_mask(hwsq, divs, divsm, divsv);