divn 826 drivers/clk/clk-stm32mp1.c u32 frac, divm, divn; divn 832 drivers/clk/clk-stm32mp1.c divn = ((reg >> DIVN_SHIFT) & DIVN_MASK) + 1; divn 833 drivers/clk/clk-stm32mp1.c rate = (u64)parent_rate * divn; divn 998 drivers/clk/tegra/clk-pll.c u32 divn = 0, divm = 0, divp = 0; divn 1002 drivers/clk/tegra/clk-pll.c divn = (val >> pll->params->div_nmp->divn_shift) & (divn_mask(pll)); divn 1006 drivers/clk/tegra/clk-pll.c rate *= divn; divn 206 drivers/media/dvb-frontends/si2165.c u8 divn = 56; /* 1..63 */ divn 217 drivers/media/dvb-frontends/si2165.c divn = 56; divn 222 drivers/media/dvb-frontends/si2165.c divn = 19; divn 237 drivers/media/dvb-frontends/si2165.c divn = 1624000000u * divr / (ref_freq_hz * 2u * divp); divn 243 drivers/media/dvb-frontends/si2165.c * 2u * divn * divp; divn 250 drivers/media/dvb-frontends/si2165.c buf[2] = (divn & 0x3f) | ((divp == 1) ? 0x40 : 0x00) | 0x80;