divmul            232 drivers/gpu/drm/amd/amdgpu/atom.c 			val = gctx->divmul[0];
divmul            235 drivers/gpu/drm/amd/amdgpu/atom.c 			val = gctx->divmul[1];
divmul            502 drivers/gpu/drm/amd/amdgpu/atom.c 			gctx->divmul[0] = val;
divmul            505 drivers/gpu/drm/amd/amdgpu/atom.c 			gctx->divmul[1] = val;
divmul            676 drivers/gpu/drm/amd/amdgpu/atom.c 		ctx->ctx->divmul[0] = dst / src;
divmul            677 drivers/gpu/drm/amd/amdgpu/atom.c 		ctx->ctx->divmul[1] = dst % src;
divmul            679 drivers/gpu/drm/amd/amdgpu/atom.c 		ctx->ctx->divmul[0] = 0;
divmul            680 drivers/gpu/drm/amd/amdgpu/atom.c 		ctx->ctx->divmul[1] = 0;
divmul            695 drivers/gpu/drm/amd/amdgpu/atom.c 		val64 |= ((uint64_t)ctx->ctx->divmul[1]) << 32;
divmul            697 drivers/gpu/drm/amd/amdgpu/atom.c 		ctx->ctx->divmul[0] = lower_32_bits(val64);
divmul            698 drivers/gpu/drm/amd/amdgpu/atom.c 		ctx->ctx->divmul[1] = upper_32_bits(val64);
divmul            700 drivers/gpu/drm/amd/amdgpu/atom.c 		ctx->ctx->divmul[0] = 0;
divmul            701 drivers/gpu/drm/amd/amdgpu/atom.c 		ctx->ctx->divmul[1] = 0;
divmul            805 drivers/gpu/drm/amd/amdgpu/atom.c 	ctx->ctx->divmul[0] = dst * src;
divmul            818 drivers/gpu/drm/amd/amdgpu/atom.c 	ctx->ctx->divmul[0] = lower_32_bits(val64);
divmul            819 drivers/gpu/drm/amd/amdgpu/atom.c 	ctx->ctx->divmul[1] = upper_32_bits(val64);
divmul           1276 drivers/gpu/drm/amd/amdgpu/atom.c 	ctx->divmul[0] = 0;
divmul           1277 drivers/gpu/drm/amd/amdgpu/atom.c 	ctx->divmul[1] = 0;
divmul            136 drivers/gpu/drm/amd/amdgpu/atom.h 	uint32_t divmul[2];
divmul            238 drivers/gpu/drm/radeon/atom.c 			val = gctx->divmul[0];
divmul            241 drivers/gpu/drm/radeon/atom.c 			val = gctx->divmul[1];
divmul            508 drivers/gpu/drm/radeon/atom.c 			gctx->divmul[0] = val;
divmul            511 drivers/gpu/drm/radeon/atom.c 			gctx->divmul[1] = val;
divmul            682 drivers/gpu/drm/radeon/atom.c 		ctx->ctx->divmul[0] = dst / src;
divmul            683 drivers/gpu/drm/radeon/atom.c 		ctx->ctx->divmul[1] = dst % src;
divmul            685 drivers/gpu/drm/radeon/atom.c 		ctx->ctx->divmul[0] = 0;
divmul            686 drivers/gpu/drm/radeon/atom.c 		ctx->ctx->divmul[1] = 0;
divmul            790 drivers/gpu/drm/radeon/atom.c 	ctx->ctx->divmul[0] = dst * src;
divmul           1233 drivers/gpu/drm/radeon/atom.c 	ctx->divmul[0] = 0;
divmul           1234 drivers/gpu/drm/radeon/atom.c 	ctx->divmul[1] = 0;
divmul            134 drivers/gpu/drm/radeon/atom.h 	uint32_t divmul[2];