divl 208 drivers/media/dvb-frontends/si2165.c u8 divl = 12; divl 245 drivers/media/dvb-frontends/si2165.c state->sys_clk = state->fvco_hz / (divl * 2u); divl 248 drivers/media/dvb-frontends/si2165.c buf[0] = divl; divl 255 drivers/media/dvb-frontends/si2165.c static int si2165_adjust_pll_divl(struct si2165_state *state, u8 divl) divl 257 drivers/media/dvb-frontends/si2165.c state->sys_clk = state->fvco_hz / (divl * 2u); divl 258 drivers/media/dvb-frontends/si2165.c return si2165_writereg8(state, REG_PLL_DIVL, divl);