divider_idx        30 drivers/mmc/host/cb710-mmc.c 	u32 divider_idx;
divider_idx        42 drivers/mmc/host/cb710-mmc.c 	for (divider_idx = 0; divider_idx < CB710_MAX_DIVIDER_IDX; ++divider_idx) {
divider_idx        43 drivers/mmc/host/cb710-mmc.c 		if (hz >= src_hz >> cb710_clock_divider_log2[divider_idx])
divider_idx        48 drivers/mmc/host/cb710-mmc.c 		divider_idx |= 0x8;
divider_idx        49 drivers/mmc/host/cb710-mmc.c 	else if (divider_idx == 0)
divider_idx        50 drivers/mmc/host/cb710-mmc.c 		divider_idx = 1;
divider_idx        52 drivers/mmc/host/cb710-mmc.c 	cb710_pci_update_config_reg(pdev, 0x40, ~0xF0000000, divider_idx << 28);
divider_idx        56 drivers/mmc/host/cb710-mmc.c 		src_hz >> cb710_clock_divider_log2[divider_idx & 7],
divider_idx        57 drivers/mmc/host/cb710-mmc.c 		hz, src_freq_idx, divider_idx & 7, divider_idx & 8);