div_val           139 drivers/clk/imx/clk-pll14xx.c 	u32 tmp, div_val;
div_val           172 drivers/clk/imx/clk-pll14xx.c 	div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) |
div_val           174 drivers/clk/imx/clk-pll14xx.c 	writel_relaxed(div_val, pll->base + 0x4);
div_val           205 drivers/clk/imx/clk-pll14xx.c 	u32 tmp, div_val;
div_val           237 drivers/clk/imx/clk-pll14xx.c 	div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) |
div_val           239 drivers/clk/imx/clk-pll14xx.c 	writel_relaxed(div_val, pll->base + 0x4);
div_val           134 drivers/clk/mmp/clk-mix.c static int _set_rate(struct mmp_clk_mix *mix, u32 mux_val, u32 div_val,
div_val           159 drivers/clk/mmp/clk-mix.c 		mux_div |= MMP_CLK_BITS_SET_VAL(div_val, width, shift);
div_val           280 drivers/clk/mmp/clk-mix.c 	u32 div_val, mux_val;
div_val           283 drivers/clk/mmp/clk-mix.c 	div_val = _get_div_val(mix, div);
div_val           286 drivers/clk/mmp/clk-mix.c 	return _set_rate(mix, mux_val, div_val, 1, 1);
div_val           353 drivers/clk/mmp/clk-mix.c 	u32 div_val, mux_val;
div_val           364 drivers/clk/mmp/clk-mix.c 			div_val = _get_div_val(mix, item->divisor);
div_val           370 drivers/clk/mmp/clk-mix.c 		div_val = 0;
div_val           373 drivers/clk/mmp/clk-mix.c 	return _set_rate(mix, mux_val, div_val, 1, div_val ? 1 : 0);
div_val            25 drivers/media/platform/s5p-cec/exynos_hdmi_cecctrl.c 	u32 div_ratio, div_val;
div_val            42 drivers/media/platform/s5p-cec/exynos_hdmi_cecctrl.c 	div_val = CEC_DIV_RATIO * 0.00005 - 1;
div_val            47 drivers/media/platform/s5p-cec/exynos_hdmi_cecctrl.c 	writeb(div_val, cec->reg + S5P_CEC_DIVISOR_0);