div_min 43 drivers/clk/renesas/r9a06g032-clocks.c unsigned int div_min : 10, div_max : 10, reg: 10; div_min 82 drivers/clk/renesas/r9a06g032-clocks.c .reg = _reg, .div_min = _min, .div_max = _max, \ div_min 694 drivers/clk/renesas/r9a06g032-clocks.c div->min = desc->div_min; div_min 161 drivers/sh/clk/core.c long clk_rate_div_range_round(struct clk *clk, unsigned int div_min, div_min 165 drivers/sh/clk/core.c .min = div_min, div_min 111 include/linux/sh_clk.h long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,