div_core_mask      94 drivers/clk/rockchip/clk-cpu.c 	clksel0 &= reg_data->div_core_mask;
div_core_mask     149 drivers/clk/rockchip/clk-cpu.c 		if (alt_div > reg_data->div_core_mask) {
div_core_mask     151 drivers/clk/rockchip/clk-cpu.c 				__func__, alt_div, reg_data->div_core_mask);
div_core_mask     152 drivers/clk/rockchip/clk-cpu.c 			alt_div = reg_data->div_core_mask;
div_core_mask     165 drivers/clk/rockchip/clk-cpu.c 		writel(HIWORD_UPDATE(alt_div, reg_data->div_core_mask,
div_core_mask     209 drivers/clk/rockchip/clk-cpu.c 	writel(HIWORD_UPDATE(0, reg_data->div_core_mask,
div_core_mask     129 drivers/clk/rockchip/clk-px30.c 	.div_core_mask = 0xf,
div_core_mask     107 drivers/clk/rockchip/clk-rk3036.c 	.div_core_mask = 0x1f,
div_core_mask     122 drivers/clk/rockchip/clk-rk3128.c 	.div_core_mask = 0x1f,
div_core_mask     150 drivers/clk/rockchip/clk-rk3188.c 	.div_core_mask = 0x1f,
div_core_mask     189 drivers/clk/rockchip/clk-rk3188.c 	.div_core_mask = 0x1f,
div_core_mask     124 drivers/clk/rockchip/clk-rk3228.c 	.div_core_mask = 0x1f,
div_core_mask     179 drivers/clk/rockchip/clk-rk3288.c 	.div_core_mask = 0x1f,
div_core_mask     114 drivers/clk/rockchip/clk-rk3308.c 	.div_core_mask = 0xf,
div_core_mask     135 drivers/clk/rockchip/clk-rk3328.c 	.div_core_mask = 0x1f,
div_core_mask     159 drivers/clk/rockchip/clk-rk3368.c 	.div_core_mask = 0x1f,
div_core_mask     171 drivers/clk/rockchip/clk-rk3368.c 	.div_core_mask = 0x1f,
div_core_mask     294 drivers/clk/rockchip/clk-rk3399.c 	.div_core_mask = 0x1f,
div_core_mask     304 drivers/clk/rockchip/clk-rk3399.c 	.div_core_mask = 0x1f,
div_core_mask     111 drivers/clk/rockchip/clk-rv1108.c 	.div_core_mask = 0x1f,
div_core_mask     344 drivers/clk/rockchip/clk.h 	u32		div_core_mask;