div_clks 326 drivers/clk/samsung/clk-exynos3250.c static const struct samsung_div_clock div_clks[] __initconst = { div_clks 777 drivers/clk/samsung/clk-exynos3250.c .div_clks = div_clks, div_clks 778 drivers/clk/samsung/clk-exynos3250.c .nr_div_clks = ARRAY_SIZE(div_clks), div_clks 922 drivers/clk/samsung/clk-exynos3250.c .div_clks = dmc_div_clks, div_clks 1064 drivers/clk/samsung/clk-exynos3250.c .div_clks = isp_div_clks, div_clks 109 drivers/clk/samsung/clk-exynos5-subcmu.c samsung_clk_register_div(ctx, info->div_clks, info->nr_div_clks); div_clks 14 drivers/clk/samsung/clk-exynos5-subcmu.h const struct samsung_div_clock *div_clks; div_clks 134 drivers/clk/samsung/clk-exynos5260.c .div_clks = aud_div_clks, div_clks 324 drivers/clk/samsung/clk-exynos5260.c .div_clks = disp_div_clks, div_clks 390 drivers/clk/samsung/clk-exynos5260.c .div_clks = egl_div_clks, div_clks 579 drivers/clk/samsung/clk-exynos5260.c .div_clks = g2d_div_clks, div_clks 642 drivers/clk/samsung/clk-exynos5260.c .div_clks = g3d_div_clks, div_clks 775 drivers/clk/samsung/clk-exynos5260.c .div_clks = gscl_div_clks, div_clks 894 drivers/clk/samsung/clk-exynos5260.c .div_clks = isp_div_clks, div_clks 960 drivers/clk/samsung/clk-exynos5260.c .div_clks = kfc_div_clks, div_clks 1014 drivers/clk/samsung/clk-exynos5260.c .div_clks = mfc_div_clks, div_clks 1163 drivers/clk/samsung/clk-exynos5260.c .div_clks = mif_div_clks, div_clks 1369 drivers/clk/samsung/clk-exynos5260.c .div_clks = peri_div_clks, div_clks 1823 drivers/clk/samsung/clk-exynos5260.c .div_clks = top_div_clks, div_clks 259 drivers/clk/samsung/clk-exynos5410.c .div_clks = exynos5410_div_clks, div_clks 1320 drivers/clk/samsung/clk-exynos5420.c .div_clks = exynos5x_disp_div_clks, div_clks 1330 drivers/clk/samsung/clk-exynos5420.c .div_clks = exynos5x_gsc_div_clks, div_clks 1348 drivers/clk/samsung/clk-exynos5420.c .div_clks = exynos5x_mfc_div_clks, div_clks 1358 drivers/clk/samsung/clk-exynos5420.c .div_clks = exynos5x_mscl_div_clks, div_clks 793 drivers/clk/samsung/clk-exynos5433.c .div_clks = top_div_clks, div_clks 876 drivers/clk/samsung/clk-exynos5433.c .div_clks = cpif_div_clks, div_clks 1528 drivers/clk/samsung/clk-exynos5433.c .div_clks = mif_div_clks, div_clks 1728 drivers/clk/samsung/clk-exynos5433.c .div_clks = peric_div_clks, div_clks 2457 drivers/clk/samsung/clk-exynos5433.c .div_clks = g2d_div_clks, div_clks 2881 drivers/clk/samsung/clk-exynos5433.c .div_clks = disp_div_clks, div_clks 3053 drivers/clk/samsung/clk-exynos5433.c .div_clks = aud_div_clks, div_clks 3187 drivers/clk/samsung/clk-exynos5433.c .div_clks = bus##id##_div_clks, \ div_clks 3338 drivers/clk/samsung/clk-exynos5433.c .div_clks = g3d_div_clks, div_clks 4128 drivers/clk/samsung/clk-exynos5433.c .div_clks = mscl_div_clks, div_clks 4236 drivers/clk/samsung/clk-exynos5433.c .div_clks = mfc_div_clks, div_clks 4346 drivers/clk/samsung/clk-exynos5433.c .div_clks = hevc_div_clks, div_clks 4599 drivers/clk/samsung/clk-exynos5433.c .div_clks = isp_div_clks, div_clks 5079 drivers/clk/samsung/clk-exynos5433.c .div_clks = cam0_div_clks, div_clks 5454 drivers/clk/samsung/clk-exynos5433.c .div_clks = cam1_div_clks, div_clks 5637 drivers/clk/samsung/clk-exynos5433.c if (info->div_clks) div_clks 5638 drivers/clk/samsung/clk-exynos5433.c samsung_clk_register_div(ctx, info->div_clks, div_clks 191 drivers/clk/samsung/clk-exynos7.c .div_clks = topc_div_clks, div_clks 383 drivers/clk/samsung/clk-exynos7.c .div_clks = top0_div_clks, div_clks 560 drivers/clk/samsung/clk-exynos7.c .div_clks = top1_div_clks, div_clks 1094 drivers/clk/samsung/clk-exynos7.c .div_clks = fsys1_div_clks, div_clks 1207 drivers/clk/samsung/clk-exynos7.c .div_clks = mscl_div_clks, div_clks 1296 drivers/clk/samsung/clk-exynos7.c .div_clks = aud_div_clks, div_clks 477 drivers/clk/samsung/clk-s5pv210.c static const struct samsung_div_clock div_clks[] __initconst = { div_clks 775 drivers/clk/samsung/clk-s5pv210.c samsung_clk_register_div(ctx, div_clks, ARRAY_SIZE(div_clks)); div_clks 371 drivers/clk/samsung/clk.c if (cmu->div_clks) div_clks 372 drivers/clk/samsung/clk.c samsung_clk_register_div(ctx, cmu->div_clks, cmu->nr_div_clks); div_clks 291 drivers/clk/samsung/clk.h const struct samsung_div_clock *div_clks; div_clks 835 drivers/clk/tegra/clk-tegra-periph.c static struct tegra_periph_init_data div_clks[] = { div_clks 931 drivers/clk/tegra/clk-tegra-periph.c for (i = 0; i < ARRAY_SIZE(div_clks); i++) { div_clks 934 drivers/clk/tegra/clk-tegra-periph.c data = div_clks + i;