div82 1184 drivers/gpu/drm/tegra/hdmi.c unsigned int pulse_start, div82; div82 1259 drivers/gpu/drm/tegra/hdmi.c div82 = clk_get_rate(hdmi->clk) / 1000000 * 4; div82 1260 drivers/gpu/drm/tegra/hdmi.c value = SOR_REFCLK_DIV_INT(div82 >> 2) | SOR_REFCLK_DIV_FRAC(div82);