div1_value        360 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	u32 div1_value = 0;
div1_value        372 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	div1_value = DIV_ROUND_CLOSEST(ddr_clk, 20000);
div1_value        375 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	if (div1_value <= 10)
div1_value        376 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 		txesc1_div = div1_value;
div1_value        377 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	else if ((div1_value > 10) && (div1_value <= 20))
div1_value        378 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 		txesc1_div = DIV_ROUND_UP(div1_value, 2);
div1_value        379 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	else if ((div1_value > 20) && (div1_value <= 30))
div1_value        380 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 		txesc1_div = DIV_ROUND_UP(div1_value, 4);
div1_value        381 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	else if ((div1_value > 30) && (div1_value <= 40))
div1_value        382 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 		txesc1_div = DIV_ROUND_UP(div1_value, 6);
div1_value        383 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	else if ((div1_value > 40) && (div1_value <= 50))
div1_value        384 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 		txesc1_div = DIV_ROUND_UP(div1_value, 8);
div1_value        389 drivers/gpu/drm/i915/display/vlv_dsi_pll.c 	div2_value = DIV_ROUND_UP(div1_value, txesc1_div);