div 1247 arch/arm/common/sa1111.c unsigned int div; div 1252 arch/arm/common/sa1111.c div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; div 1253 arch/arm/common/sa1111.c if (div == 0) div 1254 arch/arm/common/sa1111.c div = 1; div 1255 arch/arm/common/sa1111.c if (div > 128) div 1256 arch/arm/common/sa1111.c div = 128; div 1258 arch/arm/common/sa1111.c writel_relaxed(div - 1, sachip->base + SA1111_SKAUD); div 1271 arch/arm/common/sa1111.c unsigned long div; div 1276 arch/arm/common/sa1111.c div = readl_relaxed(sachip->base + SA1111_SKAUD) + 1; div 1278 arch/arm/common/sa1111.c return __sa1111_pll_clock(sachip) / (256 * div); div 360 arch/arm/mach-ep93xx/clock.c int *psel, int *esel, int *pdiv, int *div) div 398 arch/arm/mach-ep93xx/clock.c *div = __div; div 417 arch/arm/mach-ep93xx/clock.c int err, psel = 0, esel = 0, pdiv = 0, div = 0; div 420 arch/arm/mach-ep93xx/clock.c err = calc_clk_div(clk, rate, &psel, &esel, &pdiv, &div); div 431 arch/arm/mach-ep93xx/clock.c (pdiv << EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | div; div 49 arch/arm/mach-omap1/clock.c u32 div = omap_readl(MOD_CONF_CTRL_1); div 51 arch/arm/mach-omap1/clock.c div = (div >> 17) & 0x7; div 52 arch/arm/mach-omap1/clock.c div++; div 54 arch/arm/mach-omap1/clock.c return clk->parent->rate / div; div 366 arch/arm/mach-omap1/clock.c int div; div 371 arch/arm/mach-omap1/clock.c div = (p_rate + rate - 1) / rate; div 372 arch/arm/mach-omap1/clock.c div--; div 373 arch/arm/mach-omap1/clock.c if (div < 0 || div > 7) div 378 arch/arm/mach-omap1/clock.c l |= div << 17; div 381 arch/arm/mach-omap1/clock.c clk->rate = p_rate / (div + 1); div 112 arch/arm/mach-omap2/clkt2xxx_dpllcore.c u32 cur_rate, low, mult, div, valid_rate, done_rate; div 142 arch/arm/mach-omap2/clkt2xxx_dpllcore.c div = ((curr_prcm_set->xtal_speed / 1000000) - 1); div 154 arch/arm/mach-omap2/clkt2xxx_dpllcore.c tmpset.cm_clksel1_pll |= (div << __ffs(dd->mult_mask)); div 82 arch/arm/mach-rpc/include/mach/acornfb.h u_int div; div 85 arch/arm/mach-rpc/include/mach/acornfb.h div = var->pixclock / 9090; /*9921*/ div 88 arch/arm/mach-rpc/include/mach/acornfb.h if (div == 0) div 89 arch/arm/mach-rpc/include/mach/acornfb.h div = 1; div 90 arch/arm/mach-rpc/include/mach/acornfb.h if (div > 8) div 91 arch/arm/mach-rpc/include/mach/acornfb.h div = 8; div 94 arch/arm/mach-rpc/include/mach/acornfb.h switch (div) { div 133 arch/arm/mach-rpc/include/mach/acornfb.h vidc->pll_ctl = acornfb_vidc20_find_pll(var->pixclock / div); div 104 arch/arm/mach-s3c24xx/iotiming-s3c2410.c unsigned int div = to_div(cyc, hclk_tns); div 108 arch/arm/mach-s3c24xx/iotiming-s3c2410.c __func__, cyc, hclk_tns, shift, div); div 110 arch/arm/mach-s3c24xx/iotiming-s3c2410.c switch (div) { div 152 arch/arm/mach-s3c24xx/iotiming-s3c2410.c unsigned int div = to_div(cyc, hclk_tns); div 156 arch/arm/mach-s3c24xx/iotiming-s3c2410.c __func__, cyc, nwait_en, hclk_tns, div); div 159 arch/arm/mach-s3c24xx/iotiming-s3c2410.c if (nwait_en && div < 4) div 160 arch/arm/mach-s3c24xx/iotiming-s3c2410.c div = 4; div 162 arch/arm/mach-s3c24xx/iotiming-s3c2410.c switch (div) { div 171 arch/arm/mach-s3c24xx/iotiming-s3c2410.c val = div - 1; div 495 arch/arm/mach-s3c24xx/mach-bast.c .div = 512, div 501 arch/arm/mach-s3c24xx/mach-bast.c .div = 1024, div 507 arch/arm/mach-s3c24xx/mach-bast.c .div = 512, div 513 arch/arm/mach-s3c24xx/mach-bast.c .div = 1024, div 181 arch/arm/mach-s3c64xx/mach-smartq.c .div = 2048, div 187 arch/arm/mach-s3c64xx/mach-smartq.c .div = 4096, div 90 arch/c6x/include/asm/clock.h u32 div; div 226 arch/c6x/platforms/pll.c if (!clk->div) { div 233 arch/c6x/platforms/pll.c rate /= clk->div; div 235 arch/c6x/platforms/pll.c clk->name, clk->div, rate / 1000); div 239 arch/c6x/platforms/pll.c v = pll_read(pll, clk->div); div 176 arch/c6x/platforms/plldata.c sysclks[2].div = 3; div 178 arch/c6x/platforms/plldata.c sysclks[3].div = 6; div 179 arch/c6x/platforms/plldata.c sysclks[4].div = PLLDIV4; div 180 arch/c6x/platforms/plldata.c sysclks[5].div = PLLDIV5; div 214 arch/c6x/platforms/plldata.c sysclks[1].div = 1; div 216 arch/c6x/platforms/plldata.c sysclks[2].div = 3; div 218 arch/c6x/platforms/plldata.c sysclks[3].div = 6; div 219 arch/c6x/platforms/plldata.c sysclks[4].div = PLLDIV4; div 220 arch/c6x/platforms/plldata.c sysclks[5].div = PLLDIV5; div 266 arch/c6x/platforms/plldata.c sysclks[i].div = 1; div 270 arch/c6x/platforms/plldata.c sysclks[7].div = 3; div 272 arch/c6x/platforms/plldata.c sysclks[8].div = 6; div 274 arch/c6x/platforms/plldata.c sysclks[9].div = 2; div 275 arch/c6x/platforms/plldata.c sysclks[10].div = PLLDIV10; div 313 arch/c6x/platforms/plldata.c sysclks[7].div = 1; div 315 arch/c6x/platforms/plldata.c sysclks[9].div = 3; div 317 arch/c6x/platforms/plldata.c sysclks[10].div = 6; div 319 arch/c6x/platforms/plldata.c sysclks[11].div = PLLDIV11; div 322 arch/c6x/platforms/plldata.c sysclks[12].div = 2; div 324 arch/c6x/platforms/plldata.c sysclks[13].div = PLLDIV13; div 362 arch/c6x/platforms/plldata.c sysclks[1].div = 1; div 364 arch/c6x/platforms/plldata.c sysclks[2].div = PLLDIV2; div 367 arch/c6x/platforms/plldata.c sysclks[3].div = 2; div 370 arch/c6x/platforms/plldata.c sysclks[4].div = 3; div 372 arch/c6x/platforms/plldata.c sysclks[5].div = PLLDIV5; div 375 arch/c6x/platforms/plldata.c sysclks[6].div = 64; div 378 arch/c6x/platforms/plldata.c sysclks[7].div = 6; div 380 arch/c6x/platforms/plldata.c sysclks[8].div = PLLDIV8; div 383 arch/c6x/platforms/plldata.c sysclks[9].div = 12; div 386 arch/c6x/platforms/plldata.c sysclks[10].div = 3; div 389 arch/c6x/platforms/plldata.c sysclks[11].div = 6; div 219 arch/m68k/atari/debug.c int clksrc, clkmode, div, reg3, reg5; div 229 arch/m68k/atari/debug.c div = div_table[baud]; div 236 arch/m68k/atari/debug.c div = 0; div 253 arch/m68k/atari/debug.c SCC_WRITE(12, div); /* BRG value */ div 256 arch/m68k/atari/debug.c SCC_WRITE(14, brgsrc_table[baud] | (div ? 1 : 0)); div 269 arch/m68k/atari/debug.c int div; div 276 arch/m68k/atari/debug.c div = ACIA_DIV64; /* really 7812.5 bps */ div 278 arch/m68k/atari/debug.c div = ACIA_DIV1; /* really 500 kbps (does that work??) */ div 280 arch/m68k/atari/debug.c div = ACIA_DIV16; /* 31250 bps, standard for MIDI */ div 283 arch/m68k/atari/debug.c acia.mid_ctrl = div | csize | parity | div 545 arch/m68k/coldfire/m53xx.c int clock_limp(int div) div 550 arch/m68k/coldfire/m53xx.c if (div < MIN_LPD) div 551 arch/m68k/coldfire/m53xx.c div = MIN_LPD; div 552 arch/m68k/coldfire/m53xx.c if (div > MAX_LPD) div 553 arch/m68k/coldfire/m53xx.c div = MAX_LPD; div 560 arch/m68k/coldfire/m53xx.c writew(MCF_CCM_CDR_LPDIV(div) | MCF_CCM_CDR_SSIDIV(temp), MCF_CCM_CDR); div 564 arch/m68k/coldfire/m53xx.c return (FREF/(3*(1 << div))); div 130 arch/m68k/math-emu/multi_arith.h #define fp_div64(quot, rem, srch, srcl, div) \ div 132 arch/m68k/math-emu/multi_arith.h : "dm" (div), "1" (srch), "0" (srcl)) div 181 arch/m68k/math-emu/multi_arith.h struct fp_ext *div) div 191 arch/m68k/math-emu/multi_arith.h if (src->mant.m64 >= div->mant.m64) { div 192 arch/m68k/math-emu/multi_arith.h fp_sub64(src->mant, div->mant); div 208 arch/m68k/math-emu/multi_arith.h dummy = div->mant.m32[1] / div->mant.m32[0] + 1; div 214 arch/m68k/math-emu/multi_arith.h if (src->mant.m32[0] == div->mant.m32[0]) { div 215 arch/m68k/math-emu/multi_arith.h fp_div64(first, rem, 0, src->mant.m32[1], div->mant.m32[0]); div 220 arch/m68k/math-emu/multi_arith.h fp_div64(first, rem, src->mant.m32[0], src->mant.m32[1], div->mant.m32[0]); div 225 arch/m68k/math-emu/multi_arith.h fp_mul64(tmp.m32[0], tmp.m32[1], div->mant.m32[0], first - *mantp); div 229 arch/m68k/math-emu/multi_arith.h fp_mul64(tmp64.m32[0], tmp64.m32[1], *mantp, div->mant.m32[1]); div 235 arch/m68k/math-emu/multi_arith.h while (!fp_sub96c(tmp, 0, div->mant.m32[0], div->mant.m32[1])) { div 299 arch/mips/alchemy/common/clock.c int div; div 305 arch/mips/alchemy/common/clock.c div = (v & (1 << 15)) ? 1 : 2; div 309 arch/mips/alchemy/common/clock.c div = (v & (1 << 31)) ? 1 : 2; div 315 arch/mips/alchemy/common/clock.c div = 2; div 320 arch/mips/alchemy/common/clock.c 0, 1, div); div 546 arch/mips/alchemy/common/clock.c unsigned long div, v, flags, ret; div 551 arch/mips/alchemy/common/clock.c ret = alchemy_calc_div(rate, parent_rate, 2, 512, &div); div 555 arch/mips/alchemy/common/clock.c v |= div << sh; div 668 arch/mips/alchemy/common/clock.c unsigned long div, v, flags, ret; div 675 arch/mips/alchemy/common/clock.c v ? 256 : 512, &div); div 680 arch/mips/alchemy/common/clock.c v |= (div & 0xff) << sh; div 71 arch/mips/ath79/clock.c unsigned int mult, unsigned int div) div 76 arch/mips/ath79/clock.c clk = clk_register_fixed_factor(NULL, name, parent, 0, mult, div); div 101 arch/mips/ath79/clock.c u32 div; div 107 arch/mips/ath79/clock.c div = ((pll >> AR71XX_PLL_FB_SHIFT) & AR71XX_PLL_FB_MASK) + 1; div 108 arch/mips/ath79/clock.c freq = div * ref_rate; div 110 arch/mips/ath79/clock.c div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1; div 111 arch/mips/ath79/clock.c cpu_rate = freq / div; div 113 arch/mips/ath79/clock.c div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1; div 114 arch/mips/ath79/clock.c ddr_rate = freq / div; div 116 arch/mips/ath79/clock.c div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2; div 117 arch/mips/ath79/clock.c ahb_rate = cpu_rate / div; div 126 arch/mips/ath79/clock.c u32 mult, div, ddr_div, ahb_div; div 134 arch/mips/ath79/clock.c div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK) * 2; div 139 arch/mips/ath79/clock.c ath79_set_ff_clk(ATH79_CLK_CPU, "ref", mult, div); div 140 arch/mips/ath79/clock.c ath79_set_ff_clk(ATH79_CLK_DDR, "ref", mult, div * ddr_div); div 141 arch/mips/ath79/clock.c ath79_set_ff_clk(ATH79_CLK_AHB, "ref", mult, div * ahb_div); div 58 arch/mips/cavium-octeon/octeon-platform.c u64 div; div 158 arch/mips/cavium-octeon/octeon-platform.c div = octeon_get_io_clock_rate() / 130000000ull; div 160 arch/mips/cavium-octeon/octeon-platform.c switch (div) { div 162 arch/mips/cavium-octeon/octeon-platform.c div = 1; div 170 arch/mips/cavium-octeon/octeon-platform.c div = 4; div 174 arch/mips/cavium-octeon/octeon-platform.c div = 6; div 180 arch/mips/cavium-octeon/octeon-platform.c div = 8; div 183 arch/mips/cavium-octeon/octeon-platform.c div = 12; div 186 arch/mips/cavium-octeon/octeon-platform.c clk_rst_ctl.s.h_div = div; div 290 arch/mips/cavium-octeon/octeon-usb.c u64 div; div 371 arch/mips/cavium-octeon/octeon-usb.c for (div = 0; div < OCTEON_H_CLKDIV_SEL; div++) { div 372 arch/mips/cavium-octeon/octeon-usb.c h_clk_rate = octeon_get_io_clock_rate() / clk_div[div]; div 378 arch/mips/cavium-octeon/octeon-usb.c uctl_ctl.s.h_clkdiv_sel = div; div 382 arch/mips/cavium-octeon/octeon-usb.c if ((div != uctl_ctl.s.h_clkdiv_sel) || (!uctl_ctl.s.h_clk_en)) { div 153 arch/mips/include/asm/octeon/cvmx-gpio-defs.h uint64_t div:1; div 157 arch/mips/include/asm/octeon/cvmx-gpio-defs.h uint64_t div:1; div 168 arch/mips/include/asm/octeon/cvmx-gpio-defs.h uint64_t div:1; div 172 arch/mips/include/asm/octeon/cvmx-gpio-defs.h uint64_t div:1; div 181 arch/mips/include/asm/octeon/cvmx-gpio-defs.h uint64_t div:1; div 185 arch/mips/include/asm/octeon/cvmx-gpio-defs.h uint64_t div:1; div 368 arch/mips/ralink/mt7620.c mt7620_calc_rate(u32 ref_rate, u32 mul, u32 div) div 374 arch/mips/ralink/mt7620.c do_div(t, div); div 412 arch/mips/ralink/mt7620.c u32 div; div 427 arch/mips/ralink/mt7620.c div = (reg >> CPLL_CFG0_PLL_DIV_RATIO_SHIFT) & div 430 arch/mips/ralink/mt7620.c WARN_ON(div >= ARRAY_SIZE(mt7620_clk_divider)); div 432 arch/mips/ralink/mt7620.c return mt7620_calc_rate(xtal_rate, mul, mt7620_clk_divider[div]); div 455 arch/mips/ralink/mt7620.c u32 div; div 460 arch/mips/ralink/mt7620.c div = (reg >> CPU_SYS_CLKCFG_CPU_FDIV_SHIFT) & div 463 arch/mips/ralink/mt7620.c return mt7620_calc_rate(pll_rate, mul, div); div 488 arch/mips/ralink/mt7620.c u32 div; div 498 arch/mips/ralink/mt7620.c div = mt7620_ocp_dividers[ocp_ratio]; div 499 arch/mips/ralink/mt7620.c if (WARN(!div, "invalid divider for OCP ratio %u", ocp_ratio)) div 502 arch/mips/ralink/mt7620.c return cpu_rate / div; div 24 arch/powerpc/boot/cuboot-52xx.c int div; div 47 arch/powerpc/boot/cuboot-52xx.c div = in_8(reg + 0x204) & 0x0020 ? 8 : 4; div 48 arch/powerpc/boot/cuboot-52xx.c sysfreq = bd.bi_busfreq * div; div 46 arch/powerpc/boot/cuboot-acadia.c unsigned long div; /* total divisor udiv * bdiv */ div 127 arch/powerpc/boot/cuboot-acadia.c div = plloutb / (16 * baud); /* total divisor */ div 136 arch/powerpc/boot/cuboot-acadia.c ibdiv = div / i; div 138 arch/powerpc/boot/cuboot-acadia.c idiff = (est > div) ? (est-div) : (div-est); div 225 arch/powerpc/platforms/512x/clock-commonclk.c int mul, int div) div 231 arch/powerpc/platforms/512x/clock-commonclk.c mul, div); div 366 arch/powerpc/platforms/512x/clock-commonclk.c { .val = 2, .div = 2, }, div 367 arch/powerpc/platforms/512x/clock-commonclk.c { .val = 3, .div = 3, }, div 368 arch/powerpc/platforms/512x/clock-commonclk.c { .val = 4, .div = 4, }, div 369 arch/powerpc/platforms/512x/clock-commonclk.c { .val = 6, .div = 6, }, div 370 arch/powerpc/platforms/512x/clock-commonclk.c { .div = 0, }, div 375 arch/powerpc/platforms/512x/clock-commonclk.c { .val = 1, .div = 1, }, div 376 arch/powerpc/platforms/512x/clock-commonclk.c { .val = 2, .div = 2, }, div 377 arch/powerpc/platforms/512x/clock-commonclk.c { .val = 3, .div = 3, }, div 378 arch/powerpc/platforms/512x/clock-commonclk.c { .val = 4, .div = 4, }, div 379 arch/powerpc/platforms/512x/clock-commonclk.c { .div = 0, }, div 599 arch/powerpc/platforms/512x/clock-commonclk.c int div; div 650 arch/powerpc/platforms/512x/clock-commonclk.c div = clk_get_rate(clks[MPC512x_CLK_SYS]); div 651 arch/powerpc/platforms/512x/clock-commonclk.c div /= clk_get_rate(clks[MPC512x_CLK_IPS]); div 653 arch/powerpc/platforms/512x/clock-commonclk.c out_be32(mccr_reg, (0 << 16) | ((div - 1) << 17)); div 654 arch/powerpc/platforms/512x/clock-commonclk.c out_be32(mccr_reg, (1 << 16) | ((div - 1) << 17)); div 707 arch/powerpc/platforms/512x/clock-commonclk.c int mul, div; div 779 arch/powerpc/platforms/512x/clock-commonclk.c div = 2; /* compensate for the fractional factor */ div 780 arch/powerpc/platforms/512x/clock-commonclk.c clks[MPC512x_CLK_E300] = mpc512x_clk_factor("e300", "csb", mul, div); div 390 arch/powerpc/sysdev/mpic_timer.c u32 div; div 407 arch/powerpc/sysdev/mpic_timer.c div = (1 << (MPIC_TIMER_TCR_CLKDIV >> 8)) * 8; div 408 arch/powerpc/sysdev/mpic_timer.c priv->timerfreq /= div; div 50 arch/s390/boot/als.c int div = 1; div 52 arch/s390/boot/als.c while (div * 10 <= val) div 53 arch/s390/boot/als.c div *= 10; div 54 arch/s390/boot/als.c while (div) { div 55 arch/s390/boot/als.c *str++ = '0' + val / div; div 56 arch/s390/boot/als.c val %= div; div 57 arch/s390/boot/als.c div /= 10; div 69 arch/s390/kernel/vtime.c u64 delta, fac, mult, div; div 75 arch/s390/kernel/vtime.c mult = div = 0; div 78 arch/s390/kernel/vtime.c div += delta; div 83 arch/s390/kernel/vtime.c div *= fac; div 84 arch/s390/kernel/vtime.c if (div > 0) { div 87 arch/s390/kernel/vtime.c __this_cpu_write(mt_scaling_div, div); div 107 arch/s390/kernel/vtime.c u64 div = __this_cpu_read(mt_scaling_div); div 110 arch/s390/kernel/vtime.c return vtime * mult / div; div 65 arch/sh/kernel/cpu/sh4a/clock-sh7366.c unsigned long div = 1; div 70 arch/sh/kernel/cpu/sh4a/clock-sh7366.c div = 2; div 72 arch/sh/kernel/cpu/sh4a/clock-sh7366.c return (clk->parent->rate * mult) / div; div 68 arch/sh/kernel/cpu/sh4a/clock-sh7722.c unsigned long div = 1; div 73 arch/sh/kernel/cpu/sh4a/clock-sh7722.c div = 2; div 75 arch/sh/kernel/cpu/sh4a/clock-sh7722.c return (clk->parent->rate * mult) / div; div 69 arch/sh/kernel/cpu/sh4a/clock-sh7723.c unsigned long div = 1; div 74 arch/sh/kernel/cpu/sh4a/clock-sh7723.c div = 2; div 76 arch/sh/kernel/cpu/sh4a/clock-sh7723.c return (clk->parent->rate * mult) / div; div 50 arch/sh/kernel/cpu/sh4a/clock-sh7724.c unsigned long div = 1; div 56 arch/sh/kernel/cpu/sh4a/clock-sh7724.c div = 2; div 58 arch/sh/kernel/cpu/sh4a/clock-sh7724.c return (clk->parent->rate * mult) / div; div 1115 arch/sparc/net/bpf_jit_comp_64.c unsigned int div; div 1120 arch/sparc/net/bpf_jit_comp_64.c div = (BPF_CLASS(code) == BPF_ALU64) ? UDIVX : DIV; div 1127 arch/sparc/net/bpf_jit_comp_64.c emit(div | IMMED | RS1(dst) | S13(imm) | RD(tmp), ctx); div 1136 arch/sparc/net/bpf_jit_comp_64.c emit(div | RS1(dst) | RS2(tmp1) | RD(tmp), ctx); div 99 arch/unicore32/kernel/clock.c unsigned long div; div 101 arch/unicore32/kernel/clock.c {.rate = 25175000, .cfg = 0x00002001, .div = 0x9}, div 102 arch/unicore32/kernel/clock.c {.rate = 31500000, .cfg = 0x00002001, .div = 0x7}, div 103 arch/unicore32/kernel/clock.c {.rate = 40000000, .cfg = 0x00003801, .div = 0x9}, div 104 arch/unicore32/kernel/clock.c {.rate = 49500000, .cfg = 0x00003801, .div = 0x7}, div 105 arch/unicore32/kernel/clock.c {.rate = 65000000, .cfg = 0x00002c01, .div = 0x4}, div 106 arch/unicore32/kernel/clock.c {.rate = 78750000, .cfg = 0x00002400, .div = 0x7}, div 107 arch/unicore32/kernel/clock.c {.rate = 108000000, .cfg = 0x00002c01, .div = 0x2}, div 108 arch/unicore32/kernel/clock.c {.rate = 106500000, .cfg = 0x00003c01, .div = 0x3}, div 109 arch/unicore32/kernel/clock.c {.rate = 50650000, .cfg = 0x00106400, .div = 0x9}, div 110 arch/unicore32/kernel/clock.c {.rate = 61500000, .cfg = 0x00106400, .div = 0xa}, div 111 arch/unicore32/kernel/clock.c {.rate = 85500000, .cfg = 0x00002800, .div = 0x6}, div 144 arch/unicore32/kernel/clock.c pll_vgadiv = vga_clk_table[i].div; div 77 arch/x86/include/asm/div64.h static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 div) div 82 arch/x86/include/asm/div64.h : "a" (a), "rm" ((u64)mul), "rm" ((u64)div) div 1002 arch/x86/kvm/emulate.c FASTOP1SRC2EX(div, div_ex); div 18 arch/x86/realmode/rm/wakemain.c u16 div = 1193181/hz; div 22 arch/x86/realmode/rm/wakemain.c outb(div, 0x42); /* LSB of counter */ div 24 arch/x86/realmode/rm/wakemain.c outb(div >> 8, 0x42); /* MSB of counter */ div 535 crypto/testmgr.c const struct test_sg_division *div; div 555 crypto/testmgr.c partitions[tsgl->nents].div = &divs[i]; div 562 crypto/testmgr.c partitions[tsgl->nents].div = &divs[0]; div 571 crypto/testmgr.c unsigned int offset = partitions[i].div->offset; div 574 crypto/testmgr.c if (partitions[i].div->offset_relative_to_alignmask) div 588 crypto/testmgr.c out_divs[i] = partitions[i].div; div 833 crypto/testmgr.c struct test_sg_division *div = divs; div 840 crypto/testmgr.c if (div == &divs[max_divs - 1] || prandom_u32() % 2 == 0) div 844 crypto/testmgr.c div->proportion_of_total = this_len; div 847 crypto/testmgr.c div->offset = (PAGE_SIZE - 128) + (prandom_u32() % 128); div 849 crypto/testmgr.c div->offset = prandom_u32() % 32; div 851 crypto/testmgr.c div->offset = prandom_u32() % PAGE_SIZE; div 853 crypto/testmgr.c div->offset_relative_to_alignmask = true; div 855 crypto/testmgr.c div->flush_type = FLUSH_TYPE_NONE; div 859 crypto/testmgr.c div->flush_type = FLUSH_TYPE_REIMPORT; div 862 crypto/testmgr.c div->flush_type = FLUSH_TYPE_FLUSH; div 867 crypto/testmgr.c if (div->flush_type != FLUSH_TYPE_NONE && div 870 crypto/testmgr.c div->nosimd = true; div 872 crypto/testmgr.c switch (div->flush_type) { div 874 crypto/testmgr.c if (div->nosimd) div 880 crypto/testmgr.c if (div->nosimd) div 893 crypto/testmgr.c div->offset_relative_to_alignmask ? div 895 crypto/testmgr.c div->offset, this_len == remaining ? "" : ", "); div 897 crypto/testmgr.c div++; div 136 drivers/ata/pata_octeon_cf.c unsigned int div; div 148 drivers/ata/pata_octeon_cf.c div = 4; div 150 drivers/ata/pata_octeon_cf.c div = 8; div 151 drivers/ata/pata_octeon_cf.c T = (int)((1000000000000LL * div) / octeon_get_io_clock_rate()); div 159 drivers/ata/pata_octeon_cf.c trh = ns_to_tim_reg(div, 20); div 170 drivers/ata/pata_octeon_cf.c octeon_cf_set_boot_reg_cfg(cf_port->cs0, div); div 173 drivers/ata/pata_octeon_cf.c octeon_cf_set_boot_reg_cfg(cf_port->cs1, div); div 202 drivers/ata/pata_octeon_cf.c reg_tim.s.ce = ns_to_tim_reg(div, 5); div 1261 drivers/atm/eni.c int div; div 1265 drivers/atm/eni.c div = pre_div[*pre]**pcr; div 1266 drivers/atm/eni.c DPRINTK("min div %d\n",div); div 1267 drivers/atm/eni.c *res = TS_CLOCK/div-1; div 1270 drivers/atm/eni.c int div; div 1276 drivers/atm/eni.c div = pre_div[*pre]*-*pcr; div 1277 drivers/atm/eni.c DPRINTK("max div %d\n",div); div 1278 drivers/atm/eni.c *res = DIV_ROUND_UP(TS_CLOCK, div)-1; div 578 drivers/atm/horizon.c u32 div = CR_MIND; div 609 drivers/atm/horizon.c pre = DIV_ROUND_UP(br, c<<div); div 615 drivers/atm/horizon.c pre = DIV_ROUND_CLOSEST(br, c<<div); div 621 drivers/atm/horizon.c pre = br/(c<<div); div 626 drivers/atm/horizon.c PRINTD (DBG_QOS, "A: p=%u, d=%u", pre, div); div 632 drivers/atm/horizon.c while (div < CR_MAXD) { div 633 drivers/atm/horizon.c div++; div 634 drivers/atm/horizon.c if (br_man <= (c << (CR_MAXPEXP+div-br_exp))) { div 642 drivers/atm/horizon.c pre = DIV_ROUND_UP(br, c<<div); div 645 drivers/atm/horizon.c pre = DIV_ROUND_CLOSEST(br, c<<div); div 648 drivers/atm/horizon.c pre = br/(c<<div); div 650 drivers/atm/horizon.c PRINTD (DBG_QOS, "B: p=%u, d=%u", pre, div); div 661 drivers/atm/horizon.c PRINTD (DBG_QOS, "C: p=%u, d=%u", pre, div); div 664 drivers/atm/horizon.c if (div > CR_MAXD || (!pre) || pre > 1<<CR_MAXPEXP) { div 666 drivers/atm/horizon.c div, pre); div 670 drivers/atm/horizon.c *bits = (div<<CLOCK_SELECT_SHIFT) | (pre-1); div 672 drivers/atm/horizon.c *actual = DIV_ROUND_UP(br, pre<<div); div 351 drivers/bcma/driver_chipcommon_pmu.c u32 tmp, div, ndiv, p1, p2, fc; div 371 drivers/bcma/driver_chipcommon_pmu.c div = (tmp >> ((m - 1) * BCMA_CC_PPL_MDIV_WIDTH)) & div 382 drivers/bcma/driver_chipcommon_pmu.c return (fc / div) * 1000000; div 86 drivers/clk/actions/owl-composite.h .rate.fix_fact_hw.div = _div, \ div 29 drivers/clk/actions/owl-divider.c struct owl_divider *div = hw_to_owl_divider(hw); div 31 drivers/clk/actions/owl-divider.c return owl_divider_helper_round_rate(&div->common, &div->div_hw, div 55 drivers/clk/actions/owl-divider.c struct owl_divider *div = hw_to_owl_divider(hw); div 57 drivers/clk/actions/owl-divider.c return owl_divider_helper_recalc_rate(&div->common, div 58 drivers/clk/actions/owl-divider.c &div->div_hw, parent_rate); div 84 drivers/clk/actions/owl-divider.c struct owl_divider *div = hw_to_owl_divider(hw); div 86 drivers/clk/actions/owl-divider.c return owl_divider_helper_set_rate(&div->common, &div->div_hw, div 22 drivers/clk/actions/owl-factor.c for (clkt = table; clkt->div; clkt++) div 29 drivers/clk/actions/owl-factor.c unsigned int val, unsigned int *mul, unsigned int *div) div 33 drivers/clk/actions/owl-factor.c for (clkt = table; clkt->div; clkt++) { div 36 drivers/clk/actions/owl-factor.c *div = clkt->div; div 51 drivers/clk/actions/owl-factor.c for (clkt = table; clkt->div; clkt++) { div 53 drivers/clk/actions/owl-factor.c do_div(calc_rate, clkt->div); div 85 drivers/clk/actions/owl-factor.c for (clkt = factor_hw->table; clkt->div; clkt++) { div 86 drivers/clk/actions/owl-factor.c try_parent_rate = rate * clkt->div / clkt->mul; div 90 drivers/clk/actions/owl-factor.c __func__, clkt->val, clkt->mul, clkt->div, div 103 drivers/clk/actions/owl-factor.c cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul; div 126 drivers/clk/actions/owl-factor.c unsigned int val, mul = 0, div = 1; div 129 drivers/clk/actions/owl-factor.c _get_table_div_mul(clkt, val, &mul, &div); div 131 drivers/clk/actions/owl-factor.c return *parent_rate * mul / div; div 150 drivers/clk/actions/owl-factor.c u32 reg, val, mul, div; div 152 drivers/clk/actions/owl-factor.c div = 0; div 160 drivers/clk/actions/owl-factor.c _get_table_div_mul(clkt, val, &mul, &div); div 161 drivers/clk/actions/owl-factor.c if (!div) { div 169 drivers/clk/actions/owl-factor.c do_div(rate, div); div 19 drivers/clk/actions/owl-factor.h unsigned int div; div 19 drivers/clk/actions/owl-fixed-factor.h .div = _div, \ div 47 drivers/clk/at91/clk-audio-pll.c #define AUDIO_PLL_QDPAD(qd, div) ((AT91_PMC_AUDIO_PLL_QDPAD_EXTDIV(qd) & \ div 49 drivers/clk/at91/clk-audio-pll.c (AT91_PMC_AUDIO_PLL_QDPAD_DIV(div) & \ div 69 drivers/clk/at91/clk-audio-pll.c u8 div; div 113 drivers/clk/at91/clk-audio-pll.c AUDIO_PLL_QDPAD(apad_ck->qdaudio, apad_ck->div)); div 193 drivers/clk/at91/clk-audio-pll.c if (apad_ck->qdaudio && apad_ck->div) div 194 drivers/clk/at91/clk-audio-pll.c apad_rate = parent_rate / (apad_ck->qdaudio * apad_ck->div); div 197 drivers/clk/at91/clk-audio-pll.c __func__, apad_rate, apad_ck->div, apad_ck->qdaudio); div 280 drivers/clk/at91/clk-audio-pll.c u32 div; div 302 drivers/clk/at91/clk-audio-pll.c for (div = 2; div <= 3; div++) { div 303 drivers/clk/at91/clk-audio-pll.c if (div == 2 && tmp_qd % 3 == 0) div 307 drivers/clk/at91/clk-audio-pll.c rate * tmp_qd * div); div 308 drivers/clk/at91/clk-audio-pll.c tmp_rate = best_parent_rate / (div * tmp_qd); div 330 drivers/clk/at91/clk-audio-pll.c u32 tmp_qd = 0, div; div 342 drivers/clk/at91/clk-audio-pll.c div = max(best_parent_rate / rate, 1UL); div 343 drivers/clk/at91/clk-audio-pll.c for (; div <= AUDIO_PLL_QDPMC_MAX; div++) { div 344 drivers/clk/at91/clk-audio-pll.c best_parent_rate = clk_round_rate(pclk->clk, rate * div); div 345 drivers/clk/at91/clk-audio-pll.c tmp_rate = best_parent_rate / div; div 352 drivers/clk/at91/clk-audio-pll.c tmp_qd = div; div 402 drivers/clk/at91/clk-audio-pll.c apad_ck->div = 3; div 405 drivers/clk/at91/clk-audio-pll.c apad_ck->div = 2; div 100 drivers/clk/at91/clk-generated.c unsigned long parent_rate, u32 div, div 106 drivers/clk/at91/clk-generated.c if (!div) div 109 drivers/clk/at91/clk-generated.c tmp_rate = parent_rate / div; div 130 drivers/clk/at91/clk-generated.c u32 div; div 143 drivers/clk/at91/clk-generated.c div = DIV_ROUND_CLOSEST(parent_rate, req->rate); div 144 drivers/clk/at91/clk-generated.c if (div > GENERATED_MAX_DIV + 1) div 145 drivers/clk/at91/clk-generated.c div = GENERATED_MAX_DIV + 1; div 147 drivers/clk/at91/clk-generated.c clk_generated_best_diff(req, parent, parent_rate, div, div 171 drivers/clk/at91/clk-generated.c for (div = 1; div < GENERATED_MAX_DIV + 2; div++) { div 172 drivers/clk/at91/clk-generated.c req_parent.rate = req->rate * div; div 174 drivers/clk/at91/clk-generated.c clk_generated_best_diff(req, parent, req_parent.rate, div, div 219 drivers/clk/at91/clk-generated.c u32 div; div 227 drivers/clk/at91/clk-generated.c div = DIV_ROUND_CLOSEST(parent_rate, rate); div 228 drivers/clk/at91/clk-generated.c if (div > GENERATED_MAX_DIV + 1 || !div) div 231 drivers/clk/at91/clk-generated.c gck->gckdiv = div - 1; div 46 drivers/clk/at91/clk-h32mx.c unsigned long div; div 50 drivers/clk/at91/clk-h32mx.c div = *parent_rate / 2; div 51 drivers/clk/at91/clk-h32mx.c if (rate < div) div 52 drivers/clk/at91/clk-h32mx.c return div; div 54 drivers/clk/at91/clk-h32mx.c if (rate - div < *parent_rate - rate) div 55 drivers/clk/at91/clk-h32mx.c return div; div 60 drivers/clk/at91/clk-master.c u8 div; div 72 drivers/clk/at91/clk-master.c div = (mckr >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK; div 79 drivers/clk/at91/clk-master.c rate /= characteristics->divisors[div]; div 38 drivers/clk/at91/clk-peripheral.c u32 div; div 154 drivers/clk/at91/clk-peripheral.c periph->div = shift; div 171 drivers/clk/at91/clk-peripheral.c field_prep(periph->layout->div_mask, periph->div) | div 232 drivers/clk/at91/clk-peripheral.c periph->div = field_get(periph->layout->div_mask, status); div 238 drivers/clk/at91/clk-peripheral.c return parent_rate >> periph->div; div 306 drivers/clk/at91/clk-peripheral.c periph->div = shift; div 349 drivers/clk/at91/clk-peripheral.c periph->div = 0; div 38 drivers/clk/at91/clk-pll.c u8 div; div 67 drivers/clk/at91/clk-pll.c u8 div; div 71 drivers/clk/at91/clk-pll.c div = PLL_DIV(pllr); div 76 drivers/clk/at91/clk-pll.c (div == pll->div && mul == pll->mul)) div 87 drivers/clk/at91/clk-pll.c pll->div | (PLL_MAX_COUNT << PLL_COUNT_SHIFT) | div 117 drivers/clk/at91/clk-pll.c if (!pll->div || !pll->mul) div 120 drivers/clk/at91/clk-pll.c return (parent_rate / pll->div) * (pll->mul + 1); div 125 drivers/clk/at91/clk-pll.c u32 *div, u32 *mul, div 223 drivers/clk/at91/clk-pll.c if (div) div 224 drivers/clk/at91/clk-pll.c *div = bestdiv; div 247 drivers/clk/at91/clk-pll.c u32 div; div 252 drivers/clk/at91/clk-pll.c &div, &mul, &index); div 257 drivers/clk/at91/clk-pll.c pll->div = div; div 304 drivers/clk/at91/clk-pll.c pll->div = PLL_DIV(pllr); div 39 drivers/clk/at91/clk-plldiv.c unsigned long div; div 43 drivers/clk/at91/clk-plldiv.c div = *parent_rate / 2; div 44 drivers/clk/at91/clk-plldiv.c if (rate < div) div 45 drivers/clk/at91/clk-plldiv.c return div; div 47 drivers/clk/at91/clk-plldiv.c if (rate - div < *parent_rate - rate) div 48 drivers/clk/at91/clk-plldiv.c return div; div 145 drivers/clk/at91/clk-programmable.c unsigned long div = parent_rate / rate; div 148 drivers/clk/at91/clk-programmable.c if (!div) div 152 drivers/clk/at91/clk-programmable.c shift = div - 1; div 157 drivers/clk/at91/clk-programmable.c shift = fls(div) - 1; div 159 drivers/clk/at91/clk-programmable.c if (div != (1 << shift)) div 51 drivers/clk/at91/clk-sam9x60-pll.c u8 div; div 71 drivers/clk/at91/clk-sam9x60-pll.c u8 div; div 79 drivers/clk/at91/clk-sam9x60-pll.c div = FIELD_GET(PMC_PLL_CTRL0_DIV_MSK, val); div 85 drivers/clk/at91/clk-sam9x60-pll.c (div == pll->div && mul == pll->mul)) { div 116 drivers/clk/at91/clk-sam9x60-pll.c PMC_PLL_CTRL0_ENPLLCK | pll->div); div 168 drivers/clk/at91/clk-sam9x60-pll.c return (parent_rate * (pll->mul + 1)) / (pll->div + 1); div 252 drivers/clk/at91/clk-sam9x60-pll.c pll->div = bestdiv - 1; div 317 drivers/clk/at91/clk-sam9x60-pll.c pll->div = FIELD_GET(PMC_PLL_CTRL0_DIV_MSK, pllr); div 42 drivers/clk/at91/clk-smd.c unsigned long div; div 49 drivers/clk/at91/clk-smd.c div = *parent_rate / rate; div 50 drivers/clk/at91/clk-smd.c if (div > SMD_MAX_DIV) div 53 drivers/clk/at91/clk-smd.c bestrate = *parent_rate / div; div 54 drivers/clk/at91/clk-smd.c tmp = *parent_rate / (div + 1); div 88 drivers/clk/at91/clk-smd.c unsigned long div = parent_rate / rate; div 90 drivers/clk/at91/clk-smd.c if (parent_rate % rate || div < 1 || div > (SMD_MAX_DIV + 1)) div 94 drivers/clk/at91/clk-smd.c (div - 1) << SMD_DIV_SHIFT); div 66 drivers/clk/at91/clk-usb.c int div; div 72 drivers/clk/at91/clk-usb.c for (div = 1; div < SAM9X5_USB_MAX_DIV + 2; div++) { div 75 drivers/clk/at91/clk-usb.c tmp_parent_rate = req->rate * div; div 81 drivers/clk/at91/clk-usb.c tmp_rate = DIV_ROUND_CLOSEST(tmp_parent_rate, div); div 135 drivers/clk/at91/clk-usb.c unsigned long div; div 140 drivers/clk/at91/clk-usb.c div = DIV_ROUND_CLOSEST(parent_rate, rate); div 141 drivers/clk/at91/clk-usb.c if (div > SAM9X5_USB_MAX_DIV + 1 || !div) div 145 drivers/clk/at91/clk-usb.c (div - 1) << SAM9X5_USB_DIV_SHIFT); div 336 drivers/clk/at91/clk-usb.c unsigned long div; div 341 drivers/clk/at91/clk-usb.c div = DIV_ROUND_CLOSEST(parent_rate, rate); div 344 drivers/clk/at91/clk-usb.c if (usb->divisors[i] == div) { div 128 drivers/clk/axs10x/pll_clock.c u32 div = 0; div 130 drivers/clk/axs10x/pll_clock.c PLL_REG_SET_LOW(div, (id % 2 == 0) ? id >> 1 : (id >> 1) + 1); div 131 drivers/clk/axs10x/pll_clock.c PLL_REG_SET_HIGH(div, id >> 1); div 132 drivers/clk/axs10x/pll_clock.c PLL_REG_SET_EDGE(div, id % 2); div 133 drivers/clk/axs10x/pll_clock.c PLL_REG_SET_BYPASS(div, id == 1 ? 1 : 0); div 134 drivers/clk/axs10x/pll_clock.c PLL_REG_SET_NOUPD(div, upd == 0 ? 1 : 0); div 136 drivers/clk/axs10x/pll_clock.c return div; div 73 drivers/clk/bcm/clk-bcm21664.c .div = DIVIDER(0x0a28, 4, 14), div 85 drivers/clk/bcm/clk-bcm21664.c .div = DIVIDER(0x0a2c, 4, 14), div 97 drivers/clk/bcm/clk-bcm21664.c .div = DIVIDER(0x0a34, 4, 14), div 109 drivers/clk/bcm/clk-bcm21664.c .div = DIVIDER(0x0a30, 4, 14), div 168 drivers/clk/bcm/clk-bcm21664.c .div = FRAC_DIVIDER(0x0a10, 4, 12, 8), div 178 drivers/clk/bcm/clk-bcm21664.c .div = FRAC_DIVIDER(0x0a14, 4, 12, 8), div 188 drivers/clk/bcm/clk-bcm21664.c .div = FRAC_DIVIDER(0x0a18, 4, 12, 8), div 26 drivers/clk/bcm/clk-bcm281xx.c .div = FRAC_DIVIDER(0x0e00, 0, 22, 16), div 56 drivers/clk/bcm/clk-bcm281xx.c .div = DIVIDER(0x0a04, 3, 4), div 64 drivers/clk/bcm/clk-bcm281xx.c .div = DIVIDER(0x0a00, 4, 5), div 110 drivers/clk/bcm/clk-bcm281xx.c .div = DIVIDER(0x0a28, 4, 14), div 122 drivers/clk/bcm/clk-bcm281xx.c .div = DIVIDER(0x0a2c, 4, 14), div 134 drivers/clk/bcm/clk-bcm281xx.c .div = DIVIDER(0x0a34, 4, 14), div 146 drivers/clk/bcm/clk-bcm281xx.c .div = DIVIDER(0x0a30, 4, 14), div 155 drivers/clk/bcm/clk-bcm281xx.c .div = FIXED_DIVIDER(2), div 167 drivers/clk/bcm/clk-bcm281xx.c .div = FIXED_DIVIDER(2), div 174 drivers/clk/bcm/clk-bcm281xx.c .div = DIVIDER(0x0a38, 12, 2), div 212 drivers/clk/bcm/clk-bcm281xx.c .div = FRAC_DIVIDER(0x0a10, 4, 12, 8), div 222 drivers/clk/bcm/clk-bcm281xx.c .div = FRAC_DIVIDER(0x0a14, 4, 12, 8), div 232 drivers/clk/bcm/clk-bcm281xx.c .div = FRAC_DIVIDER(0x0a18, 4, 12, 8), div 242 drivers/clk/bcm/clk-bcm281xx.c .div = FRAC_DIVIDER(0x0a1c, 4, 12, 8), div 254 drivers/clk/bcm/clk-bcm281xx.c .div = DIVIDER(0x0a20, 4, 14), div 266 drivers/clk/bcm/clk-bcm281xx.c .div = DIVIDER(0x0a28, 4, 14), div 308 drivers/clk/bcm/clk-bcm281xx.c .div = DIVIDER(0x0a70, 4, 3), div 532 drivers/clk/bcm/clk-bcm2835.c u64 div; div 534 drivers/clk/bcm/clk-bcm2835.c div = (u64)rate << A2W_PLL_FRAC_BITS; div 535 drivers/clk/bcm/clk-bcm2835.c do_div(div, parent_rate); div 537 drivers/clk/bcm/clk-bcm2835.c *ndiv = div >> A2W_PLL_FRAC_BITS; div 538 drivers/clk/bcm/clk-bcm2835.c *fdiv = div & ((1 << A2W_PLL_FRAC_BITS) - 1); div 771 drivers/clk/bcm/clk-bcm2835.c struct clk_divider div; div 779 drivers/clk/bcm/clk-bcm2835.c return container_of(hw, struct bcm2835_pll_divider, div.hw); div 845 drivers/clk/bcm/clk-bcm2835.c u32 cm, div, max_div = 1 << A2W_PLL_DIV_BITS; div 847 drivers/clk/bcm/clk-bcm2835.c div = DIV_ROUND_UP_ULL(parent_rate, rate); div 849 drivers/clk/bcm/clk-bcm2835.c div = min(div, max_div); div 850 drivers/clk/bcm/clk-bcm2835.c if (div == max_div) div 851 drivers/clk/bcm/clk-bcm2835.c div = 0; div 853 drivers/clk/bcm/clk-bcm2835.c cprman_write(cprman, data->a2w_reg, div); div 928 drivers/clk/bcm/clk-bcm2835.c u32 div, mindiv, maxdiv; div 931 drivers/clk/bcm/clk-bcm2835.c div = temp; div 934 drivers/clk/bcm/clk-bcm2835.c if (round_up && ((div & unused_frac_mask) != 0 || rem != 0)) div 935 drivers/clk/bcm/clk-bcm2835.c div += unused_frac_mask + 1; div 936 drivers/clk/bcm/clk-bcm2835.c div &= ~unused_frac_mask; div 953 drivers/clk/bcm/clk-bcm2835.c div = max_t(u32, div, mindiv); div 954 drivers/clk/bcm/clk-bcm2835.c div = min_t(u32, div, maxdiv); div 956 drivers/clk/bcm/clk-bcm2835.c return div; div 961 drivers/clk/bcm/clk-bcm2835.c u32 div) div 973 drivers/clk/bcm/clk-bcm2835.c div >>= CM_DIV_FRAC_BITS - data->frac_bits; div 974 drivers/clk/bcm/clk-bcm2835.c div &= (1 << (data->int_bits + data->frac_bits)) - 1; div 976 drivers/clk/bcm/clk-bcm2835.c if (div == 0) div 981 drivers/clk/bcm/clk-bcm2835.c do_div(temp, div); div 992 drivers/clk/bcm/clk-bcm2835.c u32 div; div 997 drivers/clk/bcm/clk-bcm2835.c div = cprman_read(cprman, data->div_reg); div 999 drivers/clk/bcm/clk-bcm2835.c return bcm2835_clock_rate_from_divisor(clock, parent_rate, div); div 1066 drivers/clk/bcm/clk-bcm2835.c u32 div = bcm2835_clock_choose_div(hw, rate, parent_rate, false); div 1080 drivers/clk/bcm/clk-bcm2835.c ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0; div 1083 drivers/clk/bcm/clk-bcm2835.c cprman_write(cprman, data->div_reg, div); div 1102 drivers/clk/bcm/clk-bcm2835.c u32 *div, div 1117 drivers/clk/bcm/clk-bcm2835.c *div = bcm2835_clock_choose_div(hw, rate, *prate, true); div 1119 drivers/clk/bcm/clk-bcm2835.c *avgrate = bcm2835_clock_rate_from_divisor(clock, *prate, *div); div 1121 drivers/clk/bcm/clk-bcm2835.c if (data->low_jitter && (*div & CM_DIV_FRAC_MASK)) { div 1123 drivers/clk/bcm/clk-bcm2835.c u32 int_div = *div & ~CM_DIV_FRAC_MASK; div 1162 drivers/clk/bcm/clk-bcm2835.c *div = curdiv << CM_DIV_FRAC_BITS; div 1178 drivers/clk/bcm/clk-bcm2835.c u32 div; div 1201 drivers/clk/bcm/clk-bcm2835.c &div, &prate, div 1358 drivers/clk/bcm/clk-bcm2835.c divider->div.reg = cprman->regs + data->a2w_reg; div 1359 drivers/clk/bcm/clk-bcm2835.c divider->div.shift = A2W_PLL_DIV_SHIFT; div 1360 drivers/clk/bcm/clk-bcm2835.c divider->div.width = A2W_PLL_DIV_BITS; div 1361 drivers/clk/bcm/clk-bcm2835.c divider->div.flags = CLK_DIVIDER_MAX_AT_ZERO; div 1362 drivers/clk/bcm/clk-bcm2835.c divider->div.lock = &cprman->regs_lock; div 1363 drivers/clk/bcm/clk-bcm2835.c divider->div.hw.init = &init; div 1364 drivers/clk/bcm/clk-bcm2835.c divider->div.table = NULL; div 1369 drivers/clk/bcm/clk-bcm2835.c ret = devm_clk_hw_register(cprman->dev, ÷r->div.hw); div 1385 drivers/clk/bcm/clk-bcm2835.c return ÷r->div.hw; div 32 drivers/clk/bcm/clk-iproc-asiu.c struct iproc_asiu_div div; div 92 drivers/clk/bcm/clk-iproc-asiu.c val = readl(asiu->div_base + clk->div.offset); div 93 drivers/clk/bcm/clk-iproc-asiu.c if ((val & (1 << clk->div.en_shift)) == 0) { div 99 drivers/clk/bcm/clk-iproc-asiu.c div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width); div 101 drivers/clk/bcm/clk-iproc-asiu.c div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width); div 114 drivers/clk/bcm/clk-iproc-asiu.c unsigned int div; div 122 drivers/clk/bcm/clk-iproc-asiu.c div = DIV_ROUND_UP(*parent_rate, rate); div 123 drivers/clk/bcm/clk-iproc-asiu.c if (div < 2) div 126 drivers/clk/bcm/clk-iproc-asiu.c return *parent_rate / div; div 134 drivers/clk/bcm/clk-iproc-asiu.c unsigned int div, div_h, div_l; div 142 drivers/clk/bcm/clk-iproc-asiu.c val = readl(asiu->div_base + clk->div.offset); div 143 drivers/clk/bcm/clk-iproc-asiu.c val &= ~(1 << clk->div.en_shift); div 144 drivers/clk/bcm/clk-iproc-asiu.c writel(val, asiu->div_base + clk->div.offset); div 148 drivers/clk/bcm/clk-iproc-asiu.c div = DIV_ROUND_UP(parent_rate, rate); div 149 drivers/clk/bcm/clk-iproc-asiu.c if (div < 2) div 152 drivers/clk/bcm/clk-iproc-asiu.c div_h = div_l = div >> 1; div 156 drivers/clk/bcm/clk-iproc-asiu.c val = readl(asiu->div_base + clk->div.offset); div 157 drivers/clk/bcm/clk-iproc-asiu.c val |= 1 << clk->div.en_shift; div 159 drivers/clk/bcm/clk-iproc-asiu.c val &= ~(bit_mask(clk->div.high_width) div 160 drivers/clk/bcm/clk-iproc-asiu.c << clk->div.high_shift); div 161 drivers/clk/bcm/clk-iproc-asiu.c val |= div_h << clk->div.high_shift; div 163 drivers/clk/bcm/clk-iproc-asiu.c val &= ~(bit_mask(clk->div.high_width) div 164 drivers/clk/bcm/clk-iproc-asiu.c << clk->div.high_shift); div 167 drivers/clk/bcm/clk-iproc-asiu.c val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift); div 168 drivers/clk/bcm/clk-iproc-asiu.c val |= div_l << clk->div.low_shift; div 170 drivers/clk/bcm/clk-iproc-asiu.c val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift); div 172 drivers/clk/bcm/clk-iproc-asiu.c writel(val, asiu->div_base + clk->div.offset); div 186 drivers/clk/bcm/clk-iproc-asiu.c const struct iproc_asiu_div *div, div 193 drivers/clk/bcm/clk-iproc-asiu.c if (WARN_ON(!gate || !div)) div 232 drivers/clk/bcm/clk-iproc-asiu.c asiu_clk->div = div[i]; div 675 drivers/clk/bcm/clk-iproc-pll.c unsigned int div; div 680 drivers/clk/bcm/clk-iproc-pll.c div = DIV_ROUND_CLOSEST(parent_rate, rate); div 682 drivers/clk/bcm/clk-iproc-pll.c div /= 2; div 684 drivers/clk/bcm/clk-iproc-pll.c if (div > 256) div 688 drivers/clk/bcm/clk-iproc-pll.c if (div == 256) { div 692 drivers/clk/bcm/clk-iproc-pll.c val |= div << ctrl->mdiv.shift; div 220 drivers/clk/bcm/clk-iproc.h const struct iproc_asiu_div *div, div 55 drivers/clk/bcm/clk-kona-setup.c struct bcm_clk_div *div; div 64 drivers/clk/bcm/clk-kona-setup.c div = &peri->div; div 65 drivers/clk/bcm/clk-kona-setup.c if (!divider_exists(div)) div 69 drivers/clk/bcm/clk-kona-setup.c if (!divider_is_fixed(div)) div 72 drivers/clk/bcm/clk-kona-setup.c div = &peri->pre_div; div 74 drivers/clk/bcm/clk-kona-setup.c return divider_exists(div) && !divider_is_fixed(div); div 83 drivers/clk/bcm/clk-kona-setup.c struct bcm_clk_div *div; div 129 drivers/clk/bcm/clk-kona-setup.c div = &peri->div; div 130 drivers/clk/bcm/clk-kona-setup.c if (divider_exists(div)) { div 131 drivers/clk/bcm/clk-kona-setup.c if (div->u.s.offset > limit) { div 133 drivers/clk/bcm/clk-kona-setup.c __func__, name, div->u.s.offset, limit); div 138 drivers/clk/bcm/clk-kona-setup.c div = &peri->pre_div; div 139 drivers/clk/bcm/clk-kona-setup.c if (divider_exists(div)) { div 140 drivers/clk/bcm/clk-kona-setup.c if (div->u.s.offset > limit) { div 143 drivers/clk/bcm/clk-kona-setup.c __func__, name, div->u.s.offset, limit); div 335 drivers/clk/bcm/clk-kona-setup.c static bool div_valid(struct bcm_clk_div *div, const char *field_name, div 338 drivers/clk/bcm/clk-kona-setup.c if (divider_is_fixed(div)) { div 340 drivers/clk/bcm/clk-kona-setup.c if (div->u.fixed == 0) { div 347 drivers/clk/bcm/clk-kona-setup.c if (!bitfield_valid(div->u.s.shift, div->u.s.width, div 351 drivers/clk/bcm/clk-kona-setup.c if (divider_has_fraction(div)) div 352 drivers/clk/bcm/clk-kona-setup.c if (div->u.s.frac_width > div->u.s.width) { div 355 drivers/clk/bcm/clk-kona-setup.c div->u.s.frac_width, div->u.s.width); div 371 drivers/clk/bcm/clk-kona-setup.c struct bcm_clk_div *div; div 377 drivers/clk/bcm/clk-kona-setup.c if (!divider_exists(&peri->div) || !divider_exists(&peri->pre_div)) div 380 drivers/clk/bcm/clk-kona-setup.c div = &peri->div; div 382 drivers/clk/bcm/clk-kona-setup.c if (divider_is_fixed(div) || divider_is_fixed(pre_div)) div 387 drivers/clk/bcm/clk-kona-setup.c return div->u.s.frac_width + pre_div->u.s.frac_width <= limit; div 407 drivers/clk/bcm/clk-kona-setup.c struct bcm_clk_div *div; div 449 drivers/clk/bcm/clk-kona-setup.c div = &peri->div; div 451 drivers/clk/bcm/clk-kona-setup.c if (divider_exists(div)) { div 452 drivers/clk/bcm/clk-kona-setup.c if (!div_valid(div, "divider", name)) div 58 drivers/clk/bcm/clk-kona.c static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div) div 60 drivers/clk/bcm/clk-kona.c return (u64)reg_div + ((u64)1 << div->u.s.frac_width); div 68 drivers/clk/bcm/clk-kona.c u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, u32 billionths) div 76 drivers/clk/bcm/clk-kona.c combined <<= div->u.s.frac_width; div 83 drivers/clk/bcm/clk-kona.c scaled_div_min(struct bcm_clk_div *div) div 85 drivers/clk/bcm/clk-kona.c if (divider_is_fixed(div)) div 86 drivers/clk/bcm/clk-kona.c return (u64)div->u.fixed; div 88 drivers/clk/bcm/clk-kona.c return scaled_div_value(div, 0); div 92 drivers/clk/bcm/clk-kona.c u64 scaled_div_max(struct bcm_clk_div *div) div 96 drivers/clk/bcm/clk-kona.c if (divider_is_fixed(div)) div 97 drivers/clk/bcm/clk-kona.c return (u64)div->u.fixed; div 99 drivers/clk/bcm/clk-kona.c reg_div = ((u32)1 << div->u.s.width) - 1; div 101 drivers/clk/bcm/clk-kona.c return scaled_div_value(div, reg_div); div 109 drivers/clk/bcm/clk-kona.c divider(struct bcm_clk_div *div, u64 scaled_div) div 111 drivers/clk/bcm/clk-kona.c BUG_ON(scaled_div < scaled_div_min(div)); div 112 drivers/clk/bcm/clk-kona.c BUG_ON(scaled_div > scaled_div_max(div)); div 114 drivers/clk/bcm/clk-kona.c return (u32)(scaled_div - ((u64)1 << div->u.s.frac_width)); div 119 drivers/clk/bcm/clk-kona.c scale_rate(struct bcm_clk_div *div, u32 rate) div 121 drivers/clk/bcm/clk-kona.c if (divider_is_fixed(div)) div 124 drivers/clk/bcm/clk-kona.c return (u64)rate << div->u.s.frac_width; div 564 drivers/clk/bcm/clk-kona.c static u64 divider_read_scaled(struct ccu_data *ccu, struct bcm_clk_div *div) div 570 drivers/clk/bcm/clk-kona.c if (divider_is_fixed(div)) div 571 drivers/clk/bcm/clk-kona.c return (u64)div->u.fixed; div 574 drivers/clk/bcm/clk-kona.c reg_val = __ccu_read(ccu, div->u.s.offset); div 578 drivers/clk/bcm/clk-kona.c reg_div = bitfield_extract(reg_val, div->u.s.shift, div->u.s.width); div 581 drivers/clk/bcm/clk-kona.c return scaled_div_value(div, reg_div); div 592 drivers/clk/bcm/clk-kona.c struct bcm_clk_div *div, struct bcm_clk_trig *trig) div 599 drivers/clk/bcm/clk-kona.c BUG_ON(divider_is_fixed(div)); div 606 drivers/clk/bcm/clk-kona.c if (div->u.s.scaled_div == BAD_SCALED_DIV_VALUE) { div 607 drivers/clk/bcm/clk-kona.c reg_val = __ccu_read(ccu, div->u.s.offset); div 608 drivers/clk/bcm/clk-kona.c reg_div = bitfield_extract(reg_val, div->u.s.shift, div 609 drivers/clk/bcm/clk-kona.c div->u.s.width); div 610 drivers/clk/bcm/clk-kona.c div->u.s.scaled_div = scaled_div_value(div, reg_div); div 616 drivers/clk/bcm/clk-kona.c reg_div = divider(div, div->u.s.scaled_div); div 626 drivers/clk/bcm/clk-kona.c reg_val = __ccu_read(ccu, div->u.s.offset); div 627 drivers/clk/bcm/clk-kona.c reg_val = bitfield_replace(reg_val, div->u.s.shift, div->u.s.width, div 629 drivers/clk/bcm/clk-kona.c __ccu_write(ccu, div->u.s.offset, reg_val); div 648 drivers/clk/bcm/clk-kona.c struct bcm_clk_div *div, struct bcm_clk_trig *trig) div 650 drivers/clk/bcm/clk-kona.c if (!divider_exists(div) || divider_is_fixed(div)) div 652 drivers/clk/bcm/clk-kona.c return !__div_commit(ccu, gate, div, trig); div 656 drivers/clk/bcm/clk-kona.c struct bcm_clk_div *div, struct bcm_clk_trig *trig, div 663 drivers/clk/bcm/clk-kona.c BUG_ON(divider_is_fixed(div)); div 665 drivers/clk/bcm/clk-kona.c previous = div->u.s.scaled_div; div 669 drivers/clk/bcm/clk-kona.c div->u.s.scaled_div = scaled_div; div 674 drivers/clk/bcm/clk-kona.c ret = __div_commit(ccu, gate, div, trig); div 680 drivers/clk/bcm/clk-kona.c div->u.s.scaled_div = previous; /* Revert the change */ div 694 drivers/clk/bcm/clk-kona.c struct bcm_clk_div *div, struct bcm_clk_div *pre_div, div 701 drivers/clk/bcm/clk-kona.c if (!divider_exists(div)) div 720 drivers/clk/bcm/clk-kona.c scaled_rate = scale_rate(div, scaled_rate); div 725 drivers/clk/bcm/clk-kona.c scaled_parent_rate = scale_rate(div, parent_rate); div 733 drivers/clk/bcm/clk-kona.c scaled_div = divider_read_scaled(ccu, div); div 748 drivers/clk/bcm/clk-kona.c static long round_rate(struct ccu_data *ccu, struct bcm_clk_div *div, div 759 drivers/clk/bcm/clk-kona.c BUG_ON(!divider_exists(div)); div 779 drivers/clk/bcm/clk-kona.c scaled_rate = scale_rate(div, scaled_rate); div 784 drivers/clk/bcm/clk-kona.c scaled_parent_rate = scale_rate(div, parent_rate); div 792 drivers/clk/bcm/clk-kona.c if (!divider_is_fixed(div)) { div 795 drivers/clk/bcm/clk-kona.c min_scaled_div = scaled_div_min(div); div 796 drivers/clk/bcm/clk-kona.c max_scaled_div = scaled_div_max(div); div 802 drivers/clk/bcm/clk-kona.c best_scaled_div = divider_read_scaled(ccu, div); div 1004 drivers/clk/bcm/clk-kona.c return clk_recalc_rate(bcm_clk->ccu, &data->div, &data->pre_div, div 1012 drivers/clk/bcm/clk-kona.c struct bcm_clk_div *div = &bcm_clk->u.peri->div; div 1014 drivers/clk/bcm/clk-kona.c if (!divider_exists(div)) div 1018 drivers/clk/bcm/clk-kona.c return round_rate(bcm_clk->ccu, div, &bcm_clk->u.peri->pre_div, div 1135 drivers/clk/bcm/clk-kona.c struct bcm_clk_div *div = &data->div; div 1145 drivers/clk/bcm/clk-kona.c if (!divider_exists(div)) div 1153 drivers/clk/bcm/clk-kona.c if (divider_is_fixed(&data->div)) div 1161 drivers/clk/bcm/clk-kona.c (void)round_rate(bcm_clk->ccu, div, &data->pre_div, div 1168 drivers/clk/bcm/clk-kona.c ret = divider_write(bcm_clk->ccu, &data->gate, &data->div, div 1216 drivers/clk/bcm/clk-kona.c if (!div_init(ccu, &peri->gate, &peri->div, &peri->trig)) { div 65 drivers/clk/bcm/clk-kona.h #define divider_exists(div) FLAG_TEST(div, DIV, EXISTS) div 66 drivers/clk/bcm/clk-kona.h #define divider_is_fixed(div) FLAG_TEST(div, DIV, FIXED) div 67 drivers/clk/bcm/clk-kona.h #define divider_has_fraction(div) (!divider_is_fixed(div) && \ div 68 drivers/clk/bcm/clk-kona.h (div)->u.s.frac_width > 0) div 397 drivers/clk/bcm/clk-kona.h struct bcm_clk_div div; div 502 drivers/clk/bcm/clk-kona.h extern u64 scaled_div_max(struct bcm_clk_div *div); div 503 drivers/clk/bcm/clk-kona.h extern u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, div 149 drivers/clk/bcm/clk-raspberrypi.c u64 div, final_rate; div 155 drivers/clk/bcm/clk-raspberrypi.c div = (u64)final_rate << A2W_PLL_FRAC_BITS; div 156 drivers/clk/bcm/clk-raspberrypi.c do_div(div, req->best_parent_rate); div 158 drivers/clk/bcm/clk-raspberrypi.c ndiv = div >> A2W_PLL_FRAC_BITS; div 159 drivers/clk/bcm/clk-raspberrypi.c fdiv = div & ((1 << A2W_PLL_FRAC_BITS) - 1); div 67 drivers/clk/berlin/berlin2-div.c struct berlin2_div *div = to_berlin2_div(hw); div 68 drivers/clk/berlin/berlin2-div.c struct berlin2_div_map *map = &div->map; div 71 drivers/clk/berlin/berlin2-div.c if (div->lock) div 72 drivers/clk/berlin/berlin2-div.c spin_lock(div->lock); div 74 drivers/clk/berlin/berlin2-div.c reg = readl_relaxed(div->base + map->gate_offs); div 77 drivers/clk/berlin/berlin2-div.c if (div->lock) div 78 drivers/clk/berlin/berlin2-div.c spin_unlock(div->lock); div 85 drivers/clk/berlin/berlin2-div.c struct berlin2_div *div = to_berlin2_div(hw); div 86 drivers/clk/berlin/berlin2-div.c struct berlin2_div_map *map = &div->map; div 89 drivers/clk/berlin/berlin2-div.c if (div->lock) div 90 drivers/clk/berlin/berlin2-div.c spin_lock(div->lock); div 92 drivers/clk/berlin/berlin2-div.c reg = readl_relaxed(div->base + map->gate_offs); div 94 drivers/clk/berlin/berlin2-div.c writel_relaxed(reg, div->base + map->gate_offs); div 96 drivers/clk/berlin/berlin2-div.c if (div->lock) div 97 drivers/clk/berlin/berlin2-div.c spin_unlock(div->lock); div 104 drivers/clk/berlin/berlin2-div.c struct berlin2_div *div = to_berlin2_div(hw); div 105 drivers/clk/berlin/berlin2-div.c struct berlin2_div_map *map = &div->map; div 108 drivers/clk/berlin/berlin2-div.c if (div->lock) div 109 drivers/clk/berlin/berlin2-div.c spin_lock(div->lock); div 111 drivers/clk/berlin/berlin2-div.c reg = readl_relaxed(div->base + map->gate_offs); div 113 drivers/clk/berlin/berlin2-div.c writel_relaxed(reg, div->base + map->gate_offs); div 115 drivers/clk/berlin/berlin2-div.c if (div->lock) div 116 drivers/clk/berlin/berlin2-div.c spin_unlock(div->lock); div 121 drivers/clk/berlin/berlin2-div.c struct berlin2_div *div = to_berlin2_div(hw); div 122 drivers/clk/berlin/berlin2-div.c struct berlin2_div_map *map = &div->map; div 125 drivers/clk/berlin/berlin2-div.c if (div->lock) div 126 drivers/clk/berlin/berlin2-div.c spin_lock(div->lock); div 129 drivers/clk/berlin/berlin2-div.c reg = readl_relaxed(div->base + map->pll_switch_offs); div 134 drivers/clk/berlin/berlin2-div.c writel_relaxed(reg, div->base + map->pll_switch_offs); div 138 drivers/clk/berlin/berlin2-div.c reg = readl_relaxed(div->base + map->pll_select_offs); div 141 drivers/clk/berlin/berlin2-div.c writel_relaxed(reg, div->base + map->pll_select_offs); div 144 drivers/clk/berlin/berlin2-div.c if (div->lock) div 145 drivers/clk/berlin/berlin2-div.c spin_unlock(div->lock); div 152 drivers/clk/berlin/berlin2-div.c struct berlin2_div *div = to_berlin2_div(hw); div 153 drivers/clk/berlin/berlin2-div.c struct berlin2_div_map *map = &div->map; div 157 drivers/clk/berlin/berlin2-div.c if (div->lock) div 158 drivers/clk/berlin/berlin2-div.c spin_lock(div->lock); div 161 drivers/clk/berlin/berlin2-div.c reg = readl_relaxed(div->base + map->pll_switch_offs); div 164 drivers/clk/berlin/berlin2-div.c reg = readl_relaxed(div->base + map->pll_select_offs); div 170 drivers/clk/berlin/berlin2-div.c if (div->lock) div 171 drivers/clk/berlin/berlin2-div.c spin_unlock(div->lock); div 179 drivers/clk/berlin/berlin2-div.c struct berlin2_div *div = to_berlin2_div(hw); div 180 drivers/clk/berlin/berlin2-div.c struct berlin2_div_map *map = &div->map; div 183 drivers/clk/berlin/berlin2-div.c if (div->lock) div 184 drivers/clk/berlin/berlin2-div.c spin_lock(div->lock); div 186 drivers/clk/berlin/berlin2-div.c divsw = readl_relaxed(div->base + map->div_switch_offs) & div 188 drivers/clk/berlin/berlin2-div.c div3sw = readl_relaxed(div->base + map->div3_switch_offs) & div 200 drivers/clk/berlin/berlin2-div.c reg = readl_relaxed(div->base + map->div_select_offs); div 206 drivers/clk/berlin/berlin2-div.c if (div->lock) div 207 drivers/clk/berlin/berlin2-div.c spin_unlock(div->lock); div 236 drivers/clk/berlin/berlin2-div.c struct berlin2_div *div; div 238 drivers/clk/berlin/berlin2-div.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 239 drivers/clk/berlin/berlin2-div.c if (!div) div 243 drivers/clk/berlin/berlin2-div.c memcpy(&div->map, map, sizeof(*map)); div 244 drivers/clk/berlin/berlin2-div.c div->base = base; div 245 drivers/clk/berlin/berlin2-div.c div->lock = lock; div 253 drivers/clk/berlin/berlin2-div.c &div->hw, mux_ops, &div->hw, rate_ops, div 254 drivers/clk/berlin/berlin2-div.c &div->hw, gate_ops, flags); div 130 drivers/clk/clk-aspeed.c unsigned int mult, div; div 134 drivers/clk/clk-aspeed.c mult = div = 1; div 142 drivers/clk/clk-aspeed.c div = d + 1; div 145 drivers/clk/clk-aspeed.c mult, div); div 150 drivers/clk/clk-aspeed.c unsigned int mult, div; div 154 drivers/clk/clk-aspeed.c mult = div = 1; div 162 drivers/clk/clk-aspeed.c div = p + 1; div 166 drivers/clk/clk-aspeed.c mult, div); div 561 drivers/clk/clk-aspeed.c u32 val, div, clkin, hpll; div 610 drivers/clk/clk-aspeed.c div = val + 1; div 611 drivers/clk/clk-aspeed.c if (div == 3) div 612 drivers/clk/clk-aspeed.c div = 4; div 613 drivers/clk/clk-aspeed.c else if (div == 4) div 614 drivers/clk/clk-aspeed.c div = 3; div 615 drivers/clk/clk-aspeed.c hw = clk_hw_register_fixed_factor(NULL, "ahb", "hpll", 0, 1, div); div 629 drivers/clk/clk-aspeed.c u32 val, freq, div; div 651 drivers/clk/clk-aspeed.c div = 2 * (val + 1); div 652 drivers/clk/clk-aspeed.c hw = clk_hw_register_fixed_factor(NULL, "ahb", "hpll", 0, 1, div); div 658 drivers/clk/clk-aspeed.c div = 4 * (val + 1); div 659 drivers/clk/clk-aspeed.c hw = clk_hw_register_fixed_factor(NULL, "apb", "hpll", 0, 1, div); div 160 drivers/clk/clk-ast2600.c unsigned int mult, div; div 164 drivers/clk/clk-ast2600.c mult = div = 1; div 171 drivers/clk/clk-ast2600.c div = (p + 1); div 174 drivers/clk/clk-ast2600.c mult, div); div 179 drivers/clk/clk-ast2600.c unsigned int mult, div; div 183 drivers/clk/clk-ast2600.c mult = div = 1; div 191 drivers/clk/clk-ast2600.c div = n + 1; div 194 drivers/clk/clk-ast2600.c mult, div); div 609 drivers/clk/clk-ast2600.c u32 val, div, chip_id, axi_div, ahb_div; div 650 drivers/clk/clk-ast2600.c div = 4 * (val + 1); div 651 drivers/clk/clk-ast2600.c hw = clk_hw_register_fixed_factor(NULL, "apb1", "hpll", 0, 1, div); div 656 drivers/clk/clk-ast2600.c div = 2 * (val + 1); div 657 drivers/clk/clk-ast2600.c hw = clk_hw_register_fixed_factor(NULL, "apb2", "ahb", 0, 1, div); div 91 drivers/clk/clk-axm5516.c u32 ctrl, div; div 94 drivers/clk/clk-axm5516.c div = 1 + ((ctrl >> divclk->shift) & ((1 << divclk->width)-1)); div 96 drivers/clk/clk-axm5516.c return parent_rate / div; div 29 drivers/clk/clk-cdce706.c #define CDCE706_DIVIDER(div) (13 + (div)) div 50 drivers/clk/clk-cdce706.c #define CDCE706_DIVIDER_PLL(div) (9 + (div) - ((div) > 2) - ((div) > 4)) div 51 drivers/clk/clk-cdce706.c #define CDCE706_DIVIDER_PLL_SHIFT(div) ((div) < 2 ? 5 : 3 * ((div) & 1)) div 52 drivers/clk/clk-cdce706.c #define CDCE706_DIVIDER_PLL_MASK(div) (0x7 << CDCE706_DIVIDER_PLL_SHIFT(div)) div 72 drivers/clk/clk-cdce706.c unsigned div; div 169 drivers/clk/clk-cdce706.c __func__, hwd->idx, hwd->mux, hwd->mul, hwd->div); div 172 drivers/clk/clk-cdce706.c if (hwd->div && hwd->mul) { div 175 drivers/clk/clk-cdce706.c do_div(res, hwd->div); div 179 drivers/clk/clk-cdce706.c if (hwd->div) div 180 drivers/clk/clk-cdce706.c return parent_rate / hwd->div; div 189 drivers/clk/clk-cdce706.c unsigned long mul, div; div 198 drivers/clk/clk-cdce706.c &mul, &div); div 200 drivers/clk/clk-cdce706.c hwd->div = div; div 204 drivers/clk/clk-cdce706.c __func__, hwd->idx, mul, div); div 207 drivers/clk/clk-cdce706.c do_div(res, hwd->div); div 215 drivers/clk/clk-cdce706.c unsigned long mul = hwd->mul, div = hwd->div; div 220 drivers/clk/clk-cdce706.c __func__, hwd->idx, mul, div); div 225 drivers/clk/clk-cdce706.c ((div >> 8) & CDCE706_PLL_HI_M_MASK) | div 233 drivers/clk/clk-cdce706.c div & CDCE706_PLL_LOW_M_MASK); div 284 drivers/clk/clk-cdce706.c __func__, hwd->idx, hwd->div); div 285 drivers/clk/clk-cdce706.c if (hwd->div) div 286 drivers/clk/clk-cdce706.c return parent_rate / hwd->div; div 295 drivers/clk/clk-cdce706.c unsigned long mul, div; div 303 drivers/clk/clk-cdce706.c &mul, &div); div 305 drivers/clk/clk-cdce706.c div = CDCE706_DIVIDER_DIVIDER_MAX; div 313 drivers/clk/clk-cdce706.c for (div = CDCE706_PLL_FREQ_MIN / rate; best_diff && div 314 drivers/clk/clk-cdce706.c div <= CDCE706_PLL_FREQ_MAX / rate; ++div) { div 320 drivers/clk/clk-cdce706.c if (rate * div < CDCE706_PLL_FREQ_MIN) div 323 drivers/clk/clk-cdce706.c rational_best_approximation(rate * div, gp_rate, div 329 drivers/clk/clk-cdce706.c do_div(div_rate64, div); div 335 drivers/clk/clk-cdce706.c best_div = div; div 338 drivers/clk/clk-cdce706.c __func__, gp_rate, n, m, div, div_rate); div 342 drivers/clk/clk-cdce706.c div = best_div; div 346 drivers/clk/clk-cdce706.c __func__, *parent_rate, rate * div); div 347 drivers/clk/clk-cdce706.c *parent_rate = rate * div; div 349 drivers/clk/clk-cdce706.c hwd->div = div; div 353 drivers/clk/clk-cdce706.c __func__, hwd->idx, div); div 355 drivers/clk/clk-cdce706.c return *parent_rate / div; div 365 drivers/clk/clk-cdce706.c __func__, hwd->idx, hwd->div); div 370 drivers/clk/clk-cdce706.c hwd->div); div 537 drivers/clk/clk-cdce706.c cdce->pll[i].div = m | ((v & CDCE706_PLL_HI_M_MASK) << 8); div 543 drivers/clk/clk-cdce706.c cdce->pll[i].div, cdce->pll[i].mul, cdce->pll[i].mux); div 576 drivers/clk/clk-cdce706.c cdce->divider[i].div = val & CDCE706_DIVIDER_DIVIDER_MASK; div 579 drivers/clk/clk-cdce706.c cdce->divider[i].parent, cdce->divider[i].div); div 27 drivers/clk/clk-clps711x.c { .val = 0, .div = 32, }, div 28 drivers/clk/clk-clps711x.c { .val = 1, .div = 8, }, div 29 drivers/clk/clk-clps711x.c { .val = 2, .div = 2, }, div 30 drivers/clk/clk-clps711x.c { .val = 3, .div = 1, }, div 34 drivers/clk/clk-clps711x.c { .val = 0, .div = 256, }, div 35 drivers/clk/clk-clps711x.c { .val = 1, .div = 1, }, div 50 drivers/clk/clk-divider.c for (clkt = table; clkt->div; clkt++) div 51 drivers/clk/clk-divider.c if (clkt->div > maxdiv && clkt->val <= mask) div 52 drivers/clk/clk-divider.c maxdiv = clkt->div; div 61 drivers/clk/clk-divider.c for (clkt = table; clkt->div; clkt++) div 62 drivers/clk/clk-divider.c if (clkt->div < mindiv) div 63 drivers/clk/clk-divider.c mindiv = clkt->div; div 84 drivers/clk/clk-divider.c for (clkt = table; clkt->div; clkt++) div 86 drivers/clk/clk-divider.c return clkt->div; div 105 drivers/clk/clk-divider.c unsigned int div) div 109 drivers/clk/clk-divider.c for (clkt = table; clkt->div; clkt++) div 110 drivers/clk/clk-divider.c if (clkt->div == div) div 116 drivers/clk/clk-divider.c unsigned int div, unsigned long flags, u8 width) div 119 drivers/clk/clk-divider.c return div; div 121 drivers/clk/clk-divider.c return __ffs(div); div 123 drivers/clk/clk-divider.c return (div == clk_div_mask(width) + 1) ? 0 : div; div 125 drivers/clk/clk-divider.c return _get_table_val(table, div); div 126 drivers/clk/clk-divider.c return div - 1; div 134 drivers/clk/clk-divider.c unsigned int div; div 136 drivers/clk/clk-divider.c div = _get_div(table, val, flags, width); div 137 drivers/clk/clk-divider.c if (!div) { div 144 drivers/clk/clk-divider.c return DIV_ROUND_UP_ULL((u64)parent_rate, div); div 162 drivers/clk/clk-divider.c unsigned int div) div 166 drivers/clk/clk-divider.c for (clkt = table; clkt->div; clkt++) div 167 drivers/clk/clk-divider.c if (clkt->div == div) div 172 drivers/clk/clk-divider.c static bool _is_valid_div(const struct clk_div_table *table, unsigned int div, div 176 drivers/clk/clk-divider.c return is_power_of_2(div); div 178 drivers/clk/clk-divider.c return _is_valid_table_div(table, div); div 182 drivers/clk/clk-divider.c static int _round_up_table(const struct clk_div_table *table, int div) div 187 drivers/clk/clk-divider.c for (clkt = table; clkt->div; clkt++) { div 188 drivers/clk/clk-divider.c if (clkt->div == div) div 189 drivers/clk/clk-divider.c return clkt->div; div 190 drivers/clk/clk-divider.c else if (clkt->div < div) div 193 drivers/clk/clk-divider.c if ((clkt->div - div) < (up - div)) div 194 drivers/clk/clk-divider.c up = clkt->div; div 200 drivers/clk/clk-divider.c static int _round_down_table(const struct clk_div_table *table, int div) div 205 drivers/clk/clk-divider.c for (clkt = table; clkt->div; clkt++) { div 206 drivers/clk/clk-divider.c if (clkt->div == div) div 207 drivers/clk/clk-divider.c return clkt->div; div 208 drivers/clk/clk-divider.c else if (clkt->div > div) div 211 drivers/clk/clk-divider.c if ((div - clkt->div) < (div - down)) div 212 drivers/clk/clk-divider.c down = clkt->div; div 222 drivers/clk/clk-divider.c int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); div 225 drivers/clk/clk-divider.c div = __roundup_pow_of_two(div); div 227 drivers/clk/clk-divider.c div = _round_up_table(table, div); div 229 drivers/clk/clk-divider.c return div; div 275 drivers/clk/clk-divider.c static int _next_div(const struct clk_div_table *table, int div, div 278 drivers/clk/clk-divider.c div++; div 281 drivers/clk/clk-divider.c return __roundup_pow_of_two(div); div 283 drivers/clk/clk-divider.c return _round_up_table(table, div); div 285 drivers/clk/clk-divider.c return div; div 350 drivers/clk/clk-divider.c int div; div 352 drivers/clk/clk-divider.c div = clk_divider_bestdiv(hw, parent, rate, prate, table, width, flags); div 354 drivers/clk/clk-divider.c return DIV_ROUND_UP_ULL((u64)*prate, div); div 363 drivers/clk/clk-divider.c int div; div 365 drivers/clk/clk-divider.c div = _get_div(table, val, flags, width); div 372 drivers/clk/clk-divider.c *prate = clk_hw_round_rate(parent, rate * div); div 375 drivers/clk/clk-divider.c return DIV_ROUND_UP_ULL((u64)*prate, div); div 405 drivers/clk/clk-divider.c unsigned int div, value; div 407 drivers/clk/clk-divider.c div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); div 409 drivers/clk/clk-divider.c if (!_is_valid_div(table, div, flags)) div 412 drivers/clk/clk-divider.c value = _get_val(table, div, flags, width); div 472 drivers/clk/clk-divider.c struct clk_divider *div; div 485 drivers/clk/clk-divider.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 486 drivers/clk/clk-divider.c if (!div) div 499 drivers/clk/clk-divider.c div->reg = reg; div 500 drivers/clk/clk-divider.c div->shift = shift; div 501 drivers/clk/clk-divider.c div->width = width; div 502 drivers/clk/clk-divider.c div->flags = clk_divider_flags; div 503 drivers/clk/clk-divider.c div->lock = lock; div 504 drivers/clk/clk-divider.c div->hw.init = &init; div 505 drivers/clk/clk-divider.c div->table = table; div 508 drivers/clk/clk-divider.c hw = &div->hw; div 511 drivers/clk/clk-divider.c kfree(div); div 624 drivers/clk/clk-divider.c struct clk_divider *div; div 631 drivers/clk/clk-divider.c div = to_clk_divider(hw); div 634 drivers/clk/clk-divider.c kfree(div); div 644 drivers/clk/clk-divider.c struct clk_divider *div; div 646 drivers/clk/clk-divider.c div = to_clk_divider(hw); div 649 drivers/clk/clk-divider.c kfree(div); div 29 drivers/clk/clk-fixed-factor.c do_div(rate, fix->div); div 41 drivers/clk/clk-fixed-factor.c best_parent = (rate / fix->mult) * fix->div; div 45 drivers/clk/clk-fixed-factor.c return (*prate / fix->div) * fix->mult; div 70 drivers/clk/clk-fixed-factor.c unsigned long flags, unsigned int mult, unsigned int div) div 84 drivers/clk/clk-fixed-factor.c fix->div = div; div 111 drivers/clk/clk-fixed-factor.c unsigned int mult, unsigned int div) div 114 drivers/clk/clk-fixed-factor.c flags, mult, div); div 120 drivers/clk/clk-fixed-factor.c unsigned int mult, unsigned int div) div 125 drivers/clk/clk-fixed-factor.c div); div 167 drivers/clk/clk-fixed-factor.c u32 div, mult; div 170 drivers/clk/clk-fixed-factor.c if (of_property_read_u32(node, "clock-div", &div)) { div 188 drivers/clk/clk-fixed-factor.c flags, mult, div); div 278 drivers/clk/clk-gemini.c unsigned int mult, div; div 329 drivers/clk/clk-gemini.c div = 1; div 332 drivers/clk/clk-gemini.c div = 4; div 334 drivers/clk/clk-gemini.c hw = clk_hw_register_fixed_factor(NULL, "secdiv", "ahb", 0, mult, div); div 360 drivers/clk/clk-gemini.c div = ((val >> TVC_HALFDIV_SHIFT) & TVC_HALFDIV_MASK); div 361 drivers/clk/clk-gemini.c dev_dbg(dev, "TVC half divider value = %d\n", div); div 362 drivers/clk/clk-gemini.c div += 1; div 397 drivers/clk/clk-gemini.c unsigned int mult, div; div 445 drivers/clk/clk-gemini.c div = 2; div 449 drivers/clk/clk-gemini.c hw = clk_hw_register_fixed_factor(NULL, "vco", "xtal", 0, mult, div); div 197 drivers/clk/clk-highbank.c u32 div = (readl(hbclk->reg) & HB_A9_PCLK_DIV) ? 8 : 4; div 198 drivers/clk/clk-highbank.c return parent_rate / div; div 209 drivers/clk/clk-highbank.c u32 div = (readl(hbclk->reg) & HB_A9_BCLK_DIV_MASK) >> HB_A9_BCLK_DIV_SHIFT; div 211 drivers/clk/clk-highbank.c return parent_rate / (div + 2); div 222 drivers/clk/clk-highbank.c u32 div; div 224 drivers/clk/clk-highbank.c div = readl(hbclk->reg) & 0x1f; div 225 drivers/clk/clk-highbank.c div++; div 226 drivers/clk/clk-highbank.c div *= 2; div 228 drivers/clk/clk-highbank.c return parent_rate / div; div 234 drivers/clk/clk-highbank.c u32 div; div 236 drivers/clk/clk-highbank.c div = *parent_rate / rate; div 237 drivers/clk/clk-highbank.c div++; div 238 drivers/clk/clk-highbank.c div &= ~0x1; div 240 drivers/clk/clk-highbank.c return *parent_rate / div; div 247 drivers/clk/clk-highbank.c u32 div; div 249 drivers/clk/clk-highbank.c div = parent_rate / rate; div 250 drivers/clk/clk-highbank.c if (div & 0x1) div 253 drivers/clk/clk-highbank.c writel(div >> 1, hbclk->reg); div 83 drivers/clk/clk-milbeaut.c u8 div; div 101 drivers/clk/clk-milbeaut.c { .val = 0, .div = 8 }, div 102 drivers/clk/clk-milbeaut.c { .val = 1, .div = 9 }, div 103 drivers/clk/clk-milbeaut.c { .val = 2, .div = 10 }, div 104 drivers/clk/clk-milbeaut.c { .val = 3, .div = 15 }, div 105 drivers/clk/clk-milbeaut.c { .div = 0 }, div 109 drivers/clk/clk-milbeaut.c { .val = 1, .div = 2 }, div 110 drivers/clk/clk-milbeaut.c { .val = 3, .div = 4 }, div 111 drivers/clk/clk-milbeaut.c { .div = 0 }, div 115 drivers/clk/clk-milbeaut.c { .val = 3, .div = 4 }, div 116 drivers/clk/clk-milbeaut.c { .val = 7, .div = 8 }, div 117 drivers/clk/clk-milbeaut.c { .div = 0 }, div 121 drivers/clk/clk-milbeaut.c { .val = 1, .div = 2 }, div 122 drivers/clk/clk-milbeaut.c { .val = 3, .div = 4 }, div 123 drivers/clk/clk-milbeaut.c { .div = 0 }, div 127 drivers/clk/clk-milbeaut.c { .val = 0, .div = 2 }, div 128 drivers/clk/clk-milbeaut.c { .val = 1, .div = 3 }, div 129 drivers/clk/clk-milbeaut.c { .div = 0 }, div 133 drivers/clk/clk-milbeaut.c { .val = 3, .div = 4 }, div 134 drivers/clk/clk-milbeaut.c { .val = 7, .div = 8 }, div 135 drivers/clk/clk-milbeaut.c { .div = 0 }, div 139 drivers/clk/clk-milbeaut.c { .val = 3, .div = 4 }, div 140 drivers/clk/clk-milbeaut.c { .val = 4, .div = 5 }, div 141 drivers/clk/clk-milbeaut.c { .val = 5, .div = 6 }, div 142 drivers/clk/clk-milbeaut.c { .val = 7, .div = 8 }, div 143 drivers/clk/clk-milbeaut.c { .div = 0 }, div 147 drivers/clk/clk-milbeaut.c { .val = 7, .div = 8 }, div 148 drivers/clk/clk-milbeaut.c { .val = 15, .div = 16 }, div 149 drivers/clk/clk-milbeaut.c { .div = 0 }, div 153 drivers/clk/clk-milbeaut.c { .val = 3, .div = 4 }, div 154 drivers/clk/clk-milbeaut.c { .val = 7, .div = 8 }, div 155 drivers/clk/clk-milbeaut.c { .div = 0 }, div 159 drivers/clk/clk-milbeaut.c { .val = 15, .div = 16 }, div 160 drivers/clk/clk-milbeaut.c { .val = 31, .div = 32 }, div 161 drivers/clk/clk-milbeaut.c { .div = 0 }, div 165 drivers/clk/clk-milbeaut.c { .val = 0, .div = 8 }, div 166 drivers/clk/clk-milbeaut.c { .val = 1, .div = 16 }, div 167 drivers/clk/clk-milbeaut.c { .val = 2, .div = 24 }, div 168 drivers/clk/clk-milbeaut.c { .val = 3, .div = 32 }, div 169 drivers/clk/clk-milbeaut.c { .div = 0 }, div 173 drivers/clk/clk-milbeaut.c { .val = 0, .div = 2 }, div 174 drivers/clk/clk-milbeaut.c { .val = 1, .div = 3 }, div 175 drivers/clk/clk-milbeaut.c { .val = 2, .div = 4 }, div 176 drivers/clk/clk-milbeaut.c { .val = 3, .div = 8 }, div 177 drivers/clk/clk-milbeaut.c { .val = 4, .div = 16 }, div 178 drivers/clk/clk-milbeaut.c { .div = 0 }, div 182 drivers/clk/clk-milbeaut.c { .val = 0, .div = 9 }, div 183 drivers/clk/clk-milbeaut.c { .val = 1, .div = 10 }, div 184 drivers/clk/clk-milbeaut.c { .val = 2, .div = 11 }, div 185 drivers/clk/clk-milbeaut.c { .val = 3, .div = 12 }, div 186 drivers/clk/clk-milbeaut.c { .val = 4, .div = 13 }, div 187 drivers/clk/clk-milbeaut.c { .val = 5, .div = 14 }, div 188 drivers/clk/clk-milbeaut.c { .val = 6, .div = 16 }, div 189 drivers/clk/clk-milbeaut.c { .val = 7, .div = 18 }, div 190 drivers/clk/clk-milbeaut.c { .div = 0 }, div 463 drivers/clk/clk-milbeaut.c struct m10v_clk_divider *div; div 468 drivers/clk/clk-milbeaut.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 469 drivers/clk/clk-milbeaut.c if (!div) div 478 drivers/clk/clk-milbeaut.c div->reg = reg; div 479 drivers/clk/clk-milbeaut.c div->shift = shift; div 480 drivers/clk/clk-milbeaut.c div->width = width; div 481 drivers/clk/clk-milbeaut.c div->flags = clk_divider_flags; div 482 drivers/clk/clk-milbeaut.c div->lock = lock; div 483 drivers/clk/clk-milbeaut.c div->hw.init = &init; div 484 drivers/clk/clk-milbeaut.c div->table = table; div 485 drivers/clk/clk-milbeaut.c div->write_valid_reg = write_valid_reg; div 488 drivers/clk/clk-milbeaut.c hw = &div->hw; div 491 drivers/clk/clk-milbeaut.c kfree(div); div 536 drivers/clk/clk-milbeaut.c factors->mult, factors->div); div 63 drivers/clk/clk-moxart.c unsigned int div, val; div 82 drivers/clk/clk-moxart.c div = div_idx[val] * 2; div 90 drivers/clk/clk-moxart.c hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, 1, div); div 228 drivers/clk/clk-nomadik.c u8 div; div 232 drivers/clk/clk-nomadik.c div = val & 0x07U; div 233 drivers/clk/clk-nomadik.c return (parent_rate * mul) >> div; div 165 drivers/clk/clk-npcm7xx.c u8 div; div 42 drivers/clk/clk-qoriq.c struct clockgen_pll_div div[MAX_PLL_DIV]; div 51 drivers/clk/clk-qoriq.c int div; /* PLL_DIVn */ div 439 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[CGA_PLL2].div[PLL_DIV2].clk; div 441 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; div 451 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk; div 453 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; div 456 drivers/clk/clk-qoriq.c cg->fman[1] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk; div 458 drivers/clk/clk-qoriq.c cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; div 464 drivers/clk/clk-qoriq.c int div = PLL_DIV2; div 468 drivers/clk/clk-qoriq.c div = PLL_DIV4; div 471 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[CGA_PLL2].div[div].clk; div 473 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; div 479 drivers/clk/clk-qoriq.c int div = PLL_DIV2; div 483 drivers/clk/clk-qoriq.c div = PLL_DIV4; div 486 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[CGA_PLL3].div[div].clk; div 488 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; div 491 drivers/clk/clk-qoriq.c cg->fman[1] = cg->pll[CGA_PLL3].div[div].clk; div 493 drivers/clk/clk-qoriq.c cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; div 503 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk; div 834 drivers/clk/clk-qoriq.c int pll, div; div 840 drivers/clk/clk-qoriq.c div = hwc->info->clksel[idx].div; div 842 drivers/clk/clk-qoriq.c return &cg->pll[pll].div[div]; div 855 drivers/clk/clk-qoriq.c const struct clockgen_pll_div *div; div 867 drivers/clk/clk-qoriq.c div = get_pll_div(cg, hwc, i); div 868 drivers/clk/clk-qoriq.c if (!div) div 871 drivers/clk/clk-qoriq.c rate = clk_get_rate(div->clk); div 881 drivers/clk/clk-qoriq.c parent_names[j] = div->name; div 909 drivers/clk/clk-qoriq.c const struct clockgen_pll_div *div; div 933 drivers/clk/clk-qoriq.c div = get_pll_div(cg, hwc, clksel); div 934 drivers/clk/clk-qoriq.c if (!div) { div 939 drivers/clk/clk-qoriq.c max_rate = clk_get_rate(div->clk); div 943 drivers/clk/clk-qoriq.c plat_rate = clk_get_rate(cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk); div 1202 drivers/clk/clk-qoriq.c for (i = 0; i < ARRAY_SIZE(pll->div); i++) { div 1213 drivers/clk/clk-qoriq.c snprintf(pll->div[i].name, sizeof(pll->div[i].name), div 1217 drivers/clk/clk-qoriq.c pll->div[i].name, input, 0, mult, i + 1); div 1220 drivers/clk/clk-qoriq.c __func__, pll->div[i].name, PTR_ERR(clk)); div 1224 drivers/clk/clk-qoriq.c pll->div[i].clk = clk; div 1225 drivers/clk/clk-qoriq.c ret = clk_register_clkdev(clk, pll->div[i].name, NULL); div 1228 drivers/clk/clk-qoriq.c __func__, pll->div[i].name, ret); div 1253 drivers/clk/clk-qoriq.c BUILD_BUG_ON(ARRAY_SIZE(pll->div) < 4); div 1263 drivers/clk/clk-qoriq.c subclks[0] = pll->div[0].clk; div 1264 drivers/clk/clk-qoriq.c subclks[1] = pll->div[1].clk; div 1265 drivers/clk/clk-qoriq.c subclks[2] = pll->div[3].clk; div 1267 drivers/clk/clk-qoriq.c subclks[0] = pll->div[0].clk; div 1268 drivers/clk/clk-qoriq.c subclks[1] = pll->div[1].clk; div 1269 drivers/clk/clk-qoriq.c subclks[2] = pll->div[2].clk; div 1270 drivers/clk/clk-qoriq.c subclks[3] = pll->div[3].clk; div 1355 drivers/clk/clk-qoriq.c if (idx >= ARRAY_SIZE(pll->div)) div 1357 drivers/clk/clk-qoriq.c clk = pll->div[idx].clk; div 700 drivers/clk/clk-stm32f4.c struct clk_divider div; div 704 drivers/clk/clk-stm32f4.c #define to_pll_div_clk(_div) container_of(_div, struct stm32f4_pll_div, div) div 723 drivers/clk/clk-stm32f4.c struct clk_divider *div = to_clk_divider(hw); div 724 drivers/clk/clk-stm32f4.c struct stm32f4_pll_div *pll_div = to_pll_div_clk(div); div 768 drivers/clk/clk-stm32f4.c pll_div->div.reg = reg; div 769 drivers/clk/clk-stm32f4.c pll_div->div.shift = shift; div 770 drivers/clk/clk-stm32f4.c pll_div->div.width = width; div 771 drivers/clk/clk-stm32f4.c pll_div->div.flags = clk_divider_flags; div 772 drivers/clk/clk-stm32f4.c pll_div->div.lock = lock; div 773 drivers/clk/clk-stm32f4.c pll_div->div.table = table; div 774 drivers/clk/clk-stm32f4.c pll_div->div.hw.init = &init; div 779 drivers/clk/clk-stm32f4.c hw = &pll_div->div.hw; div 265 drivers/clk/clk-stm32h7.c struct muxdiv_cfg *div; div 282 drivers/clk/clk-stm32h7.c struct composite_clk_gcfg_t *div; div 290 drivers/clk/clk-stm32h7.c .div = &(struct composite_clk_gcfg_t) {_rate_flags, _rate_ops} div 316 drivers/clk/clk-stm32h7.c struct clk_divider *div; div 318 drivers/clk/clk-stm32h7.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 320 drivers/clk/clk-stm32h7.c if (!div) div 323 drivers/clk/clk-stm32h7.c div->reg = reg; div 324 drivers/clk/clk-stm32h7.c div->shift = shift; div 325 drivers/clk/clk-stm32h7.c div->width = width; div 326 drivers/clk/clk-stm32h7.c div->flags = flags; div 327 drivers/clk/clk-stm32h7.c div->lock = lock; div 329 drivers/clk/clk-stm32h7.c return div; div 364 drivers/clk/clk-stm32h7.c struct clk_divider *div = NULL; div 387 drivers/clk/clk-stm32h7.c if (gcfg->div && cfg->div) { div 388 drivers/clk/clk-stm32h7.c div = _get_cdiv(base + cfg->div->offset, div 389 drivers/clk/clk-stm32h7.c cfg->div->shift, div 390 drivers/clk/clk-stm32h7.c cfg->div->width, div 391 drivers/clk/clk-stm32h7.c gcfg->div->flags, lock); div 393 drivers/clk/clk-stm32h7.c if (!IS_ERR(div)) { div 394 drivers/clk/clk-stm32h7.c div_hw = &div->hw; div 395 drivers/clk/clk-stm32h7.c div_ops = gcfg->div->ops ? div 396 drivers/clk/clk-stm32h7.c gcfg->div->ops : &clk_divider_ops; div 689 drivers/clk/clk-stm32h7.c struct stm32_fractional_divider div; div 729 drivers/clk/clk-stm32h7.c struct stm32_fractional_divider *fd = &clk_elem->div; div 737 drivers/clk/clk-stm32h7.c struct stm32_fractional_divider *fd = &clk_elem->div; div 747 drivers/clk/clk-stm32h7.c struct stm32_fractional_divider *fd = &clk_elem->div; div 793 drivers/clk/clk-stm32h7.c struct stm32_fractional_divider *div = NULL; div 815 drivers/clk/clk-stm32h7.c div = &pll->div; div 816 drivers/clk/clk-stm32h7.c div->flags = 0; div 817 drivers/clk/clk-stm32h7.c div->mreg = base + RCC_PLLCKSELR; div 818 drivers/clk/clk-stm32h7.c div->mshift = cfg->divm; div 819 drivers/clk/clk-stm32h7.c div->mwidth = 6; div 820 drivers/clk/clk-stm32h7.c div->nreg = base + cfg->offset_divr; div 821 drivers/clk/clk-stm32h7.c div->nshift = 0; div 822 drivers/clk/clk-stm32h7.c div->nwidth = 9; div 824 drivers/clk/clk-stm32h7.c div->freg_status = base + RCC_PLLCFGR; div 825 drivers/clk/clk-stm32h7.c div->freg_bit = cfg->bit_frac_en; div 826 drivers/clk/clk-stm32h7.c div->freg_value = base + cfg->offset_frac; div 827 drivers/clk/clk-stm32h7.c div->fshift = 3; div 828 drivers/clk/clk-stm32h7.c div->fwidth = 13; div 830 drivers/clk/clk-stm32h7.c div->lock = lock; div 942 drivers/clk/clk-stm32h7.c .div = &(struct muxdiv_cfg) {_rate_offset, _rate_shift, _rate_width},\ div 1183 drivers/clk/clk-stm32h7.c .div = &(struct muxdiv_cfg) {_rate_offset, _rate_shift, _rate_width},\ div 336 drivers/clk/clk-stm32mp1.c unsigned int div; div 362 drivers/clk/clk-stm32mp1.c struct div_cfg *div; div 375 drivers/clk/clk-stm32mp1.c const struct stm32_div_cfg *div; div 407 drivers/clk/clk-stm32mp1.c ff_cfg->div); div 516 drivers/clk/clk-stm32mp1.c struct clk_divider *div; div 518 drivers/clk/clk-stm32mp1.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 520 drivers/clk/clk-stm32mp1.c if (!div) div 523 drivers/clk/clk-stm32mp1.c div->reg = cfg->div->reg_off + base; div 524 drivers/clk/clk-stm32mp1.c div->shift = cfg->div->shift; div 525 drivers/clk/clk-stm32mp1.c div->width = cfg->div->width; div 526 drivers/clk/clk-stm32mp1.c div->flags = cfg->div->div_flags; div 527 drivers/clk/clk-stm32mp1.c div->table = cfg->div->table; div 528 drivers/clk/clk-stm32mp1.c div->lock = lock; div 530 drivers/clk/clk-stm32mp1.c return &div->hw; div 636 drivers/clk/clk-stm32mp1.c if (cfg->div) { div 637 drivers/clk/clk-stm32mp1.c div_hw = _get_stm32_div(base, cfg->div, lock); div 642 drivers/clk/clk-stm32mp1.c if (cfg->div->ops) div 643 drivers/clk/clk-stm32mp1.c div_ops = cfg->div->ops; div 1114 drivers/clk/clk-stm32mp1.c .div = _div,\ div 1231 drivers/clk/clk-stm32mp1.c .div = &(struct stm32_div_cfg) {\ div 1267 drivers/clk/clk-stm32mp1.c #define _NO_DIV .div = NULL div 25 drivers/clk/clk-tango4.c u32 val, mul, div; div 30 drivers/clk/clk-tango4.c div = (extract_pll_m(val) + 1) << extract_pll_k(val); div 31 drivers/clk/clk-tango4.c clk_register_fixed_factor(NULL, name, parent, 0, mul, div); div 39 drivers/clk/clk-tango4.c u32 val, mul, div; div 44 drivers/clk/clk-tango4.c div = (2 << 27) + val; div 45 drivers/clk/clk-tango4.c clk_register_fixed_factor(NULL, name, "pll2", 0, mul, div); div 323 drivers/clk/clk-versaclock5.c unsigned int prediv, div; div 331 drivers/clk/clk-versaclock5.c regmap_read(vc5->regmap, VC5_REF_DIVIDER, &div); div 334 drivers/clk/clk-versaclock5.c if (div & VC5_REF_DIVIDER_SEL_PREDIV2) div 337 drivers/clk/clk-versaclock5.c return parent_rate / VC5_REF_DIVIDER_REF_DIV(div); div 366 drivers/clk/clk-versaclock5.c u8 div; div 381 drivers/clk/clk-versaclock5.c div = VC5_REF_DIVIDER_SEL_PREDIV2; div 383 drivers/clk/clk-versaclock5.c div = VC5_REF_DIVIDER_REF_DIV(idiv); div 385 drivers/clk/clk-versaclock5.c regmap_update_bits(vc5->regmap, VC5_REF_DIVIDER, 0xff, div); div 118 drivers/clk/clk-vt8500.c u32 div = readl(cdev->div_reg) & cdev->div_mask; div 121 drivers/clk/clk-vt8500.c if ((cdev->div_mask == 0x3F) && (div & BIT(5))) div 122 drivers/clk/clk-vt8500.c div = 64 * (div & 0x1f); div 125 drivers/clk/clk-vt8500.c if (div == 0) div 126 drivers/clk/clk-vt8500.c div = (cdev->div_mask + 1); div 128 drivers/clk/clk-vt8500.c return parent_rate / div; div 325 drivers/clk/hisilicon/clk-hi3620.c u32 sam, drv, div, val; div 332 drivers/clk/hisilicon/clk-hi3620.c div = 1; div 337 drivers/clk/hisilicon/clk-hi3620.c div = 6; div 342 drivers/clk/hisilicon/clk-hi3620.c div = 6; div 347 drivers/clk/hisilicon/clk-hi3620.c div = 6; div 352 drivers/clk/hisilicon/clk-hi3620.c div = 7; div 373 drivers/clk/hisilicon/clk-hi3620.c val = mmc_clk_delay(val, div, mclk->div_off, mclk->div_bits); div 131 drivers/clk/hisilicon/clk.c clks[i].div); div 39 drivers/clk/hisilicon/clk.h unsigned long div; div 104 drivers/clk/hisilicon/clkdivider-hi6220.c struct hi6220_clk_divider *div; div 112 drivers/clk/hisilicon/clkdivider-hi6220.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 113 drivers/clk/hisilicon/clkdivider-hi6220.c if (!div) div 122 drivers/clk/hisilicon/clkdivider-hi6220.c kfree(div); div 127 drivers/clk/hisilicon/clkdivider-hi6220.c table[i].div = min_div + i; div 128 drivers/clk/hisilicon/clkdivider-hi6220.c table[i].val = table[i].div - 1; div 138 drivers/clk/hisilicon/clkdivider-hi6220.c div->reg = reg; div 139 drivers/clk/hisilicon/clkdivider-hi6220.c div->shift = shift; div 140 drivers/clk/hisilicon/clkdivider-hi6220.c div->width = width; div 141 drivers/clk/hisilicon/clkdivider-hi6220.c div->mask = mask_bit ? BIT(mask_bit) : 0; div 142 drivers/clk/hisilicon/clkdivider-hi6220.c div->lock = lock; div 143 drivers/clk/hisilicon/clkdivider-hi6220.c div->hw.init = &init; div 144 drivers/clk/hisilicon/clkdivider-hi6220.c div->table = table; div 147 drivers/clk/hisilicon/clkdivider-hi6220.c clk = clk_register(dev, &div->hw); div 150 drivers/clk/hisilicon/clkdivider-hi6220.c kfree(div); div 27 drivers/clk/imx/clk-busy.c struct clk_divider div; div 35 drivers/clk/imx/clk-busy.c struct clk_divider *div = to_clk_divider(hw); div 37 drivers/clk/imx/clk-busy.c return container_of(div, struct clk_busy_divider, div); div 45 drivers/clk/imx/clk-busy.c return busy->div_ops->recalc_rate(&busy->div.hw, parent_rate); div 53 drivers/clk/imx/clk-busy.c return busy->div_ops->round_rate(&busy->div.hw, rate, prate); div 62 drivers/clk/imx/clk-busy.c ret = busy->div_ops->set_rate(&busy->div.hw, rate, parent_rate); div 91 drivers/clk/imx/clk-busy.c busy->div.reg = reg; div 92 drivers/clk/imx/clk-busy.c busy->div.shift = shift; div 93 drivers/clk/imx/clk-busy.c busy->div.width = width; div 94 drivers/clk/imx/clk-busy.c busy->div.lock = &imx_ccm_lock; div 103 drivers/clk/imx/clk-busy.c busy->div.hw.init = &init; div 105 drivers/clk/imx/clk-busy.c hw = &busy->div.hw; div 133 drivers/clk/imx/clk-composite-8m.c struct clk_divider *div = NULL; div 147 drivers/clk/imx/clk-composite-8m.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 148 drivers/clk/imx/clk-composite-8m.c if (!div) div 151 drivers/clk/imx/clk-composite-8m.c div_hw = &div->hw; div 152 drivers/clk/imx/clk-composite-8m.c div->reg = reg; div 153 drivers/clk/imx/clk-composite-8m.c div->shift = PCG_PREDIV_SHIFT; div 154 drivers/clk/imx/clk-composite-8m.c div->width = PCG_PREDIV_WIDTH; div 155 drivers/clk/imx/clk-composite-8m.c div->lock = &imx_ccm_lock; div 156 drivers/clk/imx/clk-composite-8m.c div->flags = CLK_DIVIDER_ROUND_CLOSEST; div 178 drivers/clk/imx/clk-composite-8m.c kfree(div); div 13 drivers/clk/imx/clk-cpu.c struct clk *div; div 29 drivers/clk/imx/clk-cpu.c return clk_get_rate(cpu->div); div 61 drivers/clk/imx/clk-cpu.c clk_set_rate(cpu->div, rate); div 73 drivers/clk/imx/clk-cpu.c struct clk *div, struct clk *mux, struct clk *pll, div 85 drivers/clk/imx/clk-cpu.c cpu->div = div; div 21 drivers/clk/imx/clk-divider-gate.c struct clk_divider *div = to_clk_divider(hw); div 23 drivers/clk/imx/clk-divider-gate.c return container_of(div, struct clk_divider_gate, divider); div 29 drivers/clk/imx/clk-divider-gate.c struct clk_divider *div = to_clk_divider(hw); div 32 drivers/clk/imx/clk-divider-gate.c val = readl(div->reg) >> div->shift; div 33 drivers/clk/imx/clk-divider-gate.c val &= clk_div_mask(div->width); div 37 drivers/clk/imx/clk-divider-gate.c return divider_recalc_rate(hw, parent_rate, val, div->table, div 38 drivers/clk/imx/clk-divider-gate.c div->flags, div->width); div 45 drivers/clk/imx/clk-divider-gate.c struct clk_divider *div = to_clk_divider(hw); div 49 drivers/clk/imx/clk-divider-gate.c spin_lock_irqsave(div->lock, flags); div 54 drivers/clk/imx/clk-divider-gate.c val = readl(div->reg) >> div->shift; div 55 drivers/clk/imx/clk-divider-gate.c val &= clk_div_mask(div->width); div 58 drivers/clk/imx/clk-divider-gate.c spin_unlock_irqrestore(div->lock, flags); div 63 drivers/clk/imx/clk-divider-gate.c return divider_recalc_rate(hw, parent_rate, val, div->table, div 64 drivers/clk/imx/clk-divider-gate.c div->flags, div->width); div 77 drivers/clk/imx/clk-divider-gate.c struct clk_divider *div = to_clk_divider(hw); div 82 drivers/clk/imx/clk-divider-gate.c value = divider_get_val(rate, parent_rate, div->table, div 83 drivers/clk/imx/clk-divider-gate.c div->width, div->flags); div 87 drivers/clk/imx/clk-divider-gate.c spin_lock_irqsave(div->lock, flags); div 90 drivers/clk/imx/clk-divider-gate.c val = readl(div->reg); div 91 drivers/clk/imx/clk-divider-gate.c val &= ~(clk_div_mask(div->width) << div->shift); div 92 drivers/clk/imx/clk-divider-gate.c val |= (u32)value << div->shift; div 93 drivers/clk/imx/clk-divider-gate.c writel(val, div->reg); div 98 drivers/clk/imx/clk-divider-gate.c spin_unlock_irqrestore(div->lock, flags); div 106 drivers/clk/imx/clk-divider-gate.c struct clk_divider *div = to_clk_divider(hw); div 115 drivers/clk/imx/clk-divider-gate.c spin_lock_irqsave(div->lock, flags); div 117 drivers/clk/imx/clk-divider-gate.c val = readl(div->reg); div 118 drivers/clk/imx/clk-divider-gate.c val |= div_gate->cached_val << div->shift; div 119 drivers/clk/imx/clk-divider-gate.c writel(val, div->reg); div 121 drivers/clk/imx/clk-divider-gate.c spin_unlock_irqrestore(div->lock, flags); div 129 drivers/clk/imx/clk-divider-gate.c struct clk_divider *div = to_clk_divider(hw); div 133 drivers/clk/imx/clk-divider-gate.c spin_lock_irqsave(div->lock, flags); div 136 drivers/clk/imx/clk-divider-gate.c val = readl(div->reg) >> div->shift; div 137 drivers/clk/imx/clk-divider-gate.c val &= clk_div_mask(div->width); div 139 drivers/clk/imx/clk-divider-gate.c writel(0, div->reg); div 141 drivers/clk/imx/clk-divider-gate.c spin_unlock_irqrestore(div->lock, flags); div 146 drivers/clk/imx/clk-divider-gate.c struct clk_divider *div = to_clk_divider(hw); div 149 drivers/clk/imx/clk-divider-gate.c val = readl(div->reg) >> div->shift; div 150 drivers/clk/imx/clk-divider-gate.c val &= clk_div_mask(div->width); div 56 drivers/clk/imx/clk-fixup-div.c struct clk_divider *div = to_clk_divider(hw); div 66 drivers/clk/imx/clk-fixup-div.c if (value > div_mask(div)) div 67 drivers/clk/imx/clk-fixup-div.c value = div_mask(div); div 69 drivers/clk/imx/clk-fixup-div.c spin_lock_irqsave(div->lock, flags); div 71 drivers/clk/imx/clk-fixup-div.c val = readl(div->reg); div 72 drivers/clk/imx/clk-fixup-div.c val &= ~(div_mask(div) << div->shift); div 73 drivers/clk/imx/clk-fixup-div.c val |= value << div->shift; div 75 drivers/clk/imx/clk-fixup-div.c writel(val, div->reg); div 77 drivers/clk/imx/clk-fixup-div.c spin_unlock_irqrestore(div->lock, flags); div 95 drivers/clk/imx/clk-imx6q.c { .val = 0, .div = 20, }, div 96 drivers/clk/imx/clk-imx6q.c { .val = 1, .div = 10, }, div 97 drivers/clk/imx/clk-imx6q.c { .val = 2, .div = 5, }, div 98 drivers/clk/imx/clk-imx6q.c { .val = 3, .div = 4, }, div 103 drivers/clk/imx/clk-imx6q.c { .val = 2, .div = 1, }, div 104 drivers/clk/imx/clk-imx6q.c { .val = 1, .div = 2, }, div 105 drivers/clk/imx/clk-imx6q.c { .val = 0, .div = 4, }, div 110 drivers/clk/imx/clk-imx6q.c { .val = 0, .div = 1, }, div 111 drivers/clk/imx/clk-imx6q.c { .val = 1, .div = 2, }, div 112 drivers/clk/imx/clk-imx6q.c { .val = 2, .div = 1, }, div 113 drivers/clk/imx/clk-imx6q.c { .val = 3, .div = 4, }, div 469 drivers/clk/imx/clk-imx6q.c post_div_table[1].div = 1; div 470 drivers/clk/imx/clk-imx6q.c post_div_table[2].div = 1; div 471 drivers/clk/imx/clk-imx6q.c video_div_table[1].div = 1; div 472 drivers/clk/imx/clk-imx6q.c video_div_table[3].div = 1; div 71 drivers/clk/imx/clk-imx6sl.c { .val = 0, .div = 20, }, div 72 drivers/clk/imx/clk-imx6sl.c { .val = 1, .div = 10, }, div 73 drivers/clk/imx/clk-imx6sl.c { .val = 2, .div = 5, }, div 74 drivers/clk/imx/clk-imx6sl.c { .val = 3, .div = 4, }, div 79 drivers/clk/imx/clk-imx6sl.c { .val = 2, .div = 1, }, div 80 drivers/clk/imx/clk-imx6sl.c { .val = 1, .div = 2, }, div 81 drivers/clk/imx/clk-imx6sl.c { .val = 0, .div = 4, }, div 86 drivers/clk/imx/clk-imx6sl.c { .val = 0, .div = 1, }, div 87 drivers/clk/imx/clk-imx6sl.c { .val = 1, .div = 2, }, div 88 drivers/clk/imx/clk-imx6sl.c { .val = 2, .div = 1, }, div 89 drivers/clk/imx/clk-imx6sl.c { .val = 3, .div = 4, }, div 60 drivers/clk/imx/clk-imx6sll.c { .val = 2, .div = 1, }, div 61 drivers/clk/imx/clk-imx6sll.c { .val = 1, .div = 2, }, div 62 drivers/clk/imx/clk-imx6sll.c { .val = 0, .div = 4, }, div 67 drivers/clk/imx/clk-imx6sll.c { .val = 0, .div = 1, }, div 68 drivers/clk/imx/clk-imx6sll.c { .val = 1, .div = 2, }, div 69 drivers/clk/imx/clk-imx6sll.c { .val = 2, .div = 1, }, div 70 drivers/clk/imx/clk-imx6sll.c { .val = 3, .div = 4, }, div 88 drivers/clk/imx/clk-imx6sx.c { .val = 0, .div = 20, }, div 89 drivers/clk/imx/clk-imx6sx.c { .val = 1, .div = 10, }, div 90 drivers/clk/imx/clk-imx6sx.c { .val = 2, .div = 5, }, div 91 drivers/clk/imx/clk-imx6sx.c { .val = 3, .div = 4, }, div 96 drivers/clk/imx/clk-imx6sx.c { .val = 2, .div = 1, }, div 97 drivers/clk/imx/clk-imx6sx.c { .val = 1, .div = 2, }, div 98 drivers/clk/imx/clk-imx6sx.c { .val = 0, .div = 4, }, div 103 drivers/clk/imx/clk-imx6sx.c { .val = 0, .div = 1, }, div 104 drivers/clk/imx/clk-imx6sx.c { .val = 1, .div = 2, }, div 105 drivers/clk/imx/clk-imx6sx.c { .val = 2, .div = 1, }, div 106 drivers/clk/imx/clk-imx6sx.c { .val = 3, .div = 4, }, div 75 drivers/clk/imx/clk-imx6ul.c { .val = 0, .div = 20, }, div 76 drivers/clk/imx/clk-imx6ul.c { .val = 1, .div = 10, }, div 77 drivers/clk/imx/clk-imx6ul.c { .val = 2, .div = 5, }, div 78 drivers/clk/imx/clk-imx6ul.c { .val = 3, .div = 4, }, div 83 drivers/clk/imx/clk-imx6ul.c { .val = 2, .div = 1, }, div 84 drivers/clk/imx/clk-imx6ul.c { .val = 1, .div = 2, }, div 85 drivers/clk/imx/clk-imx6ul.c { .val = 0, .div = 4, }, div 90 drivers/clk/imx/clk-imx6ul.c { .val = 0, .div = 1, }, div 91 drivers/clk/imx/clk-imx6ul.c { .val = 1, .div = 2, }, div 92 drivers/clk/imx/clk-imx6ul.c { .val = 2, .div = 1, }, div 93 drivers/clk/imx/clk-imx6ul.c { .val = 3, .div = 4, }, div 28 drivers/clk/imx/clk-imx7d.c { .val = 3, .div = 1, }, div 29 drivers/clk/imx/clk-imx7d.c { .val = 2, .div = 1, }, div 30 drivers/clk/imx/clk-imx7d.c { .val = 1, .div = 2, }, div 31 drivers/clk/imx/clk-imx7d.c { .val = 0, .div = 4, }, div 36 drivers/clk/imx/clk-imx7d.c { .val = 3, .div = 4, }, div 37 drivers/clk/imx/clk-imx7d.c { .val = 2, .div = 1, }, div 38 drivers/clk/imx/clk-imx7d.c { .val = 1, .div = 2, }, div 39 drivers/clk/imx/clk-imx7d.c { .val = 0, .div = 1, }, div 36 drivers/clk/imx/clk-imx7ulp.c { .val = 1, .div = 1, }, div 37 drivers/clk/imx/clk-imx7ulp.c { .val = 2, .div = 2, }, div 38 drivers/clk/imx/clk-imx7ulp.c { .val = 3, .div = 4, }, div 39 drivers/clk/imx/clk-imx7ulp.c { .val = 4, .div = 8, }, div 40 drivers/clk/imx/clk-imx7ulp.c { .val = 5, .div = 16, }, div 41 drivers/clk/imx/clk-imx7ulp.c { .val = 6, .div = 32, }, div 42 drivers/clk/imx/clk-imx7ulp.c { .val = 7, .div = 64, }, div 117 drivers/clk/imx/clk-pllv3.c u32 div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask; div 119 drivers/clk/imx/clk-pllv3.c return (div == 1) ? parent_rate * 22 : parent_rate * 20; div 135 drivers/clk/imx/clk-pllv3.c u32 val, div; div 138 drivers/clk/imx/clk-pllv3.c div = 1; div 140 drivers/clk/imx/clk-pllv3.c div = 0; div 146 drivers/clk/imx/clk-pllv3.c val |= (div << pll->div_shift); div 165 drivers/clk/imx/clk-pllv3.c u32 div = readl_relaxed(pll->base) & pll->div_mask; div 167 drivers/clk/imx/clk-pllv3.c return parent_rate * div / 2; div 176 drivers/clk/imx/clk-pllv3.c u32 div; div 182 drivers/clk/imx/clk-pllv3.c div = rate * 2 / parent_rate; div 184 drivers/clk/imx/clk-pllv3.c return parent_rate * div / 2; div 193 drivers/clk/imx/clk-pllv3.c u32 val, div; div 198 drivers/clk/imx/clk-pllv3.c div = rate * 2 / parent_rate; div 201 drivers/clk/imx/clk-pllv3.c val |= div; div 222 drivers/clk/imx/clk-pllv3.c u32 div = readl_relaxed(pll->base) & pll->div_mask; div 228 drivers/clk/imx/clk-pllv3.c return parent_rate * div + (unsigned long)temp64; div 237 drivers/clk/imx/clk-pllv3.c u32 div; div 250 drivers/clk/imx/clk-pllv3.c div = rate / parent_rate; div 251 drivers/clk/imx/clk-pllv3.c temp64 = (u64) (rate - div * parent_rate); div 260 drivers/clk/imx/clk-pllv3.c return parent_rate * div + (unsigned long)temp64; div 269 drivers/clk/imx/clk-pllv3.c u32 val, div; div 280 drivers/clk/imx/clk-pllv3.c div = rate / parent_rate; div 281 drivers/clk/imx/clk-pllv3.c temp64 = (u64) (rate - div * parent_rate); div 288 drivers/clk/imx/clk-pllv3.c val |= div; div 101 drivers/clk/imx/clk-vf610.c { .val = 0, .div = 1 }, div 102 drivers/clk/imx/clk-vf610.c { .val = 1, .div = 2 }, div 103 drivers/clk/imx/clk-vf610.c { .val = 2, .div = 6 }, div 104 drivers/clk/imx/clk-vf610.c { .val = 3, .div = 8 }, div 105 drivers/clk/imx/clk-vf610.c { .val = 4, .div = 10 }, div 106 drivers/clk/imx/clk-vf610.c { .val = 5, .div = 12 }, div 107 drivers/clk/imx/clk-vf610.c { .val = 6, .div = 14 }, div 108 drivers/clk/imx/clk-vf610.c { .val = 7, .div = 16 }, div 53 drivers/clk/imx/clk.h #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \ div 54 drivers/clk/imx/clk.h to_clk(imx_clk_hw_cpu(name, parent_name, div, mux, pll, step)) div 70 drivers/clk/imx/clk.h #define imx_clk_fixed_factor(name, parent, mult, div) \ div 71 drivers/clk/imx/clk.h to_clk(imx_clk_hw_fixed_factor(name, parent, mult, div)) div 225 drivers/clk/imx/clk.h const char *parent, unsigned int mult, unsigned int div) div 228 drivers/clk/imx/clk.h CLK_SET_RATE_PARENT, mult, div); div 450 drivers/clk/imx/clk.h struct clk *div, struct clk *mux, struct clk *pll, div 370 drivers/clk/ingenic/cgu.c u32 div_reg, div; div 375 drivers/clk/ingenic/cgu.c div_reg = readl(cgu->base + clk_info->div.reg); div 376 drivers/clk/ingenic/cgu.c div = (div_reg >> clk_info->div.shift) & div 377 drivers/clk/ingenic/cgu.c GENMASK(clk_info->div.bits - 1, 0); div 379 drivers/clk/ingenic/cgu.c if (clk_info->div.div_table) div 380 drivers/clk/ingenic/cgu.c div = clk_info->div.div_table[div]; div 382 drivers/clk/ingenic/cgu.c div = (div + 1) * clk_info->div.div; div 384 drivers/clk/ingenic/cgu.c rate /= div; div 386 drivers/clk/ingenic/cgu.c rate /= clk_info->fixdiv.div; div 394 drivers/clk/ingenic/cgu.c unsigned int div) div 398 drivers/clk/ingenic/cgu.c for (i = 0; i < (1 << clk_info->div.bits) div 399 drivers/clk/ingenic/cgu.c && clk_info->div.div_table[i]; i++) { div 400 drivers/clk/ingenic/cgu.c if (clk_info->div.div_table[i] >= div) div 411 drivers/clk/ingenic/cgu.c unsigned int div, hw_div; div 414 drivers/clk/ingenic/cgu.c div = DIV_ROUND_UP(parent_rate, req_rate); div 416 drivers/clk/ingenic/cgu.c if (clk_info->div.div_table) { div 417 drivers/clk/ingenic/cgu.c hw_div = ingenic_clk_calc_hw_div(clk_info, div); div 419 drivers/clk/ingenic/cgu.c return clk_info->div.div_table[hw_div]; div 423 drivers/clk/ingenic/cgu.c div = min_t(unsigned, div, 1 << clk_info->div.bits); div 424 drivers/clk/ingenic/cgu.c div = max_t(unsigned, div, 1); div 431 drivers/clk/ingenic/cgu.c div /= clk_info->div.div; div 432 drivers/clk/ingenic/cgu.c div *= clk_info->div.div; div 434 drivers/clk/ingenic/cgu.c return div; div 444 drivers/clk/ingenic/cgu.c unsigned int div = 1; div 449 drivers/clk/ingenic/cgu.c div = ingenic_clk_calc_div(clk_info, *parent_rate, req_rate); div 451 drivers/clk/ingenic/cgu.c div = clk_info->fixdiv.div; div 453 drivers/clk/ingenic/cgu.c return DIV_ROUND_UP(*parent_rate, div); div 465 drivers/clk/ingenic/cgu.c unsigned int hw_div, div, i; div 472 drivers/clk/ingenic/cgu.c div = ingenic_clk_calc_div(clk_info, parent_rate, req_rate); div 473 drivers/clk/ingenic/cgu.c rate = DIV_ROUND_UP(parent_rate, div); div 478 drivers/clk/ingenic/cgu.c if (clk_info->div.div_table) div 479 drivers/clk/ingenic/cgu.c hw_div = ingenic_clk_calc_hw_div(clk_info, div); div 481 drivers/clk/ingenic/cgu.c hw_div = ((div / clk_info->div.div) - 1); div 484 drivers/clk/ingenic/cgu.c reg = readl(cgu->base + clk_info->div.reg); div 487 drivers/clk/ingenic/cgu.c mask = GENMASK(clk_info->div.bits - 1, 0); div 488 drivers/clk/ingenic/cgu.c reg &= ~(mask << clk_info->div.shift); div 489 drivers/clk/ingenic/cgu.c reg |= hw_div << clk_info->div.shift; div 492 drivers/clk/ingenic/cgu.c if (clk_info->div.stop_bit != -1) div 493 drivers/clk/ingenic/cgu.c reg &= ~BIT(clk_info->div.stop_bit); div 496 drivers/clk/ingenic/cgu.c if (clk_info->div.ce_bit != -1) div 497 drivers/clk/ingenic/cgu.c reg |= BIT(clk_info->div.ce_bit); div 500 drivers/clk/ingenic/cgu.c writel(reg, cgu->base + clk_info->div.reg); div 503 drivers/clk/ingenic/cgu.c if (clk_info->div.busy_bit != -1) { div 505 drivers/clk/ingenic/cgu.c reg = readl(cgu->base + clk_info->div.reg); div 506 drivers/clk/ingenic/cgu.c if (!(reg & BIT(clk_info->div.busy_bit))) div 89 drivers/clk/ingenic/cgu.h u8 div; div 102 drivers/clk/ingenic/cgu.h unsigned div; div 164 drivers/clk/ingenic/cgu.h struct ingenic_cgu_div_info div; div 78 drivers/clk/ingenic/jz4725b-cgu.c .div = { div 87 drivers/clk/ingenic/jz4725b-cgu.c .div = { div 96 drivers/clk/ingenic/jz4725b-cgu.c .div = { div 105 drivers/clk/ingenic/jz4725b-cgu.c .div = { div 114 drivers/clk/ingenic/jz4725b-cgu.c .div = { div 123 drivers/clk/ingenic/jz4725b-cgu.c .div = { div 133 drivers/clk/ingenic/jz4725b-cgu.c .div = { CGU_REG_LPCDR, 0, 1, 11, -1, -1, -1 }, div 141 drivers/clk/ingenic/jz4725b-cgu.c .div = { CGU_REG_I2SCDR, 0, 1, 9, -1, -1, -1 }, div 149 drivers/clk/ingenic/jz4725b-cgu.c .div = { CGU_REG_SSICDR, 0, 1, 4, -1, -1, -1 }, div 156 drivers/clk/ingenic/jz4725b-cgu.c .div = { CGU_REG_MSCCDR, 0, 1, 5, -1, -1, -1 }, div 163 drivers/clk/ingenic/jz4725b-cgu.c .div = { CGU_REG_CPCCR, 23, 1, 6, -1, -1, -1 }, div 93 drivers/clk/ingenic/jz4740-cgu.c .div = { div 102 drivers/clk/ingenic/jz4740-cgu.c .div = { div 111 drivers/clk/ingenic/jz4740-cgu.c .div = { div 120 drivers/clk/ingenic/jz4740-cgu.c .div = { div 129 drivers/clk/ingenic/jz4740-cgu.c .div = { div 138 drivers/clk/ingenic/jz4740-cgu.c .div = { div 148 drivers/clk/ingenic/jz4740-cgu.c .div = { CGU_REG_LPCDR, 0, 1, 11, -1, -1, -1 }, div 155 drivers/clk/ingenic/jz4740-cgu.c .div = { CGU_REG_I2SCDR, 0, 1, 9, -1, -1, -1 }, div 163 drivers/clk/ingenic/jz4740-cgu.c .div = { CGU_REG_SSICDR, 0, 1, 4, -1, -1, -1 }, div 170 drivers/clk/ingenic/jz4740-cgu.c .div = { CGU_REG_MSCCDR, 0, 1, 5, -1, -1, -1 }, div 177 drivers/clk/ingenic/jz4740-cgu.c .div = { CGU_REG_UHCCDR, 0, 1, 4, -1, -1, -1 }, div 185 drivers/clk/ingenic/jz4740-cgu.c .div = { CGU_REG_CPCCR, 23, 1, 6, -1, -1, -1 }, div 148 drivers/clk/ingenic/jz4770-cgu.c .div = { div 156 drivers/clk/ingenic/jz4770-cgu.c .div = { div 164 drivers/clk/ingenic/jz4770-cgu.c .div = { div 173 drivers/clk/ingenic/jz4770-cgu.c .div = { div 181 drivers/clk/ingenic/jz4770-cgu.c .div = { div 190 drivers/clk/ingenic/jz4770-cgu.c .div = { div 202 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_MSC0CDR, 0, 1, 7, -1, -1, 31 }, div 209 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_MSC1CDR, 0, 1, 7, -1, -1, 31 }, div 216 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_MSC2CDR, 0, 1, 7, -1, -1, 31 }, div 223 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_CIMCDR, 0, 1, 8, -1, -1, -1 }, div 230 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_UHCCDR, 0, 1, 4, -1, -1, -1 }, div 237 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_GPUCDR, 0, 1, 3, -1, -1, -1 }, div 244 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_BCHCDR, 0, 1, 3, -1, -1, -1 }, div 251 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_LPCDR, 0, 1, 11, -1, -1, -1 }, div 258 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_GPSCDR, 0, 1, 4, -1, -1, -1 }, div 269 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_SSICDR, 0, 1, 6, -1, -1, -1 }, div 276 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_PCMCDR, 0, 1, 9, -1, -1, -1 }, div 283 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_I2SCDR, 0, 1, 9, -1, -1, -1 }, div 291 drivers/clk/ingenic/jz4770-cgu.c .div = { CGU_REG_USBCDR, 0, 1, 8, -1, -1, -1 }, div 292 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_CLOCKCONTROL, 0, 1, 4, 22, -1, -1 }, div 298 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_CLOCKCONTROL, 4, 1, 4, -1, -1, -1 }, div 306 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_CLOCKCONTROL, 8, 1, 4, 21, -1, -1 }, div 319 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_CLOCKCONTROL, 12, 1, 4, 20, -1, -1 }, div 325 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_CLOCKCONTROL, 16, 1, 4, 20, -1, -1 }, div 332 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_DDRCDR, 0, 1, 4, 29, 28, 27 }, div 340 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_VPUCDR, 0, 1, 4, 29, 28, 27 }, div 348 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_I2SCDR, 0, 1, 8, 29, 28, 27 }, div 362 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_LP0CDR, 0, 1, 8, 28, 27, 26 }, div 370 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_LP1CDR, 0, 1, 8, 28, 27, 26 }, div 382 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_MSC0CDR, 0, 2, 8, 29, 28, 27 }, div 389 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_MSC1CDR, 0, 2, 8, 29, 28, 27 }, div 396 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_MSC2CDR, 0, 2, 8, 29, 28, 27 }, div 405 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_UHCCDR, 0, 1, 8, 29, 28, 27 }, div 413 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_SSICDR, 0, 1, 8, 29, 28, 27 }, div 426 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_CIMCDR, 0, 1, 8, 30, 29, 28 }, div 434 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_PCMCDR, 0, 1, 8, 28, 27, 26 }, div 449 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_GPUCDR, 0, 1, 4, 29, 28, 27 }, div 458 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_HDMICDR, 0, 1, 8, 29, 28, 26 }, div 467 drivers/clk/ingenic/jz4780-cgu.c .div = { CGU_REG_BCHCDR, 0, 1, 4, 29, 28, 27 }, div 36 drivers/clk/loongson1/clk-loongson1c.c [0] = { .val = 0, .div = 2 }, div 37 drivers/clk/loongson1/clk-loongson1c.c [1] = { .val = 1, .div = 4 }, div 38 drivers/clk/loongson1/clk-loongson1c.c [2] = { .val = 2, .div = 3 }, div 39 drivers/clk/loongson1/clk-loongson1c.c [3] = { .val = 3, .div = 3 }, div 1198 drivers/clk/mediatek/clk-mt2712.c { .div = 0, .freq = MT2712_PLL_FMAX }, div 1199 drivers/clk/mediatek/clk-mt2712.c { .div = 1, .freq = 1202500000 }, div 1200 drivers/clk/mediatek/clk-mt2712.c { .div = 2, .freq = 500500000 }, div 1201 drivers/clk/mediatek/clk-mt2712.c { .div = 3, .freq = 315250000 }, div 1202 drivers/clk/mediatek/clk-mt2712.c { .div = 4, .freq = 157625000 }, div 1207 drivers/clk/mediatek/clk-mt2712.c { .div = 0, .freq = MT2712_PLL_FMAX }, div 1208 drivers/clk/mediatek/clk-mt2712.c { .div = 1, .freq = 994500000 }, div 1209 drivers/clk/mediatek/clk-mt2712.c { .div = 2, .freq = 520000000 }, div 1210 drivers/clk/mediatek/clk-mt2712.c { .div = 3, .freq = 315250000 }, div 1211 drivers/clk/mediatek/clk-mt2712.c { .div = 4, .freq = 157625000 }, div 1216 drivers/clk/mediatek/clk-mt2712.c { .div = 0, .freq = MT2712_PLL_FMAX }, div 1217 drivers/clk/mediatek/clk-mt2712.c { .div = 1, .freq = 1001000000 }, div 1218 drivers/clk/mediatek/clk-mt2712.c { .div = 2, .freq = 601250000 }, div 1219 drivers/clk/mediatek/clk-mt2712.c { .div = 3, .freq = 250250000 }, div 1220 drivers/clk/mediatek/clk-mt2712.c { .div = 4, .freq = 125125000 }, div 1053 drivers/clk/mediatek/clk-mt8173.c { .div = 0, .freq = MT8173_PLL_FMAX }, div 1054 drivers/clk/mediatek/clk-mt8173.c { .div = 1, .freq = 1000000000 }, div 1055 drivers/clk/mediatek/clk-mt8173.c { .div = 2, .freq = 702000000 }, div 1056 drivers/clk/mediatek/clk-mt8173.c { .div = 3, .freq = 253500000 }, div 1057 drivers/clk/mediatek/clk-mt8173.c { .div = 4, .freq = 126750000 }, div 1106 drivers/clk/mediatek/clk-mt8183.c { .div = 0, .freq = MT8183_PLL_FMAX }, div 1107 drivers/clk/mediatek/clk-mt8183.c { .div = 1, .freq = 1500 * MHZ }, div 1108 drivers/clk/mediatek/clk-mt8183.c { .div = 2, .freq = 750 * MHZ }, div 1109 drivers/clk/mediatek/clk-mt8183.c { .div = 3, .freq = 375 * MHZ }, div 1110 drivers/clk/mediatek/clk-mt8183.c { .div = 4, .freq = 187500000 }, div 1115 drivers/clk/mediatek/clk-mt8183.c { .div = 0, .freq = MT8183_PLL_FMAX }, div 1116 drivers/clk/mediatek/clk-mt8183.c { .div = 1, .freq = 1600 * MHZ }, div 1117 drivers/clk/mediatek/clk-mt8183.c { .div = 2, .freq = 800 * MHZ }, div 1118 drivers/clk/mediatek/clk-mt8183.c { .div = 3, .freq = 400 * MHZ }, div 1119 drivers/clk/mediatek/clk-mt8183.c { .div = 4, .freq = 200 * MHZ }, div 764 drivers/clk/mediatek/clk-mt8516.c { .div = 0, .freq = MT8516_PLL_FMAX }, div 765 drivers/clk/mediatek/clk-mt8516.c { .div = 1, .freq = 1000000000 }, div 766 drivers/clk/mediatek/clk-mt8516.c { .div = 2, .freq = 604500000 }, div 767 drivers/clk/mediatek/clk-mt8516.c { .div = 3, .freq = 253500000 }, div 768 drivers/clk/mediatek/clk-mt8516.c { .div = 4, .freq = 126750000 }, div 84 drivers/clk/mediatek/clk-mtk.c CLK_SET_RATE_PARENT, ff->mult, ff->div); div 155 drivers/clk/mediatek/clk-mtk.c struct clk_divider *div = NULL; div 201 drivers/clk/mediatek/clk-mtk.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 202 drivers/clk/mediatek/clk-mtk.c if (!div) { div 207 drivers/clk/mediatek/clk-mtk.c div->reg = base + mc->divider_reg; div 208 drivers/clk/mediatek/clk-mtk.c div->shift = mc->divider_shift; div 209 drivers/clk/mediatek/clk-mtk.c div->width = mc->divider_width; div 210 drivers/clk/mediatek/clk-mtk.c div->lock = lock; div 212 drivers/clk/mediatek/clk-mtk.c div_hw = &div->hw; div 229 drivers/clk/mediatek/clk-mtk.c kfree(div); div 44 drivers/clk/mediatek/clk-mtk.h int div; div 52 drivers/clk/mediatek/clk-mtk.h .div = _div, \ div 209 drivers/clk/mediatek/clk-mtk.h u32 div; div 202 drivers/clk/meson/axg-audio.c .div = { \ div 325 drivers/clk/meson/axg.c .div = 2, div 352 drivers/clk/meson/axg.c .div = 3, div 390 drivers/clk/meson/axg.c .div = 4, div 416 drivers/clk/meson/axg.c .div = 5, div 442 drivers/clk/meson/axg.c .div = 7, div 26 drivers/clk/meson/clk-cpu-dyndiv.c meson_parm_read(clk->map, &data->div), div 27 drivers/clk/meson/clk-cpu-dyndiv.c NULL, 0, data->div.width); div 37 drivers/clk/meson/clk-cpu-dyndiv.c return divider_round_rate(hw, rate, prate, NULL, data->div.width, 0); div 48 drivers/clk/meson/clk-cpu-dyndiv.c ret = divider_get_val(rate, parent_rate, NULL, data->div.width, 0); div 52 drivers/clk/meson/clk-cpu-dyndiv.c val = (unsigned int)ret << data->div.shift; div 58 drivers/clk/meson/clk-cpu-dyndiv.c return regmap_update_bits(clk->map, data->div.reg_off, div 59 drivers/clk/meson/clk-cpu-dyndiv.c SETPMASK(data->div.width, data->div.shift) | div 14 drivers/clk/meson/clk-cpu-dyndiv.h struct parm div; div 49 drivers/clk/meson/clk-mpll.c uint64_t div = parent_rate; div 50 drivers/clk/meson/clk-mpll.c uint64_t frac = do_div(div, requested_rate); div 61 drivers/clk/meson/clk-mpll.c div += 1; div 64 drivers/clk/meson/clk-mpll.c if (div < N2_MIN) { div 67 drivers/clk/meson/clk-mpll.c } else if (div > N2_MAX) { div 71 drivers/clk/meson/clk-mpll.c *n2 = div; div 63 drivers/clk/meson/clk-regmap.c struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk); div 67 drivers/clk/meson/clk-regmap.c ret = regmap_read(clk->map, div->offset, &val); div 72 drivers/clk/meson/clk-regmap.c val >>= div->shift; div 73 drivers/clk/meson/clk-regmap.c val &= clk_div_mask(div->width); div 74 drivers/clk/meson/clk-regmap.c return divider_recalc_rate(hw, prate, val, div->table, div->flags, div 75 drivers/clk/meson/clk-regmap.c div->width); div 82 drivers/clk/meson/clk-regmap.c struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk); div 87 drivers/clk/meson/clk-regmap.c if (div->flags & CLK_DIVIDER_READ_ONLY) { div 88 drivers/clk/meson/clk-regmap.c ret = regmap_read(clk->map, div->offset, &val); div 93 drivers/clk/meson/clk-regmap.c val >>= div->shift; div 94 drivers/clk/meson/clk-regmap.c val &= clk_div_mask(div->width); div 96 drivers/clk/meson/clk-regmap.c return divider_ro_round_rate(hw, rate, prate, div->table, div 97 drivers/clk/meson/clk-regmap.c div->width, div->flags, val); div 100 drivers/clk/meson/clk-regmap.c return divider_round_rate(hw, rate, prate, div->table, div->width, div 101 drivers/clk/meson/clk-regmap.c div->flags); div 108 drivers/clk/meson/clk-regmap.c struct clk_regmap_div_data *div = clk_get_regmap_div_data(clk); div 112 drivers/clk/meson/clk-regmap.c ret = divider_get_val(rate, parent_rate, div->table, div->width, div 113 drivers/clk/meson/clk-regmap.c div->flags); div 117 drivers/clk/meson/clk-regmap.c val = (unsigned int)ret << div->shift; div 118 drivers/clk/meson/clk-regmap.c return regmap_update_bits(clk->map, div->offset, div 119 drivers/clk/meson/clk-regmap.c clk_div_mask(div->width) << div->shift, val); div 254 drivers/clk/meson/g12a.c .div = 16, div 267 drivers/clk/meson/g12a.c .div = 16, div 280 drivers/clk/meson/g12a.c .div = 2, div 306 drivers/clk/meson/g12a.c .div = 3, div 385 drivers/clk/meson/g12a.c .div = { div 548 drivers/clk/meson/g12a.c .div = { div 1159 drivers/clk/meson/g12a.c .div = 16, div 1172 drivers/clk/meson/g12a.c .div = 16, div 1331 drivers/clk/meson/g12a.c .div = 2, div 1344 drivers/clk/meson/g12a.c .div = 3, div 1357 drivers/clk/meson/g12a.c .div = 4, div 1370 drivers/clk/meson/g12a.c .div = 5, div 1383 drivers/clk/meson/g12a.c .div = 6, div 1396 drivers/clk/meson/g12a.c .div = 7, div 1409 drivers/clk/meson/g12a.c .div = 8, div 1890 drivers/clk/meson/g12a.c .div = 2, div 1924 drivers/clk/meson/g12a.c .div = 2, div 2040 drivers/clk/meson/g12a.c .div = 4, div 2066 drivers/clk/meson/g12a.c .div = 5, div 2092 drivers/clk/meson/g12a.c .div = 7, div 2118 drivers/clk/meson/g12a.c .div = 5, div 2146 drivers/clk/meson/g12a.c .div = 80, div 2176 drivers/clk/meson/g12a.c .div = 2, div 3390 drivers/clk/meson/g12a.c .div = 2, div 3403 drivers/clk/meson/g12a.c .div = 4, div 3416 drivers/clk/meson/g12a.c .div = 6, div 3429 drivers/clk/meson/g12a.c .div = 12, div 3442 drivers/clk/meson/g12a.c .div = 2, div 3455 drivers/clk/meson/g12a.c .div = 4, div 3468 drivers/clk/meson/g12a.c .div = 6, div 3481 drivers/clk/meson/g12a.c .div = 12, div 151 drivers/clk/meson/gxbb.c .div = 1, div 557 drivers/clk/meson/gxbb.c .div = 2, div 586 drivers/clk/meson/gxbb.c .div = 3, div 624 drivers/clk/meson/gxbb.c .div = 4, div 650 drivers/clk/meson/gxbb.c .div = 5, div 676 drivers/clk/meson/gxbb.c .div = 7, div 2093 drivers/clk/meson/gxbb.c .div = 2, div 2106 drivers/clk/meson/gxbb.c .div = 4, div 2119 drivers/clk/meson/gxbb.c .div = 6, div 2132 drivers/clk/meson/gxbb.c .div = 12, div 2145 drivers/clk/meson/gxbb.c .div = 2, div 2158 drivers/clk/meson/gxbb.c .div = 4, div 2171 drivers/clk/meson/gxbb.c .div = 6, div 2184 drivers/clk/meson/gxbb.c .div = 12, div 267 drivers/clk/meson/meson8b.c .div = 2, div 302 drivers/clk/meson/meson8b.c .div = 3, div 330 drivers/clk/meson/meson8b.c .div = 4, div 358 drivers/clk/meson/meson8b.c .div = 5, div 386 drivers/clk/meson/meson8b.c .div = 7, div 646 drivers/clk/meson/meson8b.c .div = 2, div 660 drivers/clk/meson/meson8b.c .div = 3, div 673 drivers/clk/meson/meson8b.c { .val = 1, .div = 4 }, div 674 drivers/clk/meson/meson8b.c { .val = 2, .div = 6 }, div 675 drivers/clk/meson/meson8b.c { .val = 3, .div = 8 }, div 676 drivers/clk/meson/meson8b.c { .val = 4, .div = 10 }, div 677 drivers/clk/meson/meson8b.c { .val = 5, .div = 12 }, div 678 drivers/clk/meson/meson8b.c { .val = 6, .div = 14 }, div 679 drivers/clk/meson/meson8b.c { .val = 7, .div = 16 }, div 680 drivers/clk/meson/meson8b.c { .val = 8, .div = 18 }, div 809 drivers/clk/meson/meson8b.c .div = 2, div 822 drivers/clk/meson/meson8b.c .div = 3, div 835 drivers/clk/meson/meson8b.c .div = 4, div 848 drivers/clk/meson/meson8b.c .div = 5, div 861 drivers/clk/meson/meson8b.c .div = 6, div 874 drivers/clk/meson/meson8b.c .div = 7, div 887 drivers/clk/meson/meson8b.c .div = 8, div 1226 drivers/clk/meson/meson8b.c .div = 2, div 1256 drivers/clk/meson/meson8b.c .div = 4, div 1286 drivers/clk/meson/meson8b.c .div = 6, div 1316 drivers/clk/meson/meson8b.c .div = 12, div 1393 drivers/clk/meson/meson8b.c .div = 2, div 1423 drivers/clk/meson/meson8b.c .div = 4, div 1453 drivers/clk/meson/meson8b.c .div = 6, div 1483 drivers/clk/meson/meson8b.c .div = 12, div 33 drivers/clk/meson/sclk-div.c return (1 << sclk->div.width) - 1; div 44 drivers/clk/meson/sclk-div.c int div = DIV_ROUND_CLOSEST_ULL((u64)prate, rate); div 46 drivers/clk/meson/sclk-div.c return clamp(div, 2, maxdiv); div 104 drivers/clk/meson/sclk-div.c int div; div 106 drivers/clk/meson/sclk-div.c div = sclk_div_bestdiv(hw, rate, prate, sclk); div 108 drivers/clk/meson/sclk-div.c return DIV_ROUND_UP_ULL((u64)*prate, div); div 163 drivers/clk/meson/sclk-div.c meson_parm_write(clk->map, &sclk->div, sclk->cached_div - 1); div 205 drivers/clk/meson/sclk-div.c meson_parm_write(clk->map, &sclk->div, 0); div 213 drivers/clk/meson/sclk-div.c if (meson_parm_read(clk->map, &sclk->div)) div 225 drivers/clk/meson/sclk-div.c val = meson_parm_read(clk->map, &sclk->div); div 14 drivers/clk/meson/sclk-div.h struct parm div; div 80 drivers/clk/meson/vid-pll-div.c const struct vid_pll_div *div; div 82 drivers/clk/meson/vid-pll-div.c div = _get_table_val(meson_parm_read(clk->map, &pll_div->val), div 84 drivers/clk/meson/vid-pll-div.c if (!div || !div->divider) { div 89 drivers/clk/meson/vid-pll-div.c return DIV_ROUND_UP_ULL(parent_rate * div->multiplier, div->divider); div 125 drivers/clk/microchip/clk-core.c unsigned long div, div_up; div 131 drivers/clk/microchip/clk-core.c div = parent_rate / rate; div 132 drivers/clk/microchip/clk-core.c div = clamp_val(div, divider_min, divider_max); div 133 drivers/clk/microchip/clk-core.c div_up = clamp_val(div + 1, divider_min, divider_max); div 135 drivers/clk/microchip/clk-core.c divided_rate = parent_rate / div; div 170 drivers/clk/microchip/clk-core.c u32 v, div; div 180 drivers/clk/microchip/clk-core.c div = DIV_ROUND_CLOSEST(parent_rate, rate); div 187 drivers/clk/microchip/clk-core.c v |= (div - 1); div 202 drivers/clk/microchip/clk-core.c return (pbclk_read_pbdiv(pb) == div) ? 0 : -EBUSY; div 319 drivers/clk/microchip/clk-core.c u32 div, rotrim, rodiv; div 334 drivers/clk/microchip/clk-core.c div = 0; div 339 drivers/clk/microchip/clk-core.c div = parent_rate / (rate << 1); div 343 drivers/clk/microchip/clk-core.c frac -= (u64)(div << 9); div 345 drivers/clk/microchip/clk-core.c rodiv = (div > REFO_DIV_MASK) ? REFO_DIV_MASK : div; div 601 drivers/clk/microchip/clk-core.c u32 mul, div, best_mul = 1, best_div = 1; div 609 drivers/clk/microchip/clk-core.c for (div = PLL_ODIV_MIN; div <= PLL_ODIV_MAX; div++) { div 612 drivers/clk/microchip/clk-core.c do_div(rate64, 1 << div); div 619 drivers/clk/microchip/clk-core.c best_div = div; div 647 drivers/clk/microchip/clk-core.c u32 mult, odiv, div, v; div 653 drivers/clk/microchip/clk-core.c div = spll_odiv_to_divider(odiv); div 661 drivers/clk/microchip/clk-core.c do_div(rate64, div); div 773 drivers/clk/microchip/clk-core.c u32 div; div 775 drivers/clk/microchip/clk-core.c div = (readl(sclk->slew_reg) >> SLEW_SYSDIV_SHIFT) & SLEW_SYSDIV; div 776 drivers/clk/microchip/clk-core.c div += 1; /* sys-div to divider */ div 778 drivers/clk/microchip/clk-core.c return parent_rate / div; div 792 drivers/clk/microchip/clk-core.c u32 v, div; div 795 drivers/clk/microchip/clk-core.c div = parent_rate / rate; div 802 drivers/clk/microchip/clk-core.c v |= (div - 1) << SLEW_SYSDIV_SHIFT; div 38 drivers/clk/mmp/clk-mix.c for (clkt = mix->div_table; clkt->div; clkt++) div 39 drivers/clk/mmp/clk-mix.c if (clkt->div > maxdiv) div 40 drivers/clk/mmp/clk-mix.c maxdiv = clkt->div; div 55 drivers/clk/mmp/clk-mix.c for (clkt = mix->div_table; clkt->div; clkt++) div 57 drivers/clk/mmp/clk-mix.c return clkt->div; div 58 drivers/clk/mmp/clk-mix.c if (clkt->div == 0) div 83 drivers/clk/mmp/clk-mix.c static unsigned int _get_div_val(struct mmp_clk_mix *mix, unsigned int div) div 88 drivers/clk/mmp/clk-mix.c return div; div 90 drivers/clk/mmp/clk-mix.c return __ffs(div); div 92 drivers/clk/mmp/clk-mix.c for (clkt = mix->div_table; clkt->div; clkt++) div 93 drivers/clk/mmp/clk-mix.c if (clkt->div == div) div 95 drivers/clk/mmp/clk-mix.c if (clkt->div == 0) div 99 drivers/clk/mmp/clk-mix.c return div - 1; div 213 drivers/clk/mmp/clk-mix.c unsigned int div; div 247 drivers/clk/mmp/clk-mix.c div = _get_div(mix, j); div 248 drivers/clk/mmp/clk-mix.c mix_rate = parent_rate / div; div 279 drivers/clk/mmp/clk-mix.c unsigned int div; div 282 drivers/clk/mmp/clk-mix.c div = parent_rate / rate; div 283 drivers/clk/mmp/clk-mix.c div_val = _get_div_val(mix, div); div 326 drivers/clk/mmp/clk-mix.c unsigned int div; div 343 drivers/clk/mmp/clk-mix.c div = _get_div(mix, MMP_CLK_BITS_GET_VAL(mux_div, width, shift)); div 345 drivers/clk/mmp/clk-mix.c return parent_rate / div; div 59 drivers/clk/mmp/clk.c clks[i].div); div 159 drivers/clk/mmp/clk.h unsigned long div; div 114 drivers/clk/mvebu/armada-370.c void __iomem *sar, int id, int *mult, int *div) div 122 drivers/clk/mvebu/armada-370.c *div = a370_nbclk_ratios[opt][1]; div 126 drivers/clk/mvebu/armada-370.c *div = a370_hclk_ratios[opt][1]; div 130 drivers/clk/mvebu/armada-370.c *div = a370_dramclk_ratios[opt][1]; div 115 drivers/clk/mvebu/armada-375.c void __iomem *sar, int id, int *mult, int *div) div 123 drivers/clk/mvebu/armada-375.c *div = armada_375_cpu_l2_ratios[opt][1]; div 127 drivers/clk/mvebu/armada-375.c *div = armada_375_cpu_ddr_ratios[opt][1]; div 104 drivers/clk/mvebu/armada-37xx-periph.c { .val = 1, .div = 1, }, div 105 drivers/clk/mvebu/armada-37xx-periph.c { .val = 2, .div = 2, }, div 106 drivers/clk/mvebu/armada-37xx-periph.c { .val = 3, .div = 3, }, div 107 drivers/clk/mvebu/armada-37xx-periph.c { .val = 4, .div = 4, }, div 108 drivers/clk/mvebu/armada-37xx-periph.c { .val = 5, .div = 5, }, div 109 drivers/clk/mvebu/armada-37xx-periph.c { .val = 6, .div = 6, }, div 110 drivers/clk/mvebu/armada-37xx-periph.c { .val = 0, .div = 0, }, /* last entry */ div 114 drivers/clk/mvebu/armada-37xx-periph.c { .val = 0, .div = 1, }, div 115 drivers/clk/mvebu/armada-37xx-periph.c { .val = 1, .div = 2, }, div 116 drivers/clk/mvebu/armada-37xx-periph.c { .val = 0, .div = 0, }, /* last entry */ div 120 drivers/clk/mvebu/armada-37xx-periph.c { .val = 0, .div = 2, }, div 121 drivers/clk/mvebu/armada-37xx-periph.c { .val = 1, .div = 4, }, div 122 drivers/clk/mvebu/armada-37xx-periph.c { .val = 0, .div = 0, }, /* last entry */ div 338 drivers/clk/mvebu/armada-37xx-periph.c unsigned int div; div 340 drivers/clk/mvebu/armada-37xx-periph.c div = get_div(double_div->reg1, double_div->shift1); div 341 drivers/clk/mvebu/armada-37xx-periph.c div *= get_div(double_div->reg2, double_div->shift2); div 343 drivers/clk/mvebu/armada-37xx-periph.c return DIV_ROUND_UP_ULL((u64)parent_rate, div); div 380 drivers/clk/mvebu/armada-37xx-periph.c unsigned int load_level, div; div 396 drivers/clk/mvebu/armada-37xx-periph.c regmap_read(base, reg, &div); div 398 drivers/clk/mvebu/armada-37xx-periph.c return (div >> offset) & ARMADA_37XX_NB_TBG_DIV_MASK; div 472 drivers/clk/mvebu/armada-37xx-periph.c unsigned int div; div 475 drivers/clk/mvebu/armada-37xx-periph.c div = armada_3700_pm_dvfs_get_cpu_div(pm_cpu->nb_pm_base); div 477 drivers/clk/mvebu/armada-37xx-periph.c div = get_div(pm_cpu->reg_div, pm_cpu->shift_div); div 478 drivers/clk/mvebu/armada-37xx-periph.c return DIV_ROUND_UP_ULL((u64)parent_rate, div); div 486 drivers/clk/mvebu/armada-37xx-periph.c unsigned int div = *parent_rate / rate; div 501 drivers/clk/mvebu/armada-37xx-periph.c if (val == div) div 507 drivers/clk/mvebu/armada-37xx-periph.c return *parent_rate / div; div 553 drivers/clk/mvebu/armada-37xx-periph.c unsigned int div = parent_rate / rate; div 570 drivers/clk/mvebu/armada-37xx-periph.c if (val == div) { div 651 drivers/clk/mvebu/armada-37xx-periph.c for (clkt = rate->table; clkt->div; clkt++) div 66 drivers/clk/mvebu/armada-37xx-tbg.c unsigned int div; div 70 drivers/clk/mvebu/armada-37xx-tbg.c div = (val >> ptbg->refdiv_offset) & TBG_DIV_MASK; div 71 drivers/clk/mvebu/armada-37xx-tbg.c if (div == 0) div 72 drivers/clk/mvebu/armada-37xx-tbg.c div = 1; div 75 drivers/clk/mvebu/armada-37xx-tbg.c div *= 1 << ((val >> ptbg->vcodiv_offset) & TBG_DIV_MASK); div 77 drivers/clk/mvebu/armada-37xx-tbg.c return div; div 115 drivers/clk/mvebu/armada-37xx-tbg.c unsigned int mult, div; div 119 drivers/clk/mvebu/armada-37xx-tbg.c div = tbg_get_div(reg, &tbg[i]); div 121 drivers/clk/mvebu/armada-37xx-tbg.c parent_name, 0, mult, div); div 99 drivers/clk/mvebu/armada-38x.c void __iomem *sar, int id, int *mult, int *div) div 107 drivers/clk/mvebu/armada-38x.c *div = armada_38x_cpu_l2_ratios[opt][1]; div 111 drivers/clk/mvebu/armada-38x.c *div = armada_38x_cpu_ddr_ratios[opt][1]; div 92 drivers/clk/mvebu/armada-39x.c void __iomem *sar, int id, int *mult, int *div) div 97 drivers/clk/mvebu/armada-39x.c *div = 2; div 101 drivers/clk/mvebu/armada-39x.c *div = 4; div 105 drivers/clk/mvebu/armada-39x.c *div = 2; div 136 drivers/clk/mvebu/armada-xp.c void __iomem *sar, int id, int *mult, int *div) div 150 drivers/clk/mvebu/armada-xp.c *div = axp_nbclk_ratios[opt][1]; div 154 drivers/clk/mvebu/armada-xp.c *div = axp_hclk_ratios[opt][1]; div 158 drivers/clk/mvebu/armada-xp.c *div = axp_dramclk_ratios[opt][1]; div 131 drivers/clk/mvebu/clk-corediv.c u32 reg, div; div 134 drivers/clk/mvebu/clk-corediv.c div = (reg >> desc->offset) & desc->mask; div 135 drivers/clk/mvebu/clk-corediv.c return parent_rate / div; div 142 drivers/clk/mvebu/clk-corediv.c u32 div; div 144 drivers/clk/mvebu/clk-corediv.c div = *parent_rate / rate; div 145 drivers/clk/mvebu/clk-corediv.c if (div < 4) div 146 drivers/clk/mvebu/clk-corediv.c div = 4; div 147 drivers/clk/mvebu/clk-corediv.c else if (div > 6) div 148 drivers/clk/mvebu/clk-corediv.c div = 8; div 150 drivers/clk/mvebu/clk-corediv.c return *parent_rate / div; div 160 drivers/clk/mvebu/clk-corediv.c u32 reg, div; div 162 drivers/clk/mvebu/clk-corediv.c div = parent_rate / rate; div 169 drivers/clk/mvebu/clk-corediv.c reg |= (div & desc->mask) << desc->offset; div 52 drivers/clk/mvebu/clk-cpu.c u32 reg, div; div 55 drivers/clk/mvebu/clk-cpu.c div = (reg >> (cpuclk->cpu * 8)) & SYS_CTRL_CLK_DIVIDER_MASK; div 56 drivers/clk/mvebu/clk-cpu.c return parent_rate / div; div 63 drivers/clk/mvebu/clk-cpu.c u32 div; div 65 drivers/clk/mvebu/clk-cpu.c div = *parent_rate / rate; div 66 drivers/clk/mvebu/clk-cpu.c if (div == 0) div 67 drivers/clk/mvebu/clk-cpu.c div = 1; div 68 drivers/clk/mvebu/clk-cpu.c else if (div > 3) div 69 drivers/clk/mvebu/clk-cpu.c div = 3; div 71 drivers/clk/mvebu/clk-cpu.c return *parent_rate / div; div 79 drivers/clk/mvebu/clk-cpu.c u32 reg, div; div 82 drivers/clk/mvebu/clk-cpu.c div = parent_rate / rate; div 85 drivers/clk/mvebu/clk-cpu.c | (div << (cpuclk->cpu * 8)); div 158 drivers/clk/mvebu/common.c int mult, div; div 162 drivers/clk/mvebu/common.c desc->get_clk_ratio(base, desc->ratios[n].id, &mult, &div); div 164 drivers/clk/mvebu/common.c cpuclk_name, 0, mult, div); div 30 drivers/clk/mvebu/common.h void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div); div 134 drivers/clk/mvebu/dove-divider.c u32 mask, load, div; div 144 drivers/clk/mvebu/dove-divider.c div = (u32)divider << dc->div_bit_start; div 149 drivers/clk/mvebu/dove-divider.c dove_load_divider(dc->base, div, mask, load); div 126 drivers/clk/mvebu/dove.c void __iomem *sar, int id, int *mult, int *div) div 134 drivers/clk/mvebu/dove.c *div = dove_cpu_l2_ratios[opt][1]; div 142 drivers/clk/mvebu/dove.c *div = dove_cpu_ddr_ratios[opt][1]; div 127 drivers/clk/mvebu/kirkwood.c void __iomem *sar, int id, int *mult, int *div) div 134 drivers/clk/mvebu/kirkwood.c *div = kirkwood_cpu_l2_ratios[opt][1]; div 142 drivers/clk/mvebu/kirkwood.c *div = kirkwood_cpu_ddr_ratios[opt][1]; div 167 drivers/clk/mvebu/kirkwood.c void __iomem *sar, int id, int *mult, int *div) div 174 drivers/clk/mvebu/kirkwood.c *div = 2; div 182 drivers/clk/mvebu/kirkwood.c *div = mv88f6180_cpu_ddr_ratios[opt][1]; div 118 drivers/clk/mvebu/mv98dx3236.c void __iomem *sar, int id, int *mult, int *div) div 127 drivers/clk/mvebu/mv98dx3236.c *div = mv98dx4251_cpu_ddr_ratios[opt][1]; div 130 drivers/clk/mvebu/mv98dx3236.c *div = mv98dx3236_cpu_ddr_ratios[opt][1]; div 136 drivers/clk/mvebu/mv98dx3236.c *div = mv98dx4251_cpu_mpll_ratios[opt][1]; div 139 drivers/clk/mvebu/mv98dx3236.c *div = mv98dx3236_cpu_mpll_ratios[opt][1]; div 60 drivers/clk/mvebu/orion.c int *mult, int *div) div 66 drivers/clk/mvebu/orion.c *div = 2; div 69 drivers/clk/mvebu/orion.c *div = 3; div 72 drivers/clk/mvebu/orion.c *div = 1; div 128 drivers/clk/mvebu/orion.c int *mult, int *div) div 134 drivers/clk/mvebu/orion.c *div = 2; div 137 drivers/clk/mvebu/orion.c *div = 3; div 140 drivers/clk/mvebu/orion.c *div = 1; div 185 drivers/clk/mvebu/orion.c int *mult, int *div) div 191 drivers/clk/mvebu/orion.c *div = 2; div 194 drivers/clk/mvebu/orion.c *div = 3; div 197 drivers/clk/mvebu/orion.c *div = 1; div 251 drivers/clk/mvebu/orion.c int *mult, int *div) div 257 drivers/clk/mvebu/orion.c *div = 2; div 260 drivers/clk/mvebu/orion.c *div = 1; div 38 drivers/clk/mxs/clk-div.c struct clk_div *div = to_clk_div(hw); div 40 drivers/clk/mxs/clk-div.c return div->ops->recalc_rate(&div->divider.hw, parent_rate); div 46 drivers/clk/mxs/clk-div.c struct clk_div *div = to_clk_div(hw); div 48 drivers/clk/mxs/clk-div.c return div->ops->round_rate(&div->divider.hw, rate, prate); div 54 drivers/clk/mxs/clk-div.c struct clk_div *div = to_clk_div(hw); div 57 drivers/clk/mxs/clk-div.c ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); div 59 drivers/clk/mxs/clk-div.c ret = mxs_clk_wait(div->reg, div->busy); div 73 drivers/clk/mxs/clk-div.c struct clk_div *div; div 77 drivers/clk/mxs/clk-div.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 78 drivers/clk/mxs/clk-div.c if (!div) div 87 drivers/clk/mxs/clk-div.c div->reg = reg; div 88 drivers/clk/mxs/clk-div.c div->busy = busy; div 90 drivers/clk/mxs/clk-div.c div->divider.reg = reg; div 91 drivers/clk/mxs/clk-div.c div->divider.shift = shift; div 92 drivers/clk/mxs/clk-div.c div->divider.width = width; div 93 drivers/clk/mxs/clk-div.c div->divider.flags = CLK_DIVIDER_ONE_BASED; div 94 drivers/clk/mxs/clk-div.c div->divider.lock = &mxs_lock; div 95 drivers/clk/mxs/clk-div.c div->divider.hw.init = &init; div 96 drivers/clk/mxs/clk-div.c div->ops = &clk_divider_ops; div 98 drivers/clk/mxs/clk-div.c clk = clk_register(NULL, &div->divider.hw); div 100 drivers/clk/mxs/clk-div.c kfree(div); div 37 drivers/clk/mxs/clk-frac.c u32 div; div 40 drivers/clk/mxs/clk-frac.c div = readl_relaxed(frac->reg) >> frac->shift; div 41 drivers/clk/mxs/clk-frac.c div &= (1 << frac->width) - 1; div 43 drivers/clk/mxs/clk-frac.c tmp_rate = (u64)parent_rate * div; div 52 drivers/clk/mxs/clk-frac.c u32 div; div 61 drivers/clk/mxs/clk-frac.c div = tmp; div 63 drivers/clk/mxs/clk-frac.c if (!div) div 66 drivers/clk/mxs/clk-frac.c tmp_rate = (u64)parent_rate * div; div 78 drivers/clk/mxs/clk-frac.c u32 div, val; div 87 drivers/clk/mxs/clk-frac.c div = tmp; div 89 drivers/clk/mxs/clk-frac.c if (!div) div 96 drivers/clk/mxs/clk-frac.c val |= div << frac->shift; div 55 drivers/clk/mxs/clk.h const char *parent_name, unsigned int mult, unsigned int div) div 58 drivers/clk/mxs/clk.h CLK_SET_RATE_PARENT, mult, div); div 210 drivers/clk/nxp/clk-lpc18xx-ccu.c struct clk_divider *div = NULL; div 214 drivers/clk/nxp/clk-lpc18xx-ccu.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 215 drivers/clk/nxp/clk-lpc18xx-ccu.c if (!div) div 218 drivers/clk/nxp/clk-lpc18xx-ccu.c div->reg = branch->offset + reg_base; div 219 drivers/clk/nxp/clk-lpc18xx-ccu.c div->flags = CLK_DIVIDER_READ_ONLY; div 220 drivers/clk/nxp/clk-lpc18xx-ccu.c div->shift = 27; div 221 drivers/clk/nxp/clk-lpc18xx-ccu.c div->width = 1; div 223 drivers/clk/nxp/clk-lpc18xx-ccu.c div_hw = &div->hw; div 235 drivers/clk/nxp/clk-lpc18xx-ccu.c kfree(div); div 167 drivers/clk/nxp/clk-lpc18xx-cgu.c struct clk_divider div; div 176 drivers/clk/nxp/clk-lpc18xx-cgu.c .div = { \ div 541 drivers/clk/nxp/clk-lpc18xx-cgu.c clk->div.reg = reg; div 549 drivers/clk/nxp/clk-lpc18xx-cgu.c &clk->div.hw, &clk_divider_ops, div 788 drivers/clk/nxp/clk-lpc32xx.c { .val = 0, .div = 1 }, div 789 drivers/clk/nxp/clk-lpc32xx.c { .val = 1, .div = 2 }, div 790 drivers/clk/nxp/clk-lpc32xx.c { .val = 2, .div = 4 }, div 927 drivers/clk/nxp/clk-lpc32xx.c for (clkt = table; clkt->div; clkt++) div 929 drivers/clk/nxp/clk-lpc32xx.c return clkt->div; div 1062 drivers/clk/nxp/clk-lpc32xx.c struct lpc32xx_clk_div div; div 1069 drivers/clk/nxp/clk-lpc32xx.c struct clk_hw_proto0 *div; div 1137 drivers/clk/nxp/clk-lpc32xx.c .div = { \ div 1213 drivers/clk/nxp/clk-lpc32xx.c .div = (CLK_PREFIX(_div) == LPC32XX_CLK__NULL ? NULL : \ div 1422 drivers/clk/nxp/clk-lpc32xx.c hw = &clk_hw->hw0.div.hw; div 1439 drivers/clk/nxp/clk-lpc32xx.c div0 = clk_hw->hw1.div; div 92 drivers/clk/pistachio/clk.c struct pistachio_div *div, div 99 drivers/clk/pistachio/clk.c clk = clk_register_divider(NULL, div[i].name, div[i].parent, div 100 drivers/clk/pistachio/clk.c 0, p->base + div[i].reg, 0, div 101 drivers/clk/pistachio/clk.c div[i].width, div[i].div_flags, div 103 drivers/clk/pistachio/clk.c p->clk_data.clks[div[i].id] = clk; div 116 drivers/clk/pistachio/clk.c 0, 1, ff[i].div); div 81 drivers/clk/pistachio/clk.h unsigned int div; div 89 drivers/clk/pistachio/clk.h .div = _div, \ div 158 drivers/clk/pistachio/clk.h struct pistachio_div *div, div 123 drivers/clk/pxa/clk-pxa.h .lp = { .mult = _mult_lp, .div = _div_lp }, \ div 124 drivers/clk/pxa/clk-pxa.h .hp = { .mult = _mult_hp, .div = _div_hp }, \ div 136 drivers/clk/pxa/clk-pxa25x.c #define PXA25X_CKEN(dev_id, con_id, parents, mult, div, \ div 138 drivers/clk/pxa/clk-pxa25x.c PXA_CKEN(dev_id, con_id, bit, parents, mult, div, mult, div, \ div 971 drivers/clk/qcom/clk-alpha-pll.c u32 ctl, div; div 977 drivers/clk/qcom/clk-alpha-pll.c div = 1 << fls(ctl); div 980 drivers/clk/qcom/clk-alpha-pll.c *prate = clk_hw_round_rate(clk_hw_get_parent(hw), div * rate); div 982 drivers/clk/qcom/clk-alpha-pll.c return DIV_ROUND_UP_ULL((u64)*prate, div); div 989 drivers/clk/qcom/clk-alpha-pll.c int div; div 992 drivers/clk/qcom/clk-alpha-pll.c div = DIV_ROUND_UP_ULL(parent_rate, rate) - 1; div 996 drivers/clk/qcom/clk-alpha-pll.c div << PLL_POST_DIV_SHIFT); div 1193 drivers/clk/qcom/clk-alpha-pll.c u32 i, div = 1, val; div 1205 drivers/clk/qcom/clk-alpha-pll.c div = pll->post_div_table[i].div; div 1210 drivers/clk/qcom/clk-alpha-pll.c return (parent_rate / div); div 1218 drivers/clk/qcom/clk-alpha-pll.c u32 i, div = 1, val; div 1227 drivers/clk/qcom/clk-alpha-pll.c div = pll->post_div_table[i].div; div 1232 drivers/clk/qcom/clk-alpha-pll.c return (parent_rate / div); div 1251 drivers/clk/qcom/clk-alpha-pll.c int i, val = 0, div; div 1253 drivers/clk/qcom/clk-alpha-pll.c div = DIV_ROUND_UP_ULL(parent_rate, rate); div 1255 drivers/clk/qcom/clk-alpha-pll.c if (pll->post_div_table[i].div == div) { div 1286 drivers/clk/qcom/clk-alpha-pll.c int i, val = 0, div, ret; div 1299 drivers/clk/qcom/clk-alpha-pll.c div = DIV_ROUND_UP_ULL(parent_rate, rate); div 1301 drivers/clk/qcom/clk-alpha-pll.c if (pll->post_div_table[i].div == div) { div 111 drivers/clk/qcom/clk-krait.c u32 div; div 113 drivers/clk/qcom/clk-krait.c div = krait_get_l2_indirect_reg(d->offset); div 114 drivers/clk/qcom/clk-krait.c div >>= d->shift; div 115 drivers/clk/qcom/clk-krait.c div &= mask; div 116 drivers/clk/qcom/clk-krait.c div = (div + 1) * 2; div 118 drivers/clk/qcom/clk-krait.c return DIV_ROUND_UP(parent_rate, div); div 672 drivers/clk/qcom/clk-rcg.c int div; div 680 drivers/clk/qcom/clk-rcg.c div = src_rate / req->rate; div 682 drivers/clk/qcom/clk-rcg.c if (div >= 1 && div <= pre_div_max) { div 684 drivers/clk/qcom/clk-rcg.c req->rate = src_rate / div; div 697 drivers/clk/qcom/clk-rcg.c int div; div 717 drivers/clk/qcom/clk-rcg.c div = parent_rate / rate; div 719 drivers/clk/qcom/clk-rcg.c if (div >= 1 && div <= pre_div_max) { div 720 drivers/clk/qcom/clk-rcg.c f.pre_div = div; div 514 drivers/clk/qcom/clk-rcg2.c unsigned long parent_rate, div; div 524 drivers/clk/qcom/clk-rcg2.c div = DIV_ROUND_UP((2 * parent_rate), req->rate) - 1; div 525 drivers/clk/qcom/clk-rcg2.c div = min_t(u32, div, mask); div 527 drivers/clk/qcom/clk-rcg2.c req->rate = calc_rate(parent_rate, 0, 0, 0, div); div 537 drivers/clk/qcom/clk-rcg2.c unsigned long div; div 540 drivers/clk/qcom/clk-rcg2.c div = DIV_ROUND_UP((2 * parent_rate), rate) - 1; div 541 drivers/clk/qcom/clk-rcg2.c div = min_t(u32, div, mask); div 543 drivers/clk/qcom/clk-rcg2.c f.pre_div = div; div 570 drivers/clk/qcom/clk-rcg2.c unsigned long parent_rate, div; div 581 drivers/clk/qcom/clk-rcg2.c div = DIV_ROUND_UP((2 * parent_rate), rate) - 1; div 582 drivers/clk/qcom/clk-rcg2.c div = min_t(u32, div, mask); div 584 drivers/clk/qcom/clk-rcg2.c req->rate = calc_rate(parent_rate, 0, 0, 0, div); div 594 drivers/clk/qcom/clk-rcg2.c unsigned long div; div 599 drivers/clk/qcom/clk-rcg2.c div = DIV_ROUND_UP((2 * parent_rate), rate) - 1; div 600 drivers/clk/qcom/clk-rcg2.c div = min_t(u32, div, mask); div 602 drivers/clk/qcom/clk-rcg2.c f.pre_div = div; div 47 drivers/clk/qcom/clk-regmap-divider.c u32 div; div 49 drivers/clk/qcom/clk-regmap-divider.c div = divider_get_val(rate, parent_rate, NULL, divider->width, div 54 drivers/clk/qcom/clk-regmap-divider.c div << divider->shift); div 62 drivers/clk/qcom/clk-regmap-divider.c u32 div; div 64 drivers/clk/qcom/clk-regmap-divider.c regmap_read(clkr->regmap, divider->reg, &div); div 65 drivers/clk/qcom/clk-regmap-divider.c div >>= divider->shift; div 66 drivers/clk/qcom/clk-regmap-divider.c div &= BIT(divider->width) - 1; div 68 drivers/clk/qcom/clk-regmap-divider.c return divider_recalc_rate(hw, parent_rate, div, NULL, div 23 drivers/clk/qcom/clk-regmap-mux-div.c int mux_div_set_src_div(struct clk_regmap_mux_div *md, u32 src, u32 div) div 29 drivers/clk/qcom/clk-regmap-mux-div.c val = (div << md->hid_shift) | (src << md->src_shift); div 60 drivers/clk/qcom/clk-regmap-mux-div.c u32 *div) div 79 drivers/clk/qcom/clk-regmap-mux-div.c *div = d; div 92 drivers/clk/qcom/clk-regmap-mux-div.c unsigned int i, div, max_div; div 101 drivers/clk/qcom/clk-regmap-mux-div.c for (div = 1; div < max_div; div++) { div 102 drivers/clk/qcom/clk-regmap-mux-div.c parent_rate = mult_frac(req_rate, div, 2); div 104 drivers/clk/qcom/clk-regmap-mux-div.c actual_rate = mult_frac(parent_rate, 2, div); div 129 drivers/clk/qcom/clk-regmap-mux-div.c u32 div, max_div, best_src = 0, best_div = 0; div 138 drivers/clk/qcom/clk-regmap-mux-div.c for (div = 1; div < max_div; div++) { div 139 drivers/clk/qcom/clk-regmap-mux-div.c parent_rate = mult_frac(rate, div, 2); div 141 drivers/clk/qcom/clk-regmap-mux-div.c actual_rate = mult_frac(parent_rate, 2, div); div 146 drivers/clk/qcom/clk-regmap-mux-div.c best_div = div - 1; div 156 drivers/clk/qcom/clk-regmap-mux-div.c md->div = best_div; div 167 drivers/clk/qcom/clk-regmap-mux-div.c u32 i, div, src = 0; div 169 drivers/clk/qcom/clk-regmap-mux-div.c mux_div_get_src_div(md, &src, &div); div 183 drivers/clk/qcom/clk-regmap-mux-div.c return mux_div_set_src_div(md, md->parent_map[index], md->div); div 206 drivers/clk/qcom/clk-regmap-mux-div.c u32 div, src; div 210 drivers/clk/qcom/clk-regmap-mux-div.c mux_div_get_src_div(md, &src, &div); div 216 drivers/clk/qcom/clk-regmap-mux-div.c return mult_frac(parent_rate, 2, div + 1); div 33 drivers/clk/qcom/clk-regmap-mux-div.h u32 div; div 42 drivers/clk/qcom/clk-regmap-mux-div.h extern int mux_div_set_src_div(struct clk_regmap_mux_div *md, u32 src, u32 div); div 54 drivers/clk/qcom/clk-rpmh.c u8 div; div 80 drivers/clk/qcom/clk-rpmh.c .div = _div, \ div 99 drivers/clk/qcom/clk-rpmh.c .div = _div, \ div 128 drivers/clk/qcom/clk-rpmh.c .div = 1, \ div 238 drivers/clk/qcom/clk-rpmh.c return prate / r->div; div 46 drivers/clk/qcom/clk-spmi-pmic-div.c static inline unsigned int div_to_div_factor(unsigned int div) div 48 drivers/clk/qcom/clk-spmi-pmic-div.c return min(ilog2(div) + 1, 7); div 66 drivers/clk/qcom/clk-spmi-pmic-div.c unsigned int div = div_factor_to_div(div_factor); div 74 drivers/clk/qcom/clk-spmi-pmic-div.c ndelay((2 + 3 * div) * ns); div 76 drivers/clk/qcom/clk-spmi-pmic-div.c ndelay(3 * div * ns); div 117 drivers/clk/qcom/clk-spmi-pmic-div.c unsigned int div, div_factor; div 119 drivers/clk/qcom/clk-spmi-pmic-div.c div = DIV_ROUND_UP(*parent_rate, rate); div 120 drivers/clk/qcom/clk-spmi-pmic-div.c div_factor = div_to_div_factor(div); div 121 drivers/clk/qcom/clk-spmi-pmic-div.c div = div_factor_to_div(div_factor); div 123 drivers/clk/qcom/clk-spmi-pmic-div.c return *parent_rate / div; div 158 drivers/clk/qcom/common.c factor->mult = factor->div = 1; div 1395 drivers/clk/qcom/gcc-ipq4019.c for (clkt = pll->div_table; clkt->div; clkt++) { div 1397 drivers/clk/qcom/gcc-ipq4019.c pre_div = clkt->div; div 418 drivers/clk/qcom/gcc-ipq8074.c .div = 2, div 546 drivers/clk/qcom/gcc-ipq8074.c .div = 2, div 646 drivers/clk/qcom/gcc-ipq8074.c .div = 1, div 1269 drivers/clk/qcom/gcc-ipq8074.c .div = 4, div 1308 drivers/clk/qcom/gcc-ipq8074.c .div = 1, div 1360 drivers/clk/qcom/gcc-ipq8074.c .div = 1, div 1522 drivers/clk/qcom/gcc-ipq8074.c .div = 4, div 31 drivers/clk/qcom/gcc-mdm9615.c .div = 1, div 54 drivers/clk/qcom/gcc-msm8994.c .div = 1, div 173 drivers/clk/qcom/gcc-msm8996.c .div = 1, div 199 drivers/clk/qcom/gcc-msm8996.c .div = 2, div 2688 drivers/clk/qcom/gcc-msm8996.c .div = 16, div 2715 drivers/clk/qcom/gcc-msm8996.c .div = 16, div 2816 drivers/clk/qcom/gcc-msm8996.c .div = 2, div 122 drivers/clk/qcom/gcc-msm8998.c .div = 1, div 279 drivers/clk/qcom/gcc-qcs404.c .div = 1, div 144 drivers/clk/qcom/gcc-sdm660.c .div = 1, div 170 drivers/clk/qcom/gcc-sdm660.c .div = 2, div 207 drivers/clk/qcom/gcc-sdm660.c .div = 2, div 75 drivers/clk/qcom/krait-cc.c struct krait_div2_clk *div; div 84 drivers/clk/qcom/krait-cc.c div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); div 85 drivers/clk/qcom/krait-cc.c if (!div) div 88 drivers/clk/qcom/krait-cc.c div->width = 2; div 89 drivers/clk/qcom/krait-cc.c div->shift = 6; div 90 drivers/clk/qcom/krait-cc.c div->lpl = id >= 0; div 91 drivers/clk/qcom/krait-cc.c div->offset = offset; div 92 drivers/clk/qcom/krait-cc.c div->hw.init = &init; div 105 drivers/clk/qcom/krait-cc.c clk = devm_clk_register(dev, &div->hw); div 232 drivers/clk/qcom/mmcc-msm8996.c .div = 2, div 39 drivers/clk/renesas/clk-div6.c unsigned int div; div 54 drivers/clk/renesas/clk-div6.c | CPG_DIV6_DIV(clock->div - 1); div 90 drivers/clk/renesas/clk-div6.c return parent_rate / clock->div; div 96 drivers/clk/renesas/clk-div6.c unsigned int div; div 101 drivers/clk/renesas/clk-div6.c div = DIV_ROUND_CLOSEST(parent_rate, rate); div 102 drivers/clk/renesas/clk-div6.c return clamp_t(unsigned int, div, 1, 64); div 108 drivers/clk/renesas/clk-div6.c unsigned int div = cpg_div6_clock_calc_div(rate, *parent_rate); div 110 drivers/clk/renesas/clk-div6.c return *parent_rate / div; div 117 drivers/clk/renesas/clk-div6.c unsigned int div = cpg_div6_clock_calc_div(rate, parent_rate); div 120 drivers/clk/renesas/clk-div6.c clock->div = div; div 125 drivers/clk/renesas/clk-div6.c writel(val | CPG_DIV6_DIV(clock->div - 1), clock->reg); div 234 drivers/clk/renesas/clk-div6.c clock->div = (readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1; div 68 drivers/clk/renesas/clk-r8a73a4.c unsigned int div = 1; div 80 drivers/clk/renesas/clk-r8a73a4.c div = 2; div 87 drivers/clk/renesas/clk-r8a73a4.c div = 2; div 101 drivers/clk/renesas/clk-r8a73a4.c div = 2; div 109 drivers/clk/renesas/clk-r8a73a4.c div = 2; div 130 drivers/clk/renesas/clk-r8a73a4.c div = 2; div 134 drivers/clk/renesas/clk-r8a73a4.c div = 2; div 138 drivers/clk/renesas/clk-r8a73a4.c div = 4; div 158 drivers/clk/renesas/clk-r8a73a4.c div = 2; div 161 drivers/clk/renesas/clk-r8a73a4.c div *= 32; div 181 drivers/clk/renesas/clk-r8a73a4.c mult, div); div 70 drivers/clk/renesas/clk-r8a7740.c unsigned int div = 1; div 77 drivers/clk/renesas/clk-r8a7740.c div = 2048; div 82 drivers/clk/renesas/clk-r8a7740.c div = 1024; div 92 drivers/clk/renesas/clk-r8a7740.c div = 2; div 106 drivers/clk/renesas/clk-r8a7740.c div = 2; div 119 drivers/clk/renesas/clk-r8a7740.c div = 2; div 137 drivers/clk/renesas/clk-r8a7740.c mult, div); div 37 drivers/clk/renesas/clk-r8a7778.c unsigned int div[4]; div 69 drivers/clk/renesas/clk-r8a7778.c r8a7778_divs[i].div[cpg_mode_divs]); div 96 drivers/clk/renesas/clk-r8a7779.c unsigned int div = 1; div 102 drivers/clk/renesas/clk-r8a7779.c div = config->z_div; div 105 drivers/clk/renesas/clk-r8a7779.c div = config->zs_and_s_div; div 107 drivers/clk/renesas/clk-r8a7779.c div = config->s1_div; div 109 drivers/clk/renesas/clk-r8a7779.c div = config->p_div; div 111 drivers/clk/renesas/clk-r8a7779.c div = config->b_and_out_div; div 116 drivers/clk/renesas/clk-r8a7779.c return clk_register_fixed_factor(NULL, name, parent_name, 0, mult, div); div 177 drivers/clk/renesas/clk-rcar-gen2.c fixed->div = 6; div 211 drivers/clk/renesas/clk-rcar-gen2.c struct clk_divider *div; div 215 drivers/clk/renesas/clk-rcar-gen2.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 216 drivers/clk/renesas/clk-rcar-gen2.c if (!div) div 219 drivers/clk/renesas/clk-rcar-gen2.c div->reg = cpg->reg + CPG_ADSPCKCR; div 220 drivers/clk/renesas/clk-rcar-gen2.c div->width = 4; div 221 drivers/clk/renesas/clk-rcar-gen2.c div->table = cpg_adsp_div_table; div 222 drivers/clk/renesas/clk-rcar-gen2.c div->lock = &cpg->lock; div 226 drivers/clk/renesas/clk-rcar-gen2.c kfree(div); div 236 drivers/clk/renesas/clk-rcar-gen2.c &div->hw, &clk_divider_ops, div 240 drivers/clk/renesas/clk-rcar-gen2.c kfree(div); div 316 drivers/clk/renesas/clk-rcar-gen2.c unsigned int div = 1; div 320 drivers/clk/renesas/clk-rcar-gen2.c div = config->extal_div; div 330 drivers/clk/renesas/clk-rcar-gen2.c div = 3; div 344 drivers/clk/renesas/clk-rcar-gen2.c div = cpg_mode & BIT(18) ? 36 : 24; div 347 drivers/clk/renesas/clk-rcar-gen2.c div = (cpg_mode & (BIT(3) | BIT(2) | BIT(1))) == BIT(2) div 373 drivers/clk/renesas/clk-rcar-gen2.c mult, div); div 82 drivers/clk/renesas/clk-sh73a0.c unsigned int div = 1; div 89 drivers/clk/renesas/clk-sh73a0.c div = (parent_idx & 1) + 1; div 154 drivers/clk/renesas/clk-sh73a0.c mult, div); div 140 drivers/clk/renesas/r7s9210-cpg-mssr.c r7s9210_core_clks[i].div = ratio_tab[index].i; div 143 drivers/clk/renesas/r7s9210-cpg-mssr.c r7s9210_core_clks[i].div = ratio_tab[index].g; div 146 drivers/clk/renesas/r7s9210-cpg-mssr.c r7s9210_core_clks[i].div = ratio_tab[index].b; div 150 drivers/clk/renesas/r7s9210-cpg-mssr.c r7s9210_core_clks[i].div = ratio_tab[index].p1; div 153 drivers/clk/renesas/r7s9210-cpg-mssr.c r7s9210_core_clks[i].div = 32; div 166 drivers/clk/renesas/r7s9210-cpg-mssr.c unsigned int div = 1; div 191 drivers/clk/renesas/r7s9210-cpg-mssr.c __clk_get_name(parent), 0, mult, div); div 254 drivers/clk/renesas/r8a7743-cpg-mssr.c r8a7743_core_clks[i].div = 5; div 259 drivers/clk/renesas/r8a7791-cpg-mssr.c r8a7791_core_clks[i].div = 5; div 48 drivers/clk/renesas/r9a06g032-clocks.c u16 div, mul; div 74 drivers/clk/renesas/r9a06g032-clocks.c .div = _div, .mul = _mul } div 78 drivers/clk/renesas/r9a06g032-clocks.c .div = _div, .mul = 1} div 561 drivers/clk/renesas/r9a06g032-clocks.c u32 div = readl(reg); div 563 drivers/clk/renesas/r9a06g032-clocks.c if (div < clk->min) div 564 drivers/clk/renesas/r9a06g032-clocks.c div = clk->min; div 565 drivers/clk/renesas/r9a06g032-clocks.c else if (div > clk->max) div 566 drivers/clk/renesas/r9a06g032-clocks.c div = clk->max; div 567 drivers/clk/renesas/r9a06g032-clocks.c return DIV_ROUND_UP(parent_rate, div); div 581 drivers/clk/renesas/r9a06g032-clocks.c u32 div = DIV_ROUND_UP(prate, rate + 1); div 584 drivers/clk/renesas/r9a06g032-clocks.c if (div <= clk->min) div 586 drivers/clk/renesas/r9a06g032-clocks.c if (div >= clk->max) div 590 drivers/clk/renesas/r9a06g032-clocks.c if (div >= clk->table[i] && div <= clk->table[i + 1]) { div 600 drivers/clk/renesas/r9a06g032-clocks.c div = p >= m ? clk->table[i] : clk->table[i + 1]; div 601 drivers/clk/renesas/r9a06g032-clocks.c return div; div 604 drivers/clk/renesas/r9a06g032-clocks.c return div; div 612 drivers/clk/renesas/r9a06g032-clocks.c u32 div = DIV_ROUND_UP(*prate, rate); div 615 drivers/clk/renesas/r9a06g032-clocks.c hw->clk, rate, *prate, div); div 620 drivers/clk/renesas/r9a06g032-clocks.c div = r9a06g032_div_clamp_div(clk, rate, *prate); div 636 drivers/clk/renesas/r9a06g032-clocks.c *prate, div, DIV_ROUND_UP(*prate, div)); div 637 drivers/clk/renesas/r9a06g032-clocks.c return DIV_ROUND_UP(*prate, div); div 646 drivers/clk/renesas/r9a06g032-clocks.c u32 div = DIV_ROUND_UP(parent_rate, rate + 1); div 650 drivers/clk/renesas/r9a06g032-clocks.c rate, parent_rate, div); div 659 drivers/clk/renesas/r9a06g032-clocks.c writel(div | BIT(31), reg); div 675 drivers/clk/renesas/r9a06g032-clocks.c struct r9a06g032_clk_div *div; div 680 drivers/clk/renesas/r9a06g032-clocks.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 681 drivers/clk/renesas/r9a06g032-clocks.c if (!div) div 690 drivers/clk/renesas/r9a06g032-clocks.c div->clocks = clocks; div 691 drivers/clk/renesas/r9a06g032-clocks.c div->index = desc->index; div 692 drivers/clk/renesas/r9a06g032-clocks.c div->reg = desc->reg; div 693 drivers/clk/renesas/r9a06g032-clocks.c div->hw.init = &init; div 694 drivers/clk/renesas/r9a06g032-clocks.c div->min = desc->div_min; div 695 drivers/clk/renesas/r9a06g032-clocks.c div->max = desc->div_max; div 697 drivers/clk/renesas/r9a06g032-clocks.c for (i = 0; i < ARRAY_SIZE(div->table) && div 699 drivers/clk/renesas/r9a06g032-clocks.c div->table[div->table_size++] = desc->div_table[i]; div 702 drivers/clk/renesas/r9a06g032-clocks.c clk = clk_register(NULL, &div->hw); div 704 drivers/clk/renesas/r9a06g032-clocks.c kfree(div); div 935 drivers/clk/renesas/r9a06g032-clocks.c d->mul, d->div); div 175 drivers/clk/renesas/rcar-gen2-cpg.c fixed->div = 6; div 210 drivers/clk/renesas/rcar-gen2-cpg.c struct clk_divider *div; div 214 drivers/clk/renesas/rcar-gen2-cpg.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 215 drivers/clk/renesas/rcar-gen2-cpg.c if (!div) div 218 drivers/clk/renesas/rcar-gen2-cpg.c div->reg = base + CPG_ADSPCKCR; div 219 drivers/clk/renesas/rcar-gen2-cpg.c div->width = 4; div 220 drivers/clk/renesas/rcar-gen2-cpg.c div->table = cpg_adsp_div_table; div 221 drivers/clk/renesas/rcar-gen2-cpg.c div->lock = &cpg_lock; div 225 drivers/clk/renesas/rcar-gen2-cpg.c kfree(div); div 235 drivers/clk/renesas/rcar-gen2-cpg.c &div->hw, &clk_divider_ops, div 239 drivers/clk/renesas/rcar-gen2-cpg.c kfree(div); div 282 drivers/clk/renesas/rcar-gen2-cpg.c unsigned int div = 1; div 294 drivers/clk/renesas/rcar-gen2-cpg.c div = cpg_pll_config->extal_div; div 305 drivers/clk/renesas/rcar-gen2-cpg.c div = cpg_pll0_div; div 326 drivers/clk/renesas/rcar-gen2-cpg.c div = cpg_mode & BIT(18) ? 36 : 24; div 354 drivers/clk/renesas/rcar-gen2-cpg.c div = (cpg_mode & (BIT(3) | BIT(2) | BIT(1))) == BIT(2) ? div 367 drivers/clk/renesas/rcar-gen2-cpg.c 0, mult, div); div 182 drivers/clk/renesas/rcar-gen3-cpg.c unsigned int div, div 203 drivers/clk/renesas/rcar-gen3-cpg.c zclk->fixed_div = div; /* PLLVCO x 1/div x SYS-CPU divider */ div 227 drivers/clk/renesas/rcar-gen3-cpg.c .div = (sd_div), \ div 232 drivers/clk/renesas/rcar-gen3-cpg.c unsigned int div; div 309 drivers/clk/renesas/rcar-gen3-cpg.c clock->div_table[clock->cur_div_idx].div); div 321 drivers/clk/renesas/rcar-gen3-cpg.c clock->div_table[i].div); div 324 drivers/clk/renesas/rcar-gen3-cpg.c best_div = clock->div_table[i].div; div 336 drivers/clk/renesas/rcar-gen3-cpg.c unsigned int div = cpg_sd_clock_calc_div(clock, rate, *parent_rate); div 338 drivers/clk/renesas/rcar-gen3-cpg.c return DIV_ROUND_CLOSEST(*parent_rate, div); div 345 drivers/clk/renesas/rcar-gen3-cpg.c unsigned int div = cpg_sd_clock_calc_div(clock, rate, parent_rate); div 349 drivers/clk/renesas/rcar-gen3-cpg.c if (div == clock->div_table[i].div) div 425 drivers/clk/renesas/rcar-gen3-cpg.c struct clk_divider div; div 453 drivers/clk/renesas/rcar-gen3-cpg.c rpc->div.reg = base + CPG_RPCCKCR; div 454 drivers/clk/renesas/rcar-gen3-cpg.c rpc->div.width = 3; div 455 drivers/clk/renesas/rcar-gen3-cpg.c rpc->div.table = cpg_rpc_div_table; div 456 drivers/clk/renesas/rcar-gen3-cpg.c rpc->div.lock = &cpg_lock; div 466 drivers/clk/renesas/rcar-gen3-cpg.c &rpc->div.hw, &clk_divider_ops, div 495 drivers/clk/renesas/rcar-gen3-cpg.c rpcd2->fixed.div = 2; div 548 drivers/clk/renesas/rcar-gen3-cpg.c unsigned int div = 1; div 557 drivers/clk/renesas/rcar-gen3-cpg.c div = cpg_pll_config->extal_div; div 575 drivers/clk/renesas/rcar-gen3-cpg.c div = cpg_pll_config->pll1_div; div 593 drivers/clk/renesas/rcar-gen3-cpg.c div = cpg_pll_config->pll3_div; div 650 drivers/clk/renesas/rcar-gen3-cpg.c div = core->div & 0xffff; div 655 drivers/clk/renesas/rcar-gen3-cpg.c div = core->div >> 16; div 662 drivers/clk/renesas/rcar-gen3-cpg.c base, core->div, core->offset); div 668 drivers/clk/renesas/rcar-gen3-cpg.c div = cpg_pll_config->osc_prediv * core->div; div 677 drivers/clk/renesas/rcar-gen3-cpg.c div = core->div & 0xffff; div 682 drivers/clk/renesas/rcar-gen3-cpg.c div = core->div >> 16; div 706 drivers/clk/renesas/rcar-gen3-cpg.c __clk_get_name(parent), 0, mult, div); div 40 drivers/clk/renesas/rcar-gen3-cpg.h .div = (_div0) << 16 | (_div1), .offset = _md) div 48 drivers/clk/renesas/rcar-gen3-cpg.h DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div) div 52 drivers/clk/renesas/rcar-gen3-cpg.h (_parent0) << 16 | (_parent1), .div = (_div0) << 16 | (_div1)) div 55 drivers/clk/renesas/rcar-gen3-cpg.h DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset) div 311 drivers/clk/renesas/renesas-cpg-mssr.c unsigned int id = core->id, div = core->div; div 341 drivers/clk/renesas/renesas-cpg-mssr.c div *= (readl(priv->base + core->offset) & 0x3f) + 1; div 350 drivers/clk/renesas/renesas-cpg-mssr.c core->mult, div); div 27 drivers/clk/renesas/renesas-cpg-mssr.h unsigned int div; div 52 drivers/clk/renesas/renesas-cpg-mssr.h DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult) div 56 drivers/clk/renesas/renesas-cpg-mssr.h DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1) div 99 drivers/clk/rockchip/clk-half-divider.c int div; div 101 drivers/clk/rockchip/clk-half-divider.c div = clk_half_divider_bestdiv(hw, rate, prate, div 105 drivers/clk/rockchip/clk-half-divider.c return DIV_ROUND_UP_ULL(((u64)*prate * 2), div * 2 + 3); div 173 drivers/clk/rockchip/clk-half-divider.c struct clk_divider *div = NULL; div 204 drivers/clk/rockchip/clk-half-divider.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 205 drivers/clk/rockchip/clk-half-divider.c if (!div) div 208 drivers/clk/rockchip/clk-half-divider.c div->flags = div_flags; div 209 drivers/clk/rockchip/clk-half-divider.c div->reg = base + muxdiv_offset; div 210 drivers/clk/rockchip/clk-half-divider.c div->shift = div_shift; div 211 drivers/clk/rockchip/clk-half-divider.c div->width = div_width; div 212 drivers/clk/rockchip/clk-half-divider.c div->lock = lock; div 218 drivers/clk/rockchip/clk-half-divider.c div ? &div->hw : NULL, div_ops, div 242 drivers/clk/rockchip/clk-rk3188.c { .val = 0, .div = 2 }, div 243 drivers/clk/rockchip/clk-rk3188.c { .val = 1, .div = 4 }, div 244 drivers/clk/rockchip/clk-rk3188.c { .val = 2, .div = 8 }, div 245 drivers/clk/rockchip/clk-rk3188.c { .val = 3, .div = 16 }, div 537 drivers/clk/rockchip/clk-rk3188.c { .val = 0, .div = 1 }, div 538 drivers/clk/rockchip/clk-rk3188.c { .val = 1, .div = 2 }, div 539 drivers/clk/rockchip/clk-rk3188.c { .val = 2, .div = 3 }, div 540 drivers/clk/rockchip/clk-rk3188.c { .val = 3, .div = 4 }, div 541 drivers/clk/rockchip/clk-rk3188.c { .val = 4, .div = 8 }, div 658 drivers/clk/rockchip/clk-rk3188.c { .val = 0, .div = 1 }, div 659 drivers/clk/rockchip/clk-rk3188.c { .val = 1, .div = 2 }, div 660 drivers/clk/rockchip/clk-rk3188.c { .val = 2, .div = 3 }, div 661 drivers/clk/rockchip/clk-rk3188.c { .val = 3, .div = 4 }, div 662 drivers/clk/rockchip/clk-rk3188.c { .val = 4, .div = 8 }, div 233 drivers/clk/rockchip/clk-rk3288.c { .val = 0, .div = 1 }, div 234 drivers/clk/rockchip/clk-rk3288.c { .val = 1, .div = 2 }, div 235 drivers/clk/rockchip/clk-rk3288.c { .val = 3, .div = 4 }, div 145 drivers/clk/rockchip/clk-rk3368.c { .val = 0, .div = 1 }, div 146 drivers/clk/rockchip/clk-rk3368.c { .val = 1, .div = 2 }, div 147 drivers/clk/rockchip/clk-rk3368.c { .val = 3, .div = 4 }, div 49 drivers/clk/rockchip/clk.c struct clk_divider *div = NULL; div 83 drivers/clk/rockchip/clk.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 84 drivers/clk/rockchip/clk.c if (!div) { div 89 drivers/clk/rockchip/clk.c div->flags = div_flags; div 91 drivers/clk/rockchip/clk.c div->reg = base + div_offset; div 93 drivers/clk/rockchip/clk.c div->reg = base + muxdiv_offset; div 94 drivers/clk/rockchip/clk.c div->shift = div_shift; div 95 drivers/clk/rockchip/clk.c div->width = div_width; div 96 drivers/clk/rockchip/clk.c div->lock = lock; div 97 drivers/clk/rockchip/clk.c div->table = div_table; div 105 drivers/clk/rockchip/clk.c div ? &div->hw : NULL, div_ops, div 116 drivers/clk/rockchip/clk.c kfree(div); div 126 drivers/clk/rockchip/clk.c struct clk_fractional_divider div; div 220 drivers/clk/rockchip/clk.c struct clk_fractional_divider *div = NULL; div 245 drivers/clk/rockchip/clk.c div = &frac->div; div 246 drivers/clk/rockchip/clk.c div->flags = div_flags; div 247 drivers/clk/rockchip/clk.c div->reg = base + muxdiv_offset; div 248 drivers/clk/rockchip/clk.c div->mshift = 16; div 249 drivers/clk/rockchip/clk.c div->mwidth = 16; div 250 drivers/clk/rockchip/clk.c div->mmask = GENMASK(div->mwidth - 1, 0) << div->mshift; div 251 drivers/clk/rockchip/clk.c div->nshift = 0; div 252 drivers/clk/rockchip/clk.c div->nwidth = 16; div 253 drivers/clk/rockchip/clk.c div->nmask = GENMASK(div->nwidth - 1, 0) << div->nshift; div 254 drivers/clk/rockchip/clk.c div->lock = lock; div 255 drivers/clk/rockchip/clk.c div->approximation = rockchip_fractional_approximation; div 260 drivers/clk/rockchip/clk.c &div->hw, div_ops, div 319 drivers/clk/rockchip/clk.c void __iomem *base, unsigned int mult, unsigned int div, div 331 drivers/clk/rockchip/clk.c div); div 350 drivers/clk/rockchip/clk.c fix->div = div; div 137 drivers/clk/samsung/clk-cpu.c static void exynos_set_safe_div(void __iomem *base, unsigned long div, div 143 drivers/clk/samsung/clk-cpu.c div0 = (div0 & ~mask) | (div & mask); div 230 drivers/clk/samsung/clk-cpu.c unsigned long div = 0, div_mask = DIV_MASK; div 251 drivers/clk/samsung/clk-cpu.c div |= (cfg_data->div0 & E4210_DIV0_ATB_MASK); div 255 drivers/clk/samsung/clk-cpu.c exynos_set_safe_div(base, div, div_mask); div 265 drivers/clk/samsung/clk-cpu.c static void exynos5433_set_safe_div(void __iomem *base, unsigned long div, div 271 drivers/clk/samsung/clk-cpu.c div0 = (div0 & ~mask) | (div & mask); div 340 drivers/clk/samsung/clk-cpu.c unsigned long div = 0, div_mask = DIV_MASK; div 351 drivers/clk/samsung/clk-cpu.c exynos5433_set_safe_div(base, div, div_mask); div 174 drivers/clk/samsung/clk-s3c2410-dclk.c u32 dclk_con, div, cmp; div 180 drivers/clk/samsung/clk-s3c2410-dclk.c div = ((dclk_con >> div_shift) & DCLKCON_DCLK_DIV_MASK) + 1; div 181 drivers/clk/samsung/clk-s3c2410-dclk.c cmp = ((div + 1) / 2) - 1; div 60 drivers/clk/samsung/clk-s3c2410.c { .val = 0, .div = 1 }, div 61 drivers/clk/samsung/clk-s3c2410.c { .val = 1, .div = 2 }, div 62 drivers/clk/samsung/clk-s3c2410.c { .val = 2, .div = 4 }, div 63 drivers/clk/samsung/clk-s3c2410.c { .val = 3, .div = 6 }, div 64 drivers/clk/samsung/clk-s3c2410.c { .val = 4, .div = 8 }, div 65 drivers/clk/samsung/clk-s3c2410.c { .val = 5, .div = 10 }, div 66 drivers/clk/samsung/clk-s3c2410.c { .val = 6, .div = 12 }, div 67 drivers/clk/samsung/clk-s3c2410.c { .val = 7, .div = 14 }, div 240 drivers/clk/samsung/clk-s3c2410.c { .val = 0, .div = 4 }, div 241 drivers/clk/samsung/clk-s3c2410.c { .val = 1, .div = 8 }, div 246 drivers/clk/samsung/clk-s3c2410.c { .val = 0, .div = 3 }, div 247 drivers/clk/samsung/clk-s3c2410.c { .val = 1, .div = 6 }, div 43 drivers/clk/samsung/clk-s3c2412.c { .val = 0, .div = 1 }, div 44 drivers/clk/samsung/clk-s3c2412.c { .val = 1, .div = 2 }, div 45 drivers/clk/samsung/clk-s3c2412.c { .val = 2, .div = 4 }, div 46 drivers/clk/samsung/clk-s3c2412.c { .val = 3, .div = 6 }, div 47 drivers/clk/samsung/clk-s3c2412.c { .val = 4, .div = 8 }, div 48 drivers/clk/samsung/clk-s3c2412.c { .val = 5, .div = 10 }, div 49 drivers/clk/samsung/clk-s3c2412.c { .val = 6, .div = 12 }, div 50 drivers/clk/samsung/clk-s3c2412.c { .val = 7, .div = 14 }, div 79 drivers/clk/samsung/clk-s3c2443.c { .val = 0, .div = 1 }, div 80 drivers/clk/samsung/clk-s3c2443.c { .val = 1, .div = 2 }, div 81 drivers/clk/samsung/clk-s3c2443.c { .val = 3, .div = 4 }, div 86 drivers/clk/samsung/clk-s3c2443.c { .val = 0, .div = 1 }, div 87 drivers/clk/samsung/clk-s3c2443.c { .val = 1, .div = 3 }, div 88 drivers/clk/samsung/clk-s3c2443.c { .val = 2, .div = 5 }, div 89 drivers/clk/samsung/clk-s3c2443.c { .val = 3, .div = 7 }, div 90 drivers/clk/samsung/clk-s3c2443.c { .val = 4, .div = 9 }, div 91 drivers/clk/samsung/clk-s3c2443.c { .val = 5, .div = 11 }, div 92 drivers/clk/samsung/clk-s3c2443.c { .val = 6, .div = 13 }, div 93 drivers/clk/samsung/clk-s3c2443.c { .val = 7, .div = 15 }, div 190 drivers/clk/samsung/clk-s3c2443.c { .val = 0, .div = 1 }, div 191 drivers/clk/samsung/clk-s3c2443.c { .val = 1, .div = 2 }, div 192 drivers/clk/samsung/clk-s3c2443.c { .val = 2, .div = 3 }, div 193 drivers/clk/samsung/clk-s3c2443.c { .val = 3, .div = 4 }, div 194 drivers/clk/samsung/clk-s3c2443.c { .val = 5, .div = 6 }, div 195 drivers/clk/samsung/clk-s3c2443.c { .val = 7, .div = 8 }, div 238 drivers/clk/samsung/clk-s3c2443.c { .val = 0, .div = 1 }, div 239 drivers/clk/samsung/clk-s3c2443.c { .val = 8, .div = 2 }, div 240 drivers/clk/samsung/clk-s3c2443.c { .val = 2, .div = 3 }, div 241 drivers/clk/samsung/clk-s3c2443.c { .val = 9, .div = 4 }, div 242 drivers/clk/samsung/clk-s3c2443.c { .val = 10, .div = 6 }, div 243 drivers/clk/samsung/clk-s3c2443.c { .val = 11, .div = 8 }, div 244 drivers/clk/samsung/clk-s3c2443.c { .val = 13, .div = 12 }, div 245 drivers/clk/samsung/clk-s3c2443.c { .val = 15, .div = 16 }, div 165 drivers/clk/samsung/clk.c list->parent_name, list->flags, list->mult, list->div); div 90 drivers/clk/samsung/clk.h unsigned long div; div 100 drivers/clk/samsung/clk.h .div = d, \ div 449 drivers/clk/sifive/fu540-prci.c u8 div; div 453 drivers/clk/sifive/fu540-prci.c div = v ? 1 : 2; div 455 drivers/clk/sifive/fu540-prci.c return div_u64(parent_rate, div); div 293 drivers/clk/sirf/clk-atlas7.c { .val = 0, .div = 1 }, div 294 drivers/clk/sirf/clk-atlas7.c { .val = 1, .div = 2 }, div 295 drivers/clk/sirf/clk-atlas7.c { .val = 2, .div = 4 }, div 296 drivers/clk/sirf/clk-atlas7.c { .val = 3, .div = 8 }, div 297 drivers/clk/sirf/clk-atlas7.c { .val = 4, .div = 16 }, div 298 drivers/clk/sirf/clk-atlas7.c { .val = 5, .div = 32 }, div 1438 drivers/clk/sirf/clk-atlas7.c struct atlas7_div_init_data *div; div 1643 drivers/clk/sirf/clk-atlas7.c div = ÷r_list[i]; div 1644 drivers/clk/sirf/clk-atlas7.c clk = clk_register_divider(NULL, div->div_name, div 1645 drivers/clk/sirf/clk-atlas7.c div->parent_name, div->divider_flags, sirfsoc_clk_vbase + div->div_offset, div 1646 drivers/clk/sirf/clk-atlas7.c div->shift, div->width, 0, div->lock); div 1648 drivers/clk/sirf/clk-atlas7.c clk = clk_register_gate(NULL, div->gate_name, div->div_name, div 1649 drivers/clk/sirf/clk-atlas7.c div->gate_flags, sirfsoc_clk_vbase + div->gate_offset, div 1650 drivers/clk/sirf/clk-atlas7.c div->gate_bit, 0, div->lock); div 25 drivers/clk/socfpga/clk-gate-a10.c u32 div = 1, val; div 28 drivers/clk/socfpga/clk-gate-a10.c div = socfpgaclk->fixed_div; div 32 drivers/clk/socfpga/clk-gate-a10.c div = (1 << val); div 35 drivers/clk/socfpga/clk-gate-a10.c return parent_rate / div; div 18 drivers/clk/socfpga/clk-gate-s10.c u32 div = 1, val; div 21 drivers/clk/socfpga/clk-gate-s10.c div = socfpgaclk->fixed_div; div 25 drivers/clk/socfpga/clk-gate-s10.c div = (1 << val); div 27 drivers/clk/socfpga/clk-gate-s10.c return parent_rate / div; div 34 drivers/clk/socfpga/clk-gate-s10.c u32 div = 1, val; div 38 drivers/clk/socfpga/clk-gate-s10.c div = (1 << val); div 39 drivers/clk/socfpga/clk-gate-s10.c div = div ? 4 : 1; div 41 drivers/clk/socfpga/clk-gate-s10.c return parent_rate / div; div 94 drivers/clk/socfpga/clk-gate.c u32 div = 1, val; div 97 drivers/clk/socfpga/clk-gate.c div = socfpgaclk->fixed_div; div 103 drivers/clk/socfpga/clk-gate.c div = val + 1; div 105 drivers/clk/socfpga/clk-gate.c div = (1 << val); div 108 drivers/clk/socfpga/clk-gate.c return parent_rate / div; div 24 drivers/clk/socfpga/clk-periph-a10.c u32 div; div 27 drivers/clk/socfpga/clk-periph-a10.c div = socfpgaclk->fixed_div; div 29 drivers/clk/socfpga/clk-periph-a10.c div = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; div 30 drivers/clk/socfpga/clk-periph-a10.c div &= GENMASK(socfpgaclk->width - 1, 0); div 31 drivers/clk/socfpga/clk-periph-a10.c div += 1; div 33 drivers/clk/socfpga/clk-periph-a10.c div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1); div 36 drivers/clk/socfpga/clk-periph-a10.c return parent_rate / div; div 22 drivers/clk/socfpga/clk-periph-s10.c unsigned long div = 1; div 29 drivers/clk/socfpga/clk-periph-s10.c return parent_rate / div; div 36 drivers/clk/socfpga/clk-periph-s10.c unsigned long div = 1; div 39 drivers/clk/socfpga/clk-periph-s10.c div = socfpgaclk->fixed_div; div 42 drivers/clk/socfpga/clk-periph-s10.c div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1); div 45 drivers/clk/socfpga/clk-periph-s10.c return parent_rate / div; div 21 drivers/clk/socfpga/clk-periph.c u32 div, val; div 24 drivers/clk/socfpga/clk-periph.c div = socfpgaclk->fixed_div; div 31 drivers/clk/socfpga/clk-periph.c div = ((readl(socfpgaclk->hw.reg) & 0x1ff) + 1); div 34 drivers/clk/socfpga/clk-periph.c return parent_rate / div; div 56 drivers/clk/socfpga/clk-pll-s10.c u32 div = 1; div 58 drivers/clk/socfpga/clk-pll-s10.c div = ((readl(socfpgaclk->hw.reg) & div 61 drivers/clk/socfpga/clk-pll-s10.c div += 1; div 62 drivers/clk/socfpga/clk-pll-s10.c return parent_rate /= div; div 52 drivers/clk/spear/clk-frac-synth.c prate /= (2 * rtbl[index].div); div 73 drivers/clk/spear/clk-frac-synth.c unsigned int div = 1, val; div 83 drivers/clk/spear/clk-frac-synth.c div = val & DIV_FACTOR_MASK; div 85 drivers/clk/spear/clk-frac-synth.c if (!div) div 90 drivers/clk/spear/clk-frac-synth.c parent_rate = (parent_rate << 14) / (2 * div); div 110 drivers/clk/spear/clk-frac-synth.c val |= rtbl[i].div & DIV_FACTOR_MASK; div 60 drivers/clk/spear/clk-gpt-synth.c unsigned int div = 1, val; div 70 drivers/clk/spear/clk-gpt-synth.c div += val & GPT_MSCALE_MASK; div 71 drivers/clk/spear/clk-gpt-synth.c div *= 1 << (((val >> GPT_NSCALE_SHIFT) & GPT_NSCALE_MASK) + 1); div 73 drivers/clk/spear/clk-gpt-synth.c if (!div) div 76 drivers/clk/spear/clk-gpt-synth.c return parent_rate / div; div 60 drivers/clk/spear/clk.h u32 div; div 274 drivers/clk/spear/spear1310_clock.c {.div = 0x14000}, /* 25 Mhz , for vc01div4 = 250 MHz*/ div 275 drivers/clk/spear/spear1310_clock.c {.div = 0x1284B}, /* 27 Mhz , for vc01div4 = 250 MHz*/ div 276 drivers/clk/spear/spear1310_clock.c {.div = 0x0D8D3}, /* 58 Mhz , for vco1div4 = 393 MHz */ div 277 drivers/clk/spear/spear1310_clock.c {.div = 0x0B72C}, /* 58 Mhz , for vco1div4 = 332 MHz */ div 278 drivers/clk/spear/spear1310_clock.c {.div = 0x089EE}, /* 58 Mhz , for vc01div4 = 250 MHz*/ div 279 drivers/clk/spear/spear1310_clock.c {.div = 0x06f1C}, /* 72 Mhz , for vc01div4 = 250 MHz*/ div 280 drivers/clk/spear/spear1310_clock.c {.div = 0x06E58}, /* 58 Mhz , for vco1div4 = 200 MHz */ div 281 drivers/clk/spear/spear1310_clock.c {.div = 0x06c1B}, /* 74 Mhz , for vc01div4 = 250 MHz*/ div 282 drivers/clk/spear/spear1310_clock.c {.div = 0x04A12}, /* 108 Mhz , for vc01div4 = 250 MHz*/ div 283 drivers/clk/spear/spear1310_clock.c {.div = 0x0378E}, /* 144 Mhz , for vc01div4 = 250 MHz*/ div 351 drivers/clk/spear/spear1310_clock.c {.div = 0x14000}, /* 25 MHz */ div 352 drivers/clk/spear/spear1310_clock.c {.div = 0x0A000}, /* 50 MHz */ div 353 drivers/clk/spear/spear1310_clock.c {.div = 0x05000}, /* 100 MHz */ div 354 drivers/clk/spear/spear1310_clock.c {.div = 0x02000}, /* 250 MHz */ div 191 drivers/clk/spear/spear1340_clock.c {.div = 0x073A8}, /* for vco1div2 = 600 MHz */ div 192 drivers/clk/spear/spear1340_clock.c {.div = 0x06062}, /* for vco1div2 = 500 MHz */ div 193 drivers/clk/spear/spear1340_clock.c {.div = 0x04D1B}, /* for vco1div2 = 400 MHz */ div 194 drivers/clk/spear/spear1340_clock.c {.div = 0x04000}, /* for vco1div2 = 332 MHz */ div 195 drivers/clk/spear/spear1340_clock.c {.div = 0x03031}, /* for vco1div2 = 250 MHz */ div 196 drivers/clk/spear/spear1340_clock.c {.div = 0x0268D}, /* for vco1div2 = 200 MHz */ div 243 drivers/clk/spear/spear1340_clock.c {.div = 0x08000}, div 244 drivers/clk/spear/spear1340_clock.c {.div = 0x06a38}, div 245 drivers/clk/spear/spear1340_clock.c {.div = 0x06666}, div 246 drivers/clk/spear/spear1340_clock.c {.div = 0x06000}, div 247 drivers/clk/spear/spear1340_clock.c {.div = 0x054FD}, div 248 drivers/clk/spear/spear1340_clock.c {.div = 0x05000}, div 249 drivers/clk/spear/spear1340_clock.c {.div = 0x04D18}, div 250 drivers/clk/spear/spear1340_clock.c {.div = 0x04CCE}, div 251 drivers/clk/spear/spear1340_clock.c {.div = 0x04000}, div 252 drivers/clk/spear/spear1340_clock.c {.div = 0x039D5}, div 253 drivers/clk/spear/spear1340_clock.c {.div = 0x0351E}, div 254 drivers/clk/spear/spear1340_clock.c {.div = 0x03333}, div 255 drivers/clk/spear/spear1340_clock.c {.div = 0x03031}, div 256 drivers/clk/spear/spear1340_clock.c {.div = 0x03000}, div 257 drivers/clk/spear/spear1340_clock.c {.div = 0x02A7E}, div 258 drivers/clk/spear/spear1340_clock.c {.div = 0x02800}, div 259 drivers/clk/spear/spear1340_clock.c {.div = 0x0268D}, div 260 drivers/clk/spear/spear1340_clock.c {.div = 0x02666}, div 261 drivers/clk/spear/spear1340_clock.c {.div = 0x02000}, div 303 drivers/clk/spear/spear1340_clock.c {.div = 0x18000}, /* 25 Mhz , for vc01div4 = 300 MHz*/ div 304 drivers/clk/spear/spear1340_clock.c {.div = 0x1638E}, /* 27 Mhz , for vc01div4 = 300 MHz*/ div 305 drivers/clk/spear/spear1340_clock.c {.div = 0x14000}, /* 25 Mhz , for vc01div4 = 250 MHz*/ div 306 drivers/clk/spear/spear1340_clock.c {.div = 0x1284B}, /* 27 Mhz , for vc01div4 = 250 MHz*/ div 307 drivers/clk/spear/spear1340_clock.c {.div = 0x0D8D3}, /* 58 Mhz , for vco1div4 = 393 MHz */ div 308 drivers/clk/spear/spear1340_clock.c {.div = 0x0B72C}, /* 58 Mhz , for vco1div4 = 332 MHz */ div 309 drivers/clk/spear/spear1340_clock.c {.div = 0x0A584}, /* 58 Mhz , for vco1div4 = 300 MHz */ div 310 drivers/clk/spear/spear1340_clock.c {.div = 0x093B1}, /* 65 Mhz , for vc01div4 = 300 MHz*/ div 311 drivers/clk/spear/spear1340_clock.c {.div = 0x089EE}, /* 58 Mhz , for vc01div4 = 250 MHz*/ div 312 drivers/clk/spear/spear1340_clock.c {.div = 0x081BA}, /* 74 Mhz , for vc01div4 = 300 MHz*/ div 313 drivers/clk/spear/spear1340_clock.c {.div = 0x07BA0}, /* 65 Mhz , for vc01div4 = 250 MHz*/ div 314 drivers/clk/spear/spear1340_clock.c {.div = 0x06f1C}, /* 72 Mhz , for vc01div4 = 250 MHz*/ div 315 drivers/clk/spear/spear1340_clock.c {.div = 0x06E58}, /* 58 Mhz , for vco1div4 = 200 MHz */ div 316 drivers/clk/spear/spear1340_clock.c {.div = 0x06c1B}, /* 74 Mhz , for vc01div4 = 250 MHz*/ div 317 drivers/clk/spear/spear1340_clock.c {.div = 0x058E3}, /* 108 Mhz , for vc01div4 = 300 MHz*/ div 318 drivers/clk/spear/spear1340_clock.c {.div = 0x04A12}, /* 108 Mhz , for vc01div4 = 250 MHz*/ div 319 drivers/clk/spear/spear1340_clock.c {.div = 0x040A5}, /* 148.5 Mhz , for vc01div4 = 300 MHz*/ div 320 drivers/clk/spear/spear1340_clock.c {.div = 0x0378E}, /* 144 Mhz , for vc01div4 = 250 MHz*/ div 321 drivers/clk/spear/spear1340_clock.c {.div = 0x0360D}, /* 148 Mhz , for vc01div4 = 250 MHz*/ div 322 drivers/clk/spear/spear1340_clock.c {.div = 0x035E0}, /* 148.5 MHz, for vc01div4 = 250 MHz*/ div 388 drivers/clk/spear/spear1340_clock.c {.div = 0x1A92B}, /* 22.5792 MHz for vco1div4=300 MHz*/ div 389 drivers/clk/spear/spear1340_clock.c {.div = 0x186A0}, /* 24.576 MHz for vco1div4=300 MHz*/ div 390 drivers/clk/spear/spear1340_clock.c {.div = 0x18000}, /* 25 MHz for vco1div4=300 MHz*/ div 391 drivers/clk/spear/spear1340_clock.c {.div = 0x1624E}, /* 22.5792 MHz for vco1div4=250 MHz*/ div 392 drivers/clk/spear/spear1340_clock.c {.div = 0x14585}, /* 24.576 MHz for vco1div4=250 MHz*/ div 393 drivers/clk/spear/spear1340_clock.c {.div = 0x14000}, /* 25 MHz for vco1div4=250 MHz*/ div 394 drivers/clk/spear/spear1340_clock.c {.div = 0x0D495}, /* 45.1584 MHz for vco1div4=300 MHz*/ div 395 drivers/clk/spear/spear1340_clock.c {.div = 0x0C000}, /* 50 MHz for vco1div4=300 MHz*/ div 396 drivers/clk/spear/spear1340_clock.c {.div = 0x0B127}, /* 45.1584 MHz for vco1div4=250 MHz*/ div 397 drivers/clk/spear/spear1340_clock.c {.div = 0x0A000}, /* 50 MHz for vco1div4=250 MHz*/ div 398 drivers/clk/spear/spear1340_clock.c {.div = 0x07530}, /* 81.92 MHz for vco1div4=300 MHz*/ div 399 drivers/clk/spear/spear1340_clock.c {.div = 0x061A8}, /* 81.92 MHz for vco1div4=250 MHz*/ div 400 drivers/clk/spear/spear1340_clock.c {.div = 0x06000}, /* 100 MHz for vco1div4=300 MHz*/ div 401 drivers/clk/spear/spear1340_clock.c {.div = 0x05000}, /* 100 MHz for vco1div4=250 MHz*/ div 402 drivers/clk/spear/spear1340_clock.c {.div = 0x03000}, /* 200 MHz for vco1div4=300 MHz*/ div 403 drivers/clk/spear/spear1340_clock.c {.div = 0x02DB6}, /* 210 MHz for vco1div4=300 MHz*/ div 404 drivers/clk/spear/spear1340_clock.c {.div = 0x02BA2}, /* 220 MHz for vco1div4=300 MHz*/ div 405 drivers/clk/spear/spear1340_clock.c {.div = 0x029BD}, /* 230 MHz for vco1div4=300 MHz*/ div 406 drivers/clk/spear/spear1340_clock.c {.div = 0x02800}, /* 200 MHz for vco1div4=250 MHz*/ div 407 drivers/clk/spear/spear1340_clock.c {.div = 0x02666}, /* 250 MHz for vco1div4=300 MHz*/ div 408 drivers/clk/spear/spear1340_clock.c {.div = 0x02620}, /* 210 MHz for vco1div4=250 MHz*/ div 409 drivers/clk/spear/spear1340_clock.c {.div = 0x02460}, /* 220 MHz for vco1div4=250 MHz*/ div 410 drivers/clk/spear/spear1340_clock.c {.div = 0x022C0}, /* 230 MHz for vco1div4=250 MHz*/ div 411 drivers/clk/spear/spear1340_clock.c {.div = 0x02160}, /* 240 MHz for vco1div4=250 MHz*/ div 412 drivers/clk/spear/spear1340_clock.c {.div = 0x02000}, /* 250 MHz for vco1div4=250 MHz*/ div 17 drivers/clk/sprd/composite.c return sprd_div_helper_round_rate(&cc->common, &cc->div, div 26 drivers/clk/sprd/composite.c return sprd_div_helper_recalc_rate(&cc->common, &cc->div, parent_rate); div 34 drivers/clk/sprd/composite.c return sprd_div_helper_set_rate(&cc->common, &cc->div, div 17 drivers/clk/sprd/composite.h struct sprd_div_internal div; div 25 drivers/clk/sprd/composite.h .div = _SPRD_DIV_CLK(_dshift, _dwidth), \ div 13 drivers/clk/sprd/div.c const struct sprd_div_internal *div, div 18 drivers/clk/sprd/div.c NULL, div->width, 0); div 27 drivers/clk/sprd/div.c return sprd_div_helper_round_rate(&cd->common, &cd->div, div 32 drivers/clk/sprd/div.c const struct sprd_div_internal *div, div 39 drivers/clk/sprd/div.c val = reg >> div->shift; div 40 drivers/clk/sprd/div.c val &= (1 << div->width) - 1; div 43 drivers/clk/sprd/div.c div->width); div 52 drivers/clk/sprd/div.c return sprd_div_helper_recalc_rate(&cd->common, &cd->div, parent_rate); div 56 drivers/clk/sprd/div.c const struct sprd_div_internal *div, div 64 drivers/clk/sprd/div.c div->width, 0); div 67 drivers/clk/sprd/div.c reg &= ~GENMASK(div->width + div->shift - 1, div->shift); div 70 drivers/clk/sprd/div.c reg | (val << div->shift)); div 82 drivers/clk/sprd/div.c return sprd_div_helper_set_rate(&cd->common, &cd->div, div 34 drivers/clk/sprd/div.h struct sprd_div_internal div; div 41 drivers/clk/sprd/div.h .div = _SPRD_DIV_CLK(_shift, _width), \ div 60 drivers/clk/sprd/div.h const struct sprd_div_internal *div, div 65 drivers/clk/sprd/div.h const struct sprd_div_internal *div, div 69 drivers/clk/sprd/div.h const struct sprd_div_internal *div, div 118 drivers/clk/st/clk-flexgen.c unsigned long div; div 121 drivers/clk/st/clk-flexgen.c div = clk_best_div(*prate, rate); div 124 drivers/clk/st/clk-flexgen.c *prate = rate * div; div 128 drivers/clk/st/clk-flexgen.c return *prate / div; div 155 drivers/clk/st/clk-flexgen.c unsigned long div = 0; div 168 drivers/clk/st/clk-flexgen.c div = clk_best_div(parent_rate, rate); div 176 drivers/clk/st/clk-flexgen.c if (div <= 64) { div 178 drivers/clk/st/clk-flexgen.c ret = clk_divider_ops.set_rate(fdiv_hw, rate, rate * div); div 181 drivers/clk/st/clk-flexgen.c ret = clk_divider_ops.set_rate(pdiv_hw, rate, rate * div); div 647 drivers/clk/st/clkgen-pll.c struct clk_divider *div; div 660 drivers/clk/st/clkgen-pll.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 661 drivers/clk/st/clkgen-pll.c if (!div) { div 666 drivers/clk/st/clkgen-pll.c div->flags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO; div 667 drivers/clk/st/clkgen-pll.c div->reg = reg + pll_data->odf[odf].offset; div 668 drivers/clk/st/clkgen-pll.c div->shift = pll_data->odf[odf].shift; div 669 drivers/clk/st/clkgen-pll.c div->width = fls(pll_data->odf[odf].mask); div 670 drivers/clk/st/clkgen-pll.c div->lock = odf_lock; div 674 drivers/clk/st/clkgen-pll.c &div->hw, &clk_divider_ops, div 141 drivers/clk/sunxi-ng/ccu-sun4i-a10.c .div = _SUNXI_CCU_DIV_FLAGS(16, 2, CLK_DIVIDER_POWER_OF_TWO), div 170 drivers/clk/sunxi-ng/ccu-sun4i-a10.c .div = _SUNXI_CCU_DIV(0, 2), div 217 drivers/clk/sunxi-ng/ccu-sun4i-a10.c { .index = 3, .div = 3, }, div 241 drivers/clk/sunxi-ng/ccu-sun4i-a10.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 251 drivers/clk/sunxi-ng/ccu-sun4i-a10.c { .index = 1, .div = 2, }, div 255 drivers/clk/sunxi-ng/ccu-sun4i-a10.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 273 drivers/clk/sunxi-ng/ccu-sun4i-a10.c { .val = 0, .div = 2 }, div 274 drivers/clk/sunxi-ng/ccu-sun4i-a10.c { .val = 1, .div = 2 }, div 275 drivers/clk/sunxi-ng/ccu-sun4i-a10.c { .val = 2, .div = 4 }, div 276 drivers/clk/sunxi-ng/ccu-sun4i-a10.c { .val = 3, .div = 8 }, div 818 drivers/clk/sunxi-ng/ccu-sun4i-a10.c { .index = 0, .div = 750, }, div 231 drivers/clk/sunxi-ng/ccu-sun50i-a64.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 252 drivers/clk/sunxi-ng/ccu-sun50i-a64.c { .val = 0, .div = 2 }, div 253 drivers/clk/sunxi-ng/ccu-sun50i-a64.c { .val = 1, .div = 2 }, div 254 drivers/clk/sunxi-ng/ccu-sun50i-a64.c { .val = 2, .div = 4 }, div 255 drivers/clk/sunxi-ng/ccu-sun50i-a64.c { .val = 3, .div = 8 }, div 272 drivers/clk/sunxi-ng/ccu-sun50i-a64.c { .index = 1, .div = 2 }, div 388 drivers/clk/sunxi-ng/ccu-sun50i-a64.c { .val = 0, .div = 1 }, div 389 drivers/clk/sunxi-ng/ccu-sun50i-a64.c { .val = 1, .div = 2 }, div 390 drivers/clk/sunxi-ng/ccu-sun50i-a64.c { .val = 2, .div = 4 }, div 391 drivers/clk/sunxi-ng/ccu-sun50i-a64.c { .val = 3, .div = 6 }, div 396 drivers/clk/sunxi-ng/ccu-sun50i-a64.c .div = _SUNXI_CCU_DIV_TABLE(0, 2, ths_div_table), div 540 drivers/clk/sunxi-ng/ccu-sun50i-a64.c .div = _SUNXI_CCU_DIV(0, 4), div 32 drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO), div 55 drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c .div = _SUNXI_CCU_DIV(0, 2), div 67 drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO), div 366 drivers/clk/sunxi-ng/ccu-sun50i-h6.c .div = _SUNXI_CCU_DIV(0, 2), div 501 drivers/clk/sunxi-ng/ccu-sun50i-h6.c .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO), div 514 drivers/clk/sunxi-ng/ccu-sun50i-h6.c .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO), div 527 drivers/clk/sunxi-ng/ccu-sun50i-h6.c .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO), div 540 drivers/clk/sunxi-ng/ccu-sun50i-h6.c .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO), div 558 drivers/clk/sunxi-ng/ccu-sun50i-h6.c .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO), div 573 drivers/clk/sunxi-ng/ccu-sun50i-h6.c .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO), div 588 drivers/clk/sunxi-ng/ccu-sun50i-h6.c .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO), div 659 drivers/clk/sunxi-ng/ccu-sun50i-h6.c { .index = 1, .div = 36621 }, div 130 drivers/clk/sunxi-ng/ccu-sun5i.c .div = _SUNXI_CCU_DIV_FLAGS(16, 2, CLK_DIVIDER_POWER_OF_TWO), div 178 drivers/clk/sunxi-ng/ccu-sun5i.c { .index = 3, .div = 3, }, div 201 drivers/clk/sunxi-ng/ccu-sun5i.c { .index = 2, .div = 2, }, div 204 drivers/clk/sunxi-ng/ccu-sun5i.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 222 drivers/clk/sunxi-ng/ccu-sun5i.c { .val = 0, .div = 2 }, div 223 drivers/clk/sunxi-ng/ccu-sun5i.c { .val = 1, .div = 2 }, div 224 drivers/clk/sunxi-ng/ccu-sun5i.c { .val = 2, .div = 4 }, div 225 drivers/clk/sunxi-ng/ccu-sun5i.c { .val = 3, .div = 8 }, div 185 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 0, .div = 1 }, div 186 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 1, .div = 2 }, div 187 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 2, .div = 3 }, div 188 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 3, .div = 4 }, div 189 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 4, .div = 4 }, div 190 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 5, .div = 4 }, div 191 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 6, .div = 4 }, div 192 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 7, .div = 4 }, div 208 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 229 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 0, .div = 2 }, div 230 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 1, .div = 2 }, div 231 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 2, .div = 4 }, div 232 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .val = 3, .div = 8 }, div 578 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .div = _SUNXI_CCU_DIV(0, 4), div 591 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .div = _SUNXI_CCU_DIV(0, 4), div 659 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .index = 1, .div = 3, }, div 664 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .div = _SUNXI_CCU_DIV(0, 3), div 683 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .div = _SUNXI_CCU_DIV(0, 3), div 702 drivers/clk/sunxi-ng/ccu-sun6i-a31.c .div = _SUNXI_CCU_DIV(0, 3), div 737 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .index = 0, .div = 750, }, div 738 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .index = 3, .div = 4, }, div 739 drivers/clk/sunxi-ng/ccu-sun6i-a31.c { .index = 4, .div = 4, }, div 181 drivers/clk/sunxi-ng/ccu-sun8i-a23.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 202 drivers/clk/sunxi-ng/ccu-sun8i-a23.c { .val = 0, .div = 2 }, div 203 drivers/clk/sunxi-ng/ccu-sun8i-a23.c { .val = 1, .div = 2 }, div 204 drivers/clk/sunxi-ng/ccu-sun8i-a23.c { .val = 2, .div = 4 }, div 205 drivers/clk/sunxi-ng/ccu-sun8i-a23.c { .val = 3, .div = 8 }, div 191 drivers/clk/sunxi-ng/ccu-sun8i-a33.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 212 drivers/clk/sunxi-ng/ccu-sun8i-a33.c { .val = 0, .div = 2 }, div 213 drivers/clk/sunxi-ng/ccu-sun8i-a33.c { .val = 1, .div = 2 }, div 214 drivers/clk/sunxi-ng/ccu-sun8i-a33.c { .val = 2, .div = 4 }, div 215 drivers/clk/sunxi-ng/ccu-sun8i-a33.c { .val = 3, .div = 8 }, div 247 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 277 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c .index = 1, .div = 2 div 380 drivers/clk/sunxi-ng/ccu-sun8i-a83t.c .div = _SUNXI_CCU_DIV_FLAGS(0, 2, 0), div 155 drivers/clk/sunxi-ng/ccu-sun8i-h3.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 176 drivers/clk/sunxi-ng/ccu-sun8i-h3.c { .val = 0, .div = 2 }, div 177 drivers/clk/sunxi-ng/ccu-sun8i-h3.c { .val = 1, .div = 2 }, div 178 drivers/clk/sunxi-ng/ccu-sun8i-h3.c { .val = 2, .div = 4 }, div 179 drivers/clk/sunxi-ng/ccu-sun8i-h3.c { .val = 3, .div = 8 }, div 195 drivers/clk/sunxi-ng/ccu-sun8i-h3.c { .index = 1, .div = 2 }, div 321 drivers/clk/sunxi-ng/ccu-sun8i-h3.c { .val = 0, .div = 1 }, div 322 drivers/clk/sunxi-ng/ccu-sun8i-h3.c { .val = 1, .div = 2 }, div 323 drivers/clk/sunxi-ng/ccu-sun8i-h3.c { .val = 2, .div = 4 }, div 324 drivers/clk/sunxi-ng/ccu-sun8i-h3.c { .val = 3, .div = 6 }, div 32 drivers/clk/sunxi-ng/ccu-sun8i-r.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 91 drivers/clk/sunxi-ng/ccu-sun8i-r.c { .index = 0, .div = 16 }, div 116 drivers/clk/sunxi-ng/ccu-sun8i-r40.c .div = _SUNXI_CCU_DIV(0, 2), div 263 drivers/clk/sunxi-ng/ccu-sun8i-r40.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 284 drivers/clk/sunxi-ng/ccu-sun8i-r40.c { .val = 0, .div = 2 }, div 285 drivers/clk/sunxi-ng/ccu-sun8i-r40.c { .val = 1, .div = 2 }, div 286 drivers/clk/sunxi-ng/ccu-sun8i-r40.c { .val = 2, .div = 4 }, div 287 drivers/clk/sunxi-ng/ccu-sun8i-r40.c { .val = 3, .div = 8 }, div 466 drivers/clk/sunxi-ng/ccu-sun8i-r40.c .div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO), div 747 drivers/clk/sunxi-ng/ccu-sun8i-r40.c { .index = 0, .div = 750, }, div 140 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 161 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c { .val = 0, .div = 2 }, div 162 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c { .val = 1, .div = 2 }, div 163 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c { .val = 2, .div = 4 }, div 164 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c { .val = 3, .div = 8 }, div 180 drivers/clk/sunxi-ng/ccu-sun8i-v3s.c { .index = 1, .div = 2 }, div 237 drivers/clk/sunxi-ng/ccu-sun9i-a80.c { .val = 0, .div = 1 }, div 238 drivers/clk/sunxi-ng/ccu-sun9i-a80.c { .val = 1, .div = 2 }, div 239 drivers/clk/sunxi-ng/ccu-sun9i-a80.c { .val = 2, .div = 3 }, div 240 drivers/clk/sunxi-ng/ccu-sun9i-a80.c { .val = 3, .div = 4 }, div 241 drivers/clk/sunxi-ng/ccu-sun9i-a80.c { .val = 4, .div = 4 }, div 242 drivers/clk/sunxi-ng/ccu-sun9i-a80.c { .val = 5, .div = 4 }, div 243 drivers/clk/sunxi-ng/ccu-sun9i-a80.c { .val = 6, .div = 4 }, div 244 drivers/clk/sunxi-ng/ccu-sun9i-a80.c { .val = 7, .div = 4 }, div 266 drivers/clk/sunxi-ng/ccu-sun9i-a80.c .div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO), div 278 drivers/clk/sunxi-ng/ccu-sun9i-a80.c .div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO), div 290 drivers/clk/sunxi-ng/ccu-sun9i-a80.c .div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO), div 304 drivers/clk/sunxi-ng/ccu-sun9i-a80.c .div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO), div 316 drivers/clk/sunxi-ng/ccu-sun9i-a80.c .div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO), div 328 drivers/clk/sunxi-ng/ccu-sun9i-a80.c .div = _SUNXI_CCU_DIV_FLAGS(0, 2, CLK_DIVIDER_POWER_OF_TWO), div 347 drivers/clk/sunxi-ng/ccu-sun9i-a80.c .index = 0, .div = 750 div 118 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c .div = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO), div 139 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c { .val = 0, .div = 2 }, div 140 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c { .val = 1, .div = 2 }, div 141 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c { .val = 2, .div = 4 }, div 142 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c { .val = 3, .div = 8 }, div 26 drivers/clk/sunxi-ng/ccu_div.c cd->div.table, cd->div.width, div 27 drivers/clk/sunxi-ng/ccu_div.c cd->div.flags); div 64 drivers/clk/sunxi-ng/ccu_div.c val = reg >> cd->div.shift; div 65 drivers/clk/sunxi-ng/ccu_div.c val &= (1 << cd->div.width) - 1; div 70 drivers/clk/sunxi-ng/ccu_div.c val = divider_recalc_rate(hw, parent_rate, val, cd->div.table, div 71 drivers/clk/sunxi-ng/ccu_div.c cd->div.flags, cd->div.width); div 102 drivers/clk/sunxi-ng/ccu_div.c val = divider_get_val(rate, parent_rate, cd->div.table, cd->div.width, div 103 drivers/clk/sunxi-ng/ccu_div.c cd->div.flags); div 108 drivers/clk/sunxi-ng/ccu_div.c reg &= ~GENMASK(cd->div.width + cd->div.shift - 1, cd->div.shift); div 110 drivers/clk/sunxi-ng/ccu_div.c writel(reg | (val << cd->div.shift), div 81 drivers/clk/sunxi-ng/ccu_div.h struct ccu_div_internal div; div 91 drivers/clk/sunxi-ng/ccu_div.h .div = _SUNXI_CCU_DIV_TABLE(_shift, _width, \ div 119 drivers/clk/sunxi-ng/ccu_div.h .div = _SUNXI_CCU_DIV(_mshift, _mwidth), \ div 154 drivers/clk/sunxi-ng/ccu_div.h .div = _SUNXI_CCU_DIV(_mshift, _mwidth), \ div 91 drivers/clk/sunxi-ng/ccu_gate.c int div = 1; div 94 drivers/clk/sunxi-ng/ccu_gate.c div = cg->common.prediv; div 100 drivers/clk/sunxi-ng/ccu_gate.c best_parent *= div; div 104 drivers/clk/sunxi-ng/ccu_gate.c return *prate / div; div 49 drivers/clk/sunxi-ng/ccu_mp.c unsigned int _m, _p, div; div 63 drivers/clk/sunxi-ng/ccu_mp.c div = _m * _p; div 65 drivers/clk/sunxi-ng/ccu_mp.c if (div > maxdiv) div 68 drivers/clk/sunxi-ng/ccu_mp.c if (rate * div == parent_rate_saved) { div 79 drivers/clk/sunxi-ng/ccu_mp.c parent_rate = clk_hw_round_rate(hw, rate * div); div 80 drivers/clk/sunxi-ng/ccu_mp.c now = parent_rate / div; div 41 drivers/clk/sunxi-ng/ccu_mux.c prediv = cm->fixed_predivs[i].div; div 49 drivers/clk/sunxi-ng/ccu_mux.c u8 div; div 51 drivers/clk/sunxi-ng/ccu_mux.c div = reg >> cm->var_predivs[i].shift; div 52 drivers/clk/sunxi-ng/ccu_mux.c div &= (1 << cm->var_predivs[i].width) - 1; div 53 drivers/clk/sunxi-ng/ccu_mux.c prediv = div + 1; div 11 drivers/clk/sunxi-ng/ccu_mux.h u16 div; div 88 drivers/clk/sunxi/clk-a10-ve.c struct clk_divider *div; div 100 drivers/clk/sunxi/clk-a10-ve.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 101 drivers/clk/sunxi/clk-a10-ve.c if (!div) div 115 drivers/clk/sunxi/clk-a10-ve.c div->reg = reg; div 116 drivers/clk/sunxi/clk-a10-ve.c div->shift = SUN4I_VE_DIVIDER_SHIFT; div 117 drivers/clk/sunxi/clk-a10-ve.c div->width = SUN4I_VE_DIVIDER_WIDTH; div 118 drivers/clk/sunxi/clk-a10-ve.c div->lock = &ve_lock; div 122 drivers/clk/sunxi/clk-a10-ve.c &div->hw, &clk_divider_ops, div 158 drivers/clk/sunxi/clk-a10-ve.c kfree(div); div 25 drivers/clk/sunxi/clk-mod0.c u8 div, calcm, calcp; div 32 drivers/clk/sunxi/clk-mod0.c div = DIV_ROUND_UP(req->parent_rate, req->rate); div 34 drivers/clk/sunxi/clk-mod0.c if (div < 16) div 36 drivers/clk/sunxi/clk-mod0.c else if (div / 2 < 16) div 38 drivers/clk/sunxi/clk-mod0.c else if (div / 4 < 16) div 43 drivers/clk/sunxi/clk-mod0.c calcm = DIV_ROUND_UP(div, 1 << calcp); div 107 drivers/clk/sunxi/clk-sun4i-display.c struct clk_divider *div = NULL; div 147 drivers/clk/sunxi/clk-sun4i-display.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 148 drivers/clk/sunxi/clk-sun4i-display.c if (!div) div 151 drivers/clk/sunxi/clk-sun4i-display.c div->reg = reg; div 152 drivers/clk/sunxi/clk-sun4i-display.c div->shift = data->offset_div; div 153 drivers/clk/sunxi/clk-sun4i-display.c div->width = data->width_div; div 154 drivers/clk/sunxi/clk-sun4i-display.c div->lock = &sun4i_a10_display_lock; div 160 drivers/clk/sunxi/clk-sun4i-display.c data->has_div ? &div->hw : NULL, div 211 drivers/clk/sunxi/clk-sun4i-display.c kfree(div); div 100 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c u8 *div, div 127 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c if (div && half) { div 128 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c *div = best_m; div 23 drivers/clk/sunxi/clk-sun6i-apb0.c { .val = 0, .div = 2, }, div 24 drivers/clk/sunxi/clk-sun6i-apb0.c { .val = 1, .div = 2, }, div 25 drivers/clk/sunxi/clk-sun6i-apb0.c { .val = 2, .div = 4, }, div 26 drivers/clk/sunxi/clk-sun6i-apb0.c { .val = 3, .div = 8, }, div 27 drivers/clk/sunxi/clk-sun6i-ar100.c unsigned long div; div 34 drivers/clk/sunxi/clk-sun6i-ar100.c div = DIV_ROUND_UP(req->parent_rate, req->rate); div 36 drivers/clk/sunxi/clk-sun6i-ar100.c if (div < 32) div 38 drivers/clk/sunxi/clk-sun6i-ar100.c else if (div >> 1 < 32) div 40 drivers/clk/sunxi/clk-sun6i-ar100.c else if (div >> 2 < 32) div 45 drivers/clk/sunxi/clk-sun6i-ar100.c div >>= shift; div 47 drivers/clk/sunxi/clk-sun6i-ar100.c if (div > 32) div 48 drivers/clk/sunxi/clk-sun6i-ar100.c div = 32; div 50 drivers/clk/sunxi/clk-sun6i-ar100.c req->rate = (req->parent_rate >> shift) / div; div 51 drivers/clk/sunxi/clk-sun6i-ar100.c req->m = div - 1; div 30 drivers/clk/sunxi/clk-sun8i-mbus.c struct clk_divider *div; div 47 drivers/clk/sunxi/clk-sun8i-mbus.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 48 drivers/clk/sunxi/clk-sun8i-mbus.c if (!div) div 66 drivers/clk/sunxi/clk-sun8i-mbus.c div->reg = reg; div 67 drivers/clk/sunxi/clk-sun8i-mbus.c div->shift = SUN8I_MBUS_DIV_SHIFT; div 68 drivers/clk/sunxi/clk-sun8i-mbus.c div->width = SUN8I_MBUS_DIV_WIDTH; div 69 drivers/clk/sunxi/clk-sun8i-mbus.c div->lock = &sun8i_a23_mbus_lock; div 79 drivers/clk/sunxi/clk-sun8i-mbus.c &div->hw, &clk_divider_ops, div 101 drivers/clk/sunxi/clk-sun8i-mbus.c kfree(div); div 101 drivers/clk/sunxi/clk-sun9i-core.c u32 div; div 106 drivers/clk/sunxi/clk-sun9i-core.c div = DIV_ROUND_UP(req->parent_rate, req->rate); div 109 drivers/clk/sunxi/clk-sun9i-core.c if (div > 4) div 110 drivers/clk/sunxi/clk-sun9i-core.c div = 4; div 112 drivers/clk/sunxi/clk-sun9i-core.c req->rate = req->parent_rate / div; div 113 drivers/clk/sunxi/clk-sun9i-core.c req->m = div; div 236 drivers/clk/sunxi/clk-sun9i-core.c u32 div; div 241 drivers/clk/sunxi/clk-sun9i-core.c div = DIV_ROUND_UP(req->parent_rate, req->rate); div 244 drivers/clk/sunxi/clk-sun9i-core.c if (div > 256) div 245 drivers/clk/sunxi/clk-sun9i-core.c div = 256; div 247 drivers/clk/sunxi/clk-sun9i-core.c req->p = order_base_2(div); div 36 drivers/clk/sunxi/clk-sun9i-cpus.c #define SUN9I_CPUS_DIV_SET(reg, div) ((reg & ~SUN9I_CPUS_DIV_MASK) | \ div 37 drivers/clk/sunxi/clk-sun9i-cpus.c (div << SUN9I_CPUS_DIV_SHIFT)) div 42 drivers/clk/sunxi/clk-sun9i-cpus.c #define SUN9I_CPUS_PLL4_DIV_SET(reg, div) ((reg & ~SUN9I_CPUS_PLL4_DIV_MASK) | \ div 43 drivers/clk/sunxi/clk-sun9i-cpus.c (div << SUN9I_CPUS_PLL4_DIV_SHIFT)) div 75 drivers/clk/sunxi/clk-sun9i-cpus.c u8 div, pre_div = 1; div 84 drivers/clk/sunxi/clk-sun9i-cpus.c div = DIV_ROUND_UP(parent_rate, rate); div 87 drivers/clk/sunxi/clk-sun9i-cpus.c if (parent == SUN9I_CPUS_MUX_PARENT_PLL4 && div > 4) { div 89 drivers/clk/sunxi/clk-sun9i-cpus.c if (div < 32) { div 90 drivers/clk/sunxi/clk-sun9i-cpus.c pre_div = div; div 91 drivers/clk/sunxi/clk-sun9i-cpus.c div = 1; div 92 drivers/clk/sunxi/clk-sun9i-cpus.c } else if (div < 64) { div 93 drivers/clk/sunxi/clk-sun9i-cpus.c pre_div = DIV_ROUND_UP(div, 2); div 94 drivers/clk/sunxi/clk-sun9i-cpus.c div = 2; div 95 drivers/clk/sunxi/clk-sun9i-cpus.c } else if (div < 96) { div 96 drivers/clk/sunxi/clk-sun9i-cpus.c pre_div = DIV_ROUND_UP(div, 3); div 97 drivers/clk/sunxi/clk-sun9i-cpus.c div = 3; div 99 drivers/clk/sunxi/clk-sun9i-cpus.c pre_div = DIV_ROUND_UP(div, 4); div 100 drivers/clk/sunxi/clk-sun9i-cpus.c div = 4; div 106 drivers/clk/sunxi/clk-sun9i-cpus.c *divp = div - 1; div 110 drivers/clk/sunxi/clk-sun9i-cpus.c return parent_rate / pre_div / div; div 157 drivers/clk/sunxi/clk-sun9i-cpus.c u8 div, pre_div, parent; div 166 drivers/clk/sunxi/clk-sun9i-cpus.c sun9i_a80_cpus_clk_round(rate, &div, &pre_div, parent, parent_rate); div 168 drivers/clk/sunxi/clk-sun9i-cpus.c reg = SUN9I_CPUS_DIV_SET(reg, div); div 35 drivers/clk/sunxi/clk-sunxi.c u8 div; div 38 drivers/clk/sunxi/clk-sunxi.c div = req->rate / 6000000; div 39 drivers/clk/sunxi/clk-sunxi.c req->rate = 6000000 * div; div 52 drivers/clk/sunxi/clk-sunxi.c if (div < 10) div 56 drivers/clk/sunxi/clk-sunxi.c else if (div < 20 || (div < 32 && (div & 1))) div 61 drivers/clk/sunxi/clk-sunxi.c else if (div < 40 || (div < 64 && (div & 2))) div 69 drivers/clk/sunxi/clk-sunxi.c div <<= req->p; div 70 drivers/clk/sunxi/clk-sunxi.c div /= (req->k + 1); div 71 drivers/clk/sunxi/clk-sunxi.c req->n = div / 4; div 159 drivers/clk/sunxi/clk-sunxi.c u8 div; div 162 drivers/clk/sunxi/clk-sunxi.c div = req->rate / 6000000; div 163 drivers/clk/sunxi/clk-sunxi.c req->rate = 6000000 * div; div 176 drivers/clk/sunxi/clk-sunxi.c if (div < 20 || (div < 32 && (div & 1))) div 181 drivers/clk/sunxi/clk-sunxi.c else if (div < 40 || (div < 64 && (div & 2))) div 189 drivers/clk/sunxi/clk-sunxi.c div <<= req->p; div 190 drivers/clk/sunxi/clk-sunxi.c div /= (req->k + 1); div 191 drivers/clk/sunxi/clk-sunxi.c req->n = div / 4 - 1; div 203 drivers/clk/sunxi/clk-sunxi.c u8 div; div 206 drivers/clk/sunxi/clk-sunxi.c div = req->rate / req->parent_rate; div 207 drivers/clk/sunxi/clk-sunxi.c req->rate = req->parent_rate * div; div 209 drivers/clk/sunxi/clk-sunxi.c if (div < 31) div 211 drivers/clk/sunxi/clk-sunxi.c else if (div / 2 < 31) div 213 drivers/clk/sunxi/clk-sunxi.c else if (div / 3 < 31) div 218 drivers/clk/sunxi/clk-sunxi.c req->n = DIV_ROUND_UP(div, (req->k + 1)); div 230 drivers/clk/sunxi/clk-sunxi.c u8 div; div 233 drivers/clk/sunxi/clk-sunxi.c div = req->rate / req->parent_rate; div 234 drivers/clk/sunxi/clk-sunxi.c req->rate = req->parent_rate * div; div 236 drivers/clk/sunxi/clk-sunxi.c req->k = div / 32; div 240 drivers/clk/sunxi/clk-sunxi.c req->n = DIV_ROUND_UP(div, (req->k + 1)) - 1; div 251 drivers/clk/sunxi/clk-sunxi.c u32 div; div 266 drivers/clk/sunxi/clk-sunxi.c div = order_base_2(DIV_ROUND_UP(req->parent_rate, req->rate)); div 269 drivers/clk/sunxi/clk-sunxi.c if (div > 3) div 270 drivers/clk/sunxi/clk-sunxi.c div = 3; div 272 drivers/clk/sunxi/clk-sunxi.c req->rate = req->parent_rate >> div; div 274 drivers/clk/sunxi/clk-sunxi.c req->p = div; div 290 drivers/clk/sunxi/clk-sunxi.c u8 div, calcp, calcm = 1; div 299 drivers/clk/sunxi/clk-sunxi.c div = DIV_ROUND_UP(req->parent_rate, req->rate); div 303 drivers/clk/sunxi/clk-sunxi.c if (div < 4) div 305 drivers/clk/sunxi/clk-sunxi.c else if (div / 2 < 4) div 307 drivers/clk/sunxi/clk-sunxi.c else if (div / 4 < 4) div 312 drivers/clk/sunxi/clk-sunxi.c calcm = DIV_ROUND_UP(div, 1 << calcp); div 314 drivers/clk/sunxi/clk-sunxi.c calcp = __roundup_pow_of_two(div); div 348 drivers/clk/sunxi/clk-sunxi.c int div; div 353 drivers/clk/sunxi/clk-sunxi.c div = DIV_ROUND_UP(req->parent_rate, req->rate); div 356 drivers/clk/sunxi/clk-sunxi.c if (div > 32) div 359 drivers/clk/sunxi/clk-sunxi.c if (div <= 4) div 361 drivers/clk/sunxi/clk-sunxi.c else if (div <= 8) div 363 drivers/clk/sunxi/clk-sunxi.c else if (div <= 16) div 368 drivers/clk/sunxi/clk-sunxi.c calcm = (div >> calcp) - 1; div 386 drivers/clk/sunxi/clk-sunxi.c u8 div, calcm, calcp; div 393 drivers/clk/sunxi/clk-sunxi.c div = DIV_ROUND_UP(req->parent_rate, req->rate); div 395 drivers/clk/sunxi/clk-sunxi.c if (div < 32) div 397 drivers/clk/sunxi/clk-sunxi.c else if (div / 2 < 32) div 399 drivers/clk/sunxi/clk-sunxi.c else if (div / 4 < 32) div 404 drivers/clk/sunxi/clk-sunxi.c calcm = DIV_ROUND_UP(div, 1 << calcp); div 738 drivers/clk/sunxi/clk-sunxi.c { .val = 0, .div = 1 }, div 739 drivers/clk/sunxi/clk-sunxi.c { .val = 1, .div = 2 }, div 740 drivers/clk/sunxi/clk-sunxi.c { .val = 2, .div = 3 }, div 741 drivers/clk/sunxi/clk-sunxi.c { .val = 3, .div = 4 }, div 742 drivers/clk/sunxi/clk-sunxi.c { .val = 4, .div = 4 }, div 743 drivers/clk/sunxi/clk-sunxi.c { .val = 5, .div = 4 }, div 744 drivers/clk/sunxi/clk-sunxi.c { .val = 6, .div = 4 }, div 745 drivers/clk/sunxi/clk-sunxi.c { .val = 7, .div = 4 }, div 761 drivers/clk/sunxi/clk-sunxi.c { .val = 0, .div = 2 }, div 762 drivers/clk/sunxi/clk-sunxi.c { .val = 1, .div = 2 }, div 763 drivers/clk/sunxi/clk-sunxi.c { .val = 2, .div = 4 }, div 764 drivers/clk/sunxi/clk-sunxi.c { .val = 3, .div = 8 }, div 890 drivers/clk/sunxi/clk-sunxi.c } div[SUNXI_DIVS_MAX_QTY]; div 894 drivers/clk/sunxi/clk-sunxi.c { .val = 0, .div = 6, }, div 895 drivers/clk/sunxi/clk-sunxi.c { .val = 1, .div = 12, }, div 896 drivers/clk/sunxi/clk-sunxi.c { .val = 2, .div = 18, }, div 897 drivers/clk/sunxi/clk-sunxi.c { .val = 3, .div = 24, }, div 904 drivers/clk/sunxi/clk-sunxi.c .div = { div 915 drivers/clk/sunxi/clk-sunxi.c .div = { div 926 drivers/clk/sunxi/clk-sunxi.c .div = { div 967 drivers/clk/sunxi/clk-sunxi.c if (data->div[i].self) { div 1025 drivers/clk/sunxi/clk-sunxi.c if (data->div[i].self) { div 1035 drivers/clk/sunxi/clk-sunxi.c if (data->div[i].gate) { div 1041 drivers/clk/sunxi/clk-sunxi.c gate->bit_idx = data->div[i].gate; div 1048 drivers/clk/sunxi/clk-sunxi.c if (data->div[i].fixed) { div 1054 drivers/clk/sunxi/clk-sunxi.c fix_factor->div = data->div[i].fixed; div 1063 drivers/clk/sunxi/clk-sunxi.c flags = data->div[i].pow ? CLK_DIVIDER_POWER_OF_TWO : 0; div 1066 drivers/clk/sunxi/clk-sunxi.c divider->shift = data->div[i].shift; div 1070 drivers/clk/sunxi/clk-sunxi.c divider->table = data->div[i].table; div 1083 drivers/clk/sunxi/clk-sunxi.c (data->div[i].critical ? div 573 drivers/clk/tegra/clk-dfll.c u32 val, div; div 583 drivers/clk/tegra/clk-dfll.c div = DIV_ROUND_UP(td->ref_rate, td->pwm_rate); div 584 drivers/clk/tegra/clk-dfll.c val |= (div << DFLL_OUTPUT_CFG_PWM_DIV_SHIFT) div 24 drivers/clk/tegra/clk-divider.c int div; div 26 drivers/clk/tegra/clk-divider.c div = div_frac_get(rate, parent_rate, divider->width, div 29 drivers/clk/tegra/clk-divider.c if (div < 0) div 32 drivers/clk/tegra/clk-divider.c return div; div 40 drivers/clk/tegra/clk-divider.c int div, mul; div 44 drivers/clk/tegra/clk-divider.c div = reg & div_mask(divider); div 47 drivers/clk/tegra/clk-divider.c div += mul; div 50 drivers/clk/tegra/clk-divider.c rate += div - 1; div 51 drivers/clk/tegra/clk-divider.c do_div(rate, div); div 60 drivers/clk/tegra/clk-divider.c int div, mul; div 66 drivers/clk/tegra/clk-divider.c div = get_div(divider, rate, output_rate); div 67 drivers/clk/tegra/clk-divider.c if (div < 0) div 72 drivers/clk/tegra/clk-divider.c return DIV_ROUND_UP(output_rate * mul, div + mul); div 79 drivers/clk/tegra/clk-divider.c int div; div 83 drivers/clk/tegra/clk-divider.c div = get_div(divider, rate, parent_rate); div 84 drivers/clk/tegra/clk-divider.c if (div < 0) div 85 drivers/clk/tegra/clk-divider.c return div; div 92 drivers/clk/tegra/clk-divider.c val |= div << divider->shift; div 95 drivers/clk/tegra/clk-divider.c if (div) div 158 drivers/clk/tegra/clk-divider.c { .val = 0, .div = 2 }, div 159 drivers/clk/tegra/clk-divider.c { .val = 1, .div = 1 }, div 160 drivers/clk/tegra/clk-divider.c { .val = 0, .div = 0 }, div 91 drivers/clk/tegra/clk-emc.c u32 val, div; div 102 drivers/clk/tegra/clk-emc.c div = val & CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_MASK; div 104 drivers/clk/tegra/clk-emc.c return parent_rate / (div + 2) * 2; div 205 drivers/clk/tegra/clk-emc.c u8 div; div 242 drivers/clk/tegra/clk-emc.c div = timing->parent_rate / (timing->rate / 2) - 2; div 256 drivers/clk/tegra/clk-emc.c car_value |= CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR(div); div 58 drivers/clk/tegra/clk-periph-fixed.c do_div(rate, fixed->div); div 75 drivers/clk/tegra/clk-periph-fixed.c unsigned int div, div 100 drivers/clk/tegra/clk-periph-fixed.c fixed->div = div; div 138 drivers/clk/tegra/clk-periph.c bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV); div 161 drivers/clk/tegra/clk-periph.c periph->divider.reg = div ? (clk_base + offset) : NULL; div 171 drivers/clk/tegra/clk-periph.c periph->divider.hw.clk = div ? clk : NULL; div 92 drivers/clk/tegra/clk-sdmmc-mux.c int div; div 96 drivers/clk/tegra/clk-sdmmc-mux.c div = get_div_field(val); div 98 drivers/clk/tegra/clk-sdmmc-mux.c div += SDMMC_MUL; div 101 drivers/clk/tegra/clk-sdmmc-mux.c rate += div - 1; div 102 drivers/clk/tegra/clk-sdmmc-mux.c do_div(rate, div); div 111 drivers/clk/tegra/clk-sdmmc-mux.c int div; div 120 drivers/clk/tegra/clk-sdmmc-mux.c div = div_frac_get(req->rate, output_rate, 8, 1, sdmmc_mux->div_flags); div 121 drivers/clk/tegra/clk-sdmmc-mux.c if (div < 0) div 122 drivers/clk/tegra/clk-sdmmc-mux.c div = 0; div 126 drivers/clk/tegra/clk-sdmmc-mux.c div + SDMMC_MUL); div 128 drivers/clk/tegra/clk-sdmmc-mux.c req->rate = output_rate * SDMMC_MUL / (div + SDMMC_MUL); div 137 drivers/clk/tegra/clk-sdmmc-mux.c int div; div 142 drivers/clk/tegra/clk-sdmmc-mux.c div = div_frac_get(rate, parent_rate, 8, 1, sdmmc_mux->div_flags); div 143 drivers/clk/tegra/clk-sdmmc-mux.c if (div < 0) div 144 drivers/clk/tegra/clk-sdmmc-mux.c return div; div 150 drivers/clk/tegra/clk-sdmmc-mux.c if (div) div 156 drivers/clk/tegra/clk-sdmmc-mux.c val |= div; div 627 drivers/clk/tegra/clk-tegra114.c { .val = 0, .div = 1 }, div 628 drivers/clk/tegra/clk-tegra114.c { .val = 1, .div = 2 }, div 629 drivers/clk/tegra/clk-tegra114.c { .val = 2, .div = 3 }, div 630 drivers/clk/tegra/clk-tegra114.c { .val = 3, .div = 4 }, div 631 drivers/clk/tegra/clk-tegra114.c { .val = 4, .div = 5 }, div 632 drivers/clk/tegra/clk-tegra114.c { .val = 5, .div = 6 }, div 633 drivers/clk/tegra/clk-tegra114.c { .val = 0, .div = 0 }, div 473 drivers/clk/tegra/clk-tegra124.c { .val = 0, .div = 1 }, div 474 drivers/clk/tegra/clk-tegra124.c { .val = 1, .div = 2 }, div 475 drivers/clk/tegra/clk-tegra124.c { .val = 2, .div = 3 }, div 476 drivers/clk/tegra/clk-tegra124.c { .val = 3, .div = 4 }, div 477 drivers/clk/tegra/clk-tegra124.c { .val = 4, .div = 5 }, div 478 drivers/clk/tegra/clk-tegra124.c { .val = 5, .div = 6 }, div 479 drivers/clk/tegra/clk-tegra124.c { .val = 0, .div = 0 }, div 1743 drivers/clk/tegra/clk-tegra210.c { .val = 0, .div = 1 }, div 1744 drivers/clk/tegra/clk-tegra210.c { .val = 1, .div = 2 }, div 1745 drivers/clk/tegra/clk-tegra210.c { .val = 2, .div = 3 }, div 1746 drivers/clk/tegra/clk-tegra210.c { .val = 3, .div = 4 }, div 1747 drivers/clk/tegra/clk-tegra210.c { .val = 4, .div = 5 }, div 1748 drivers/clk/tegra/clk-tegra210.c { .val = 5, .div = 6 }, div 1749 drivers/clk/tegra/clk-tegra210.c { .val = 6, .div = 8 }, div 1750 drivers/clk/tegra/clk-tegra210.c { .val = 7, .div = 10 }, div 1751 drivers/clk/tegra/clk-tegra210.c { .val = 8, .div = 12 }, div 1752 drivers/clk/tegra/clk-tegra210.c { .val = 9, .div = 16 }, div 1753 drivers/clk/tegra/clk-tegra210.c { .val = 10, .div = 12 }, div 1754 drivers/clk/tegra/clk-tegra210.c { .val = 11, .div = 16 }, div 1755 drivers/clk/tegra/clk-tegra210.c { .val = 12, .div = 20 }, div 1756 drivers/clk/tegra/clk-tegra210.c { .val = 13, .div = 24 }, div 1757 drivers/clk/tegra/clk-tegra210.c { .val = 14, .div = 32 }, div 1758 drivers/clk/tegra/clk-tegra210.c { .val = 0, .div = 0 }, div 531 drivers/clk/tegra/clk.h unsigned int div; div 540 drivers/clk/tegra/clk.h unsigned int div, div 341 drivers/clk/ti/adpll.c unsigned int div) div 353 drivers/clk/ti/adpll.c 0, mult, div); div 367 drivers/clk/ti/clkctrl.c struct clk_omap_divider *div; div 371 drivers/clk/ti/clkctrl.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 372 drivers/clk/ti/clkctrl.c if (!div) div 375 drivers/clk/ti/clkctrl.c div->reg.ptr = reg; div 376 drivers/clk/ti/clkctrl.c div->shift = data->bit; div 377 drivers/clk/ti/clkctrl.c div->flags = div_data->flags; div 379 drivers/clk/ti/clkctrl.c if (div->flags & CLK_DIVIDER_POWER_OF_TWO) div 384 drivers/clk/ti/clkctrl.c &div->width, &div->table)) { div 387 drivers/clk/ti/clkctrl.c kfree(div); div 391 drivers/clk/ti/clkctrl.c if (_ti_clkctrl_clk_register(provider, node, &div->hw, offset, div 394 drivers/clk/ti/clkctrl.c kfree(div); div 36 drivers/clk/ti/divider.c for (clkt = table; clkt->div; clkt++) div 37 drivers/clk/ti/divider.c if (clkt->div > maxdiv) div 38 drivers/clk/ti/divider.c maxdiv = clkt->div; div 58 drivers/clk/ti/divider.c for (clkt = table; clkt->div; clkt++) div 60 drivers/clk/ti/divider.c return clkt->div; div 76 drivers/clk/ti/divider.c unsigned int div) div 80 drivers/clk/ti/divider.c for (clkt = table; clkt->div; clkt++) div 81 drivers/clk/ti/divider.c if (clkt->div == div) div 86 drivers/clk/ti/divider.c static unsigned int _get_val(struct clk_omap_divider *divider, u8 div) div 89 drivers/clk/ti/divider.c return div; div 91 drivers/clk/ti/divider.c return __ffs(div); div 93 drivers/clk/ti/divider.c return _get_table_val(divider->table, div); div 94 drivers/clk/ti/divider.c return div - 1; div 101 drivers/clk/ti/divider.c unsigned int div, val; div 106 drivers/clk/ti/divider.c div = _get_div(divider, val); div 107 drivers/clk/ti/divider.c if (!div) { div 114 drivers/clk/ti/divider.c return DIV_ROUND_UP(parent_rate, div); div 124 drivers/clk/ti/divider.c unsigned int div) div 128 drivers/clk/ti/divider.c for (clkt = table; clkt->div; clkt++) div 129 drivers/clk/ti/divider.c if (clkt->div == div) div 134 drivers/clk/ti/divider.c static bool _is_valid_div(struct clk_omap_divider *divider, unsigned int div) div 137 drivers/clk/ti/divider.c return is_power_of_2(div); div 139 drivers/clk/ti/divider.c return _is_valid_table_div(divider->table, div); div 148 drivers/clk/ti/divider.c int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); div 150 drivers/clk/ti/divider.c for (clkt = table; clkt->div; clkt++) { div 151 drivers/clk/ti/divider.c if (clkt->div == div) div 152 drivers/clk/ti/divider.c return clkt->div; div 153 drivers/clk/ti/divider.c else if (clkt->div < div) div 156 drivers/clk/ti/divider.c if ((clkt->div - div) < (up - div)) div 157 drivers/clk/ti/divider.c up = clkt->div; div 233 drivers/clk/ti/divider.c int div; div 234 drivers/clk/ti/divider.c div = ti_clk_divider_bestdiv(hw, rate, prate); div 236 drivers/clk/ti/divider.c return DIV_ROUND_UP(*prate, div); div 243 drivers/clk/ti/divider.c unsigned int div, value; div 251 drivers/clk/ti/divider.c div = DIV_ROUND_UP(parent_rate, rate); div 252 drivers/clk/ti/divider.c value = _get_val(divider, div); div 321 drivers/clk/ti/divider.c struct clk_omap_divider *div; div 333 drivers/clk/ti/divider.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 334 drivers/clk/ti/divider.c if (!div) div 344 drivers/clk/ti/divider.c memcpy(&div->reg, reg, sizeof(*reg)); div 345 drivers/clk/ti/divider.c div->shift = shift; div 346 drivers/clk/ti/divider.c div->width = width; div 347 drivers/clk/ti/divider.c div->latch = latch; div 348 drivers/clk/ti/divider.c div->flags = clk_divider_flags; div 349 drivers/clk/ti/divider.c div->hw.init = &init; div 350 drivers/clk/ti/divider.c div->table = table; div 353 drivers/clk/ti/divider.c clk = ti_clk_register(dev, &div->hw, name); div 356 drivers/clk/ti/divider.c kfree(div); div 367 drivers/clk/ti/divider.c int div; div 377 drivers/clk/ti/divider.c div = 1; div 379 drivers/clk/ti/divider.c while (div < max_div) { div 381 drivers/clk/ti/divider.c div <<= 1; div 383 drivers/clk/ti/divider.c div++; div 416 drivers/clk/ti/divider.c tmp[valid_div].div = div_table[i]; div 469 drivers/clk/ti/divider.c table[valid_div].div = val; div 485 drivers/clk/ti/divider.c u32 div; div 501 drivers/clk/ti/divider.c div = min_div; div 503 drivers/clk/ti/divider.c while (div < max_div) { div 505 drivers/clk/ti/divider.c div <<= 1; div 507 drivers/clk/ti/divider.c div++; div 511 drivers/clk/ti/divider.c div = 0; div 513 drivers/clk/ti/divider.c while (table[div].div) { div 514 drivers/clk/ti/divider.c val = table[div].val; div 515 drivers/clk/ti/divider.c div++; div 607 drivers/clk/ti/divider.c struct clk_omap_divider *div; div 610 drivers/clk/ti/divider.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 611 drivers/clk/ti/divider.c if (!div) div 614 drivers/clk/ti/divider.c if (ti_clk_divider_populate(node, &div->reg, &div->table, &val, div 615 drivers/clk/ti/divider.c &div->flags, &div->width, &div->shift, div 619 drivers/clk/ti/divider.c if (!ti_clk_add_component(node, &div->hw, CLK_COMPONENT_TYPE_DIVIDER)) div 623 drivers/clk/ti/divider.c kfree(div->table); div 624 drivers/clk/ti/divider.c kfree(div); div 81 drivers/clk/ti/fapll.c void __iomem *div; div 321 drivers/clk/ti/fapll.c if (!synth->div) div 352 drivers/clk/ti/fapll.c synth_div_m = readl_relaxed(synth->div) & SYNTH_MAX_DIV_M; div 365 drivers/clk/ti/fapll.c post_div_m = readl_relaxed(synth->div) & SYNTH_MAX_DIV_M; div 416 drivers/clk/ti/fapll.c if (ti_fapll_clock_is_bypass(fd) || !synth->div || !rate) div 451 drivers/clk/ti/fapll.c if (ti_fapll_clock_is_bypass(fd) || !synth->div || !rate) div 473 drivers/clk/ti/fapll.c v = readl_relaxed(synth->div); div 477 drivers/clk/ti/fapll.c writel_relaxed(v, synth->div); div 493 drivers/clk/ti/fapll.c void __iomem *div, div 518 drivers/clk/ti/fapll.c synth->div = div; div 607 drivers/clk/ti/fapll.c void __iomem *freq, *div; div 621 drivers/clk/ti/fapll.c div = freq + 4; div 626 drivers/clk/ti/fapll.c div = NULL; div 633 drivers/clk/ti/fapll.c synth_clk = ti_fapll_synth_setup(fd, freq, div, output_instance, div 41 drivers/clk/ti/fixed-factor.c u32 div, mult; div 44 drivers/clk/ti/fixed-factor.c if (of_property_read_u32(node, "ti,clock-div", &div)) { div 60 drivers/clk/ti/fixed-factor.c mult, div); div 31 drivers/clk/uniphier/clk-uniphier-fixed-factor.c fix->div = data->div; div 35 drivers/clk/uniphier/clk-uniphier.h unsigned int div; div 91 drivers/clk/uniphier/clk-uniphier.h .div = (_div), \ div 107 drivers/clk/uniphier/clk-uniphier.h #define UNIPHIER_CLK_DIV(parent, div) \ div 108 drivers/clk/uniphier/clk-uniphier.h UNIPHIER_CLK_FACTOR(parent "/" #div, -1, parent, 1, div) div 62 drivers/clk/zte/clk-zx296702.c { .val = 1, .div = 2, }, div 63 drivers/clk/zte/clk-zx296702.c { .val = 3, .div = 4, }, div 68 drivers/clk/zte/clk-zx296702.c { .val = 0, .div = 1, }, div 69 drivers/clk/zte/clk-zx296702.c { .val = 1, .div = 2, }, div 70 drivers/clk/zte/clk-zx296702.c { .val = 3, .div = 4, }, div 75 drivers/clk/zte/clk-zx296702.c { .val = 0, .div = 1, }, div 76 drivers/clk/zte/clk-zx296702.c { .val = 1, .div = 2, }, div 77 drivers/clk/zte/clk-zx296702.c { .val = 3, .div = 4, }, div 78 drivers/clk/zte/clk-zx296702.c { .val = 5, .div = 6, }, div 79 drivers/clk/zte/clk-zx296702.c { .val = 7, .div = 8, }, div 452 drivers/clk/zte/clk-zx296718.c { .val = 1, .div = 2, }, div 453 drivers/clk/zte/clk-zx296718.c { .val = 3, .div = 4, }, div 621 drivers/clk/zte/clk-zx296718.c &top_div_clk[i].div.hw; div 623 drivers/clk/zte/clk-zx296718.c top_div_clk[i].div.reg += (uintptr_t)reg_base; div 624 drivers/clk/zte/clk-zx296718.c name = top_div_clk[i].div.hw.init->name; div 625 drivers/clk/zte/clk-zx296718.c ret = clk_hw_register(NULL, &top_div_clk[i].div.hw); div 641 drivers/clk/zte/clk-zx296718.c { .val = 0, .div = 1, }, div 642 drivers/clk/zte/clk-zx296718.c { .val = 1, .div = 2, }, div 643 drivers/clk/zte/clk-zx296718.c { .val = 3, .div = 4, }, div 644 drivers/clk/zte/clk-zx296718.c { .val = 5, .div = 6, }, div 645 drivers/clk/zte/clk-zx296718.c { .val = 7, .div = 8, }, div 646 drivers/clk/zte/clk-zx296718.c { .val = 9, .div = 10, }, div 647 drivers/clk/zte/clk-zx296718.c { .val = 11, .div = 12, }, div 648 drivers/clk/zte/clk-zx296718.c { .val = 13, .div = 14, }, div 649 drivers/clk/zte/clk-zx296718.c { .val = 15, .div = 16, }, div 653 drivers/clk/zte/clk-zx296718.c { .val = 0, .div = 1, }, div 654 drivers/clk/zte/clk-zx296718.c { .val = 1, .div = 2, }, div 655 drivers/clk/zte/clk-zx296718.c { .val = 2, .div = 3, }, div 656 drivers/clk/zte/clk-zx296718.c { .val = 3, .div = 4, }, div 657 drivers/clk/zte/clk-zx296718.c { .val = 4, .div = 5, }, div 658 drivers/clk/zte/clk-zx296718.c { .val = 5, .div = 6, }, div 659 drivers/clk/zte/clk-zx296718.c { .val = 6, .div = 7, }, div 660 drivers/clk/zte/clk-zx296718.c { .val = 7, .div = 8, }, div 661 drivers/clk/zte/clk-zx296718.c { .val = 8, .div = 9, }, div 662 drivers/clk/zte/clk-zx296718.c { .val = 9, .div = 10, }, div 663 drivers/clk/zte/clk-zx296718.c { .val = 10, .div = 11, }, div 664 drivers/clk/zte/clk-zx296718.c { .val = 11, .div = 12, }, div 665 drivers/clk/zte/clk-zx296718.c { .val = 12, .div = 13, }, div 666 drivers/clk/zte/clk-zx296718.c { .val = 13, .div = 14, }, div 667 drivers/clk/zte/clk-zx296718.c { .val = 14, .div = 15, }, div 668 drivers/clk/zte/clk-zx296718.c { .val = 15, .div = 16, }, div 788 drivers/clk/zte/clk-zx296718.c &lsp0_div_clk[i].div.hw; div 790 drivers/clk/zte/clk-zx296718.c lsp0_div_clk[i].div.reg += (uintptr_t)reg_base; div 791 drivers/clk/zte/clk-zx296718.c name = lsp0_div_clk[i].div.hw.init->name; div 792 drivers/clk/zte/clk-zx296718.c ret = clk_hw_register(NULL, &lsp0_div_clk[i].div.hw); div 894 drivers/clk/zte/clk-zx296718.c &lsp1_div_clk[i].div.hw; div 896 drivers/clk/zte/clk-zx296718.c lsp1_div_clk[i].div.reg += (uintptr_t)reg_base; div 897 drivers/clk/zte/clk-zx296718.c name = lsp1_div_clk[i].div.hw.init->name; div 898 drivers/clk/zte/clk-zx296718.c ret = clk_hw_register(NULL, &lsp1_div_clk[i].div.hw); div 1009 drivers/clk/zte/clk-zx296718.c &audio_div_clk[i].div.hw; div 1011 drivers/clk/zte/clk-zx296718.c audio_div_clk[i].div.reg += (uintptr_t)reg_base; div 1012 drivers/clk/zte/clk-zx296718.c name = audio_div_clk[i].div.hw.init->name; div 1013 drivers/clk/zte/clk-zx296718.c ret = clk_hw_register(NULL, &audio_div_clk[i].div.hw); div 361 drivers/clk/zte/clk.c unsigned long m, n, div; div 372 drivers/clk/zte/clk.c div = gcd(m, n); div 373 drivers/clk/zte/clk.c m = m / div; div 374 drivers/clk/zte/clk.c n = n / div; div 83 drivers/clk/zte/clk.h .div = _div, \ div 118 drivers/clk/zte/clk.h struct clk_divider div; div 124 drivers/clk/zte/clk.h .div = { \ div 290 drivers/clk/zynqmp/clkc.c u32 mult, div; div 304 drivers/clk/zynqmp/clkc.c div = ret_payload[2]; div 309 drivers/clk/zynqmp/clkc.c div); div 66 drivers/clk/zynqmp/divider.c u32 div, value; div 70 drivers/clk/zynqmp/divider.c ret = eemi_ops->clock_getdivider(clk_id, &div); div 77 drivers/clk/zynqmp/divider.c value = div & 0xFFFF; div 79 drivers/clk/zynqmp/divider.c value = div >> 16; div 150 drivers/clk/zynqmp/divider.c u32 value, div; div 156 drivers/clk/zynqmp/divider.c div = value & 0xFFFF; div 157 drivers/clk/zynqmp/divider.c div |= 0xffff << 16; div 159 drivers/clk/zynqmp/divider.c div = 0xffff; div 160 drivers/clk/zynqmp/divider.c div |= value << 16; div 163 drivers/clk/zynqmp/divider.c ret = eemi_ops->clock_setdivider(clk_id, div); div 194 drivers/clk/zynqmp/divider.c struct zynqmp_clk_divider *div; div 200 drivers/clk/zynqmp/divider.c div = kzalloc(sizeof(*div), GFP_KERNEL); div 201 drivers/clk/zynqmp/divider.c if (!div) div 212 drivers/clk/zynqmp/divider.c div->is_frac = !!(nodes->flag & CLK_FRAC); div 213 drivers/clk/zynqmp/divider.c div->flags = nodes->type_flag; div 214 drivers/clk/zynqmp/divider.c div->hw.init = &init; div 215 drivers/clk/zynqmp/divider.c div->clk_id = clk_id; div 216 drivers/clk/zynqmp/divider.c div->div_type = nodes->type; div 218 drivers/clk/zynqmp/divider.c hw = &div->hw; div 221 drivers/clk/zynqmp/divider.c kfree(div); div 57 drivers/clocksource/timer-armada-370-xp.c #define TIMER0_DIV(div) ((div) << 19) div 61 drivers/clocksource/timer-armada-370-xp.c #define TIMER1_DIV(div) ((div) << 22) div 89 drivers/cpufreq/bmips-cpufreq.c unsigned int div; div 96 drivers/cpufreq/bmips-cpufreq.c div = ((mode >> BMIPS5_CLK_DIV_SHIFT) & BMIPS5_CLK_DIV_MASK); div 99 drivers/cpufreq/bmips-cpufreq.c div = 0; div 102 drivers/cpufreq/bmips-cpufreq.c return htp_freq_to_cpu_freq(priv->clk_mult) / (1 << div); div 108 drivers/cpufreq/bmips-cpufreq.c unsigned int div = policy->freq_table[index].driver_data; div 115 drivers/cpufreq/bmips-cpufreq.c (div << BMIPS5_CLK_DIV_SHIFT)); div 145 drivers/cpufreq/cppc_cpufreq.c u64 mul, div; div 150 drivers/cpufreq/cppc_cpufreq.c div = caps->nominal_perf; div 153 drivers/cpufreq/cppc_cpufreq.c div = caps->nominal_perf - caps->lowest_perf; div 159 drivers/cpufreq/cppc_cpufreq.c div = cpu->perf_caps.highest_perf; div 161 drivers/cpufreq/cppc_cpufreq.c return (u64)perf * mul / div; div 169 drivers/cpufreq/cppc_cpufreq.c u64 mul, div; div 174 drivers/cpufreq/cppc_cpufreq.c div = caps->nominal_freq; div 177 drivers/cpufreq/cppc_cpufreq.c div = caps->lowest_freq; div 183 drivers/cpufreq/cppc_cpufreq.c div = max_khz; div 186 drivers/cpufreq/cppc_cpufreq.c return (u64)freq * mul / div; div 25 drivers/cpufreq/cpufreq-nforce2.c #define NFORCE2_PLL(mul, div) (0x100000 | (mul << 8) | div) div 69 drivers/cpufreq/cpufreq-nforce2.c unsigned char mul, div; div 72 drivers/cpufreq/cpufreq-nforce2.c div = pll & 0xff; div 74 drivers/cpufreq/cpufreq-nforce2.c if (div > 0) div 75 drivers/cpufreq/cpufreq-nforce2.c return NFORCE2_XTAL * mul / div; div 89 drivers/cpufreq/cpufreq-nforce2.c unsigned char mul = 0, div = 0; div 93 drivers/cpufreq/cpufreq-nforce2.c while (((mul == 0) || (div == 0)) && (tried <= 3)) { div 99 drivers/cpufreq/cpufreq-nforce2.c div = xdiv; div 104 drivers/cpufreq/cpufreq-nforce2.c if ((mul == 0) || (div == 0)) div 107 drivers/cpufreq/cpufreq-nforce2.c return NFORCE2_PLL(mul, div); div 203 drivers/cpufreq/s3c2440-cpufreq.c int div; div 205 drivers/cpufreq/s3c2440-cpufreq.c for (div = *divs; div > 0; div = *divs++) { div 206 drivers/cpufreq/s3c2440-cpufreq.c freq = fclk / div; div 208 drivers/cpufreq/s3c2440-cpufreq.c if (freq > max_hclk && div != 1) div 56 drivers/crypto/qat/qat_common/adf_transport.c uint32_t div = data >> shift; div 57 drivers/crypto/qat/qat_common/adf_transport.c uint32_t mult = div << shift; div 54 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c unsigned long div, mul; div 61 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c div = gcd(n, cts); div 63 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c n /= div; div 64 drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c cts /= div; div 156 drivers/gpu/drm/amd/display/modules/color/color_gamma.c struct fixed31_32 base, div; div 169 drivers/gpu/drm/amd/display/modules/color/color_gamma.c div = dc_fixpt_sub(c2, dc_fixpt_mul(c3, l_pow_m1)); div 171 drivers/gpu/drm/amd/display/modules/color/color_gamma.c *out_y = dc_fixpt_pow(dc_fixpt_div(base, div), div 121 drivers/gpu/drm/armada/armada_510.c *sclk = res.div | armada510_clk_sels[idx]; div 835 drivers/gpu/drm/armada/armada_crtc.c u32 div; div 857 drivers/gpu/drm/armada/armada_crtc.c div = 1; div 862 drivers/gpu/drm/armada/armada_crtc.c div = DIV_ROUND_CLOSEST(real_clk_hz, desired_hz); div 863 drivers/gpu/drm/armada/armada_crtc.c if (div == 0 || div > params->div_max) div 867 drivers/gpu/drm/armada/armada_crtc.c real_hz = DIV_ROUND_CLOSEST(real_clk_hz, div); div 871 drivers/gpu/drm/armada/armada_crtc.c i, real_clk_hz, div, real_hz); div 891 drivers/gpu/drm/armada/armada_crtc.c i, real_clk_hz, div, real_hz); div 895 drivers/gpu/drm/armada/armada_crtc.c res->div = div; div 85 drivers/gpu/drm/armada/armada_crtc.h u32 div; div 276 drivers/gpu/drm/ast/ast_main.c uint32_t denum, num, div, ref_pll, dsel; div 377 drivers/gpu/drm/ast/ast_main.c div = 0x4; div 381 drivers/gpu/drm/ast/ast_main.c div = 0x2; div 384 drivers/gpu/drm/ast/ast_main.c div = 0x1; div 387 drivers/gpu/drm/ast/ast_main.c ast->mclk = ref_pll * (num + 2) / ((denum + 2) * (div * 1000)); div 76 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c int div, ret; div 110 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c div = DIV_ROUND_UP(prate, mode_rate); div 111 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c if (div < 2) { div 112 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c div = 2; div 113 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c } else if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK) { div 117 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c div = DIV_ROUND_UP(prate, mode_rate); div 118 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK) div 119 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c div = ATMEL_HLCDC_CLKDIV_MASK; div 125 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c (mode_rate - prate / div))) div 131 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c div = div_low; div 134 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c cfg |= ATMEL_HLCDC_CLKDIV(div); div 787 drivers/gpu/drm/bridge/cdns-dsi.c u32 tmp, reg_wakeup, div; div 848 drivers/gpu/drm/bridge/cdns-dsi.c for (div = 0; div <= CLK_DIV_MAX; div++) { div 858 drivers/gpu/drm/bridge/cdns-dsi.c writel(CLK_DIV(div) | HSTX_TIMEOUT(tmp), div 458 drivers/gpu/drm/bridge/sii902x.c int div = mclk / rate; div 463 drivers/gpu/drm/bridge/sii902x.c unsigned int d = abs(div - sii902x_mclk_div_table[i]); div 909 drivers/gpu/drm/bridge/sil-sii8620.c u8 div; div 929 drivers/gpu/drm/bridge/sil-sii8620.c sii8620_write(ctx, REG_DIV_CTL_MAIN, rates[i].div); div 42 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c #define TO_CLK_DIVISION(div) (((div) & 0xff) << 8) div 43 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c #define TX_ESC_CLK_DIVISION(div) ((div) & 0xff) div 466 drivers/gpu/drm/bridge/tc358767.c int div, best_div = 1; div 486 drivers/gpu/drm/bridge/tc358767.c for (div = 1; div <= 16; div++) { div 491 drivers/gpu/drm/bridge/tc358767.c ext_div[i_post] * div; div 499 drivers/gpu/drm/bridge/tc358767.c clk = (refclk / ext_div[i_pre] / div) * mul; div 513 drivers/gpu/drm/bridge/tc358767.c best_div = div; div 1432 drivers/gpu/drm/i2c/tda998x_drv.c u8 reg, div, rep, sel_clk; div 1524 drivers/gpu/drm/i2c/tda998x_drv.c for (div = 0; div < 3; div++) div 1525 drivers/gpu/drm/i2c/tda998x_drv.c if (80000 >> div <= tmds_clock) div 1556 drivers/gpu/drm/i2c/tda998x_drv.c reg_write(priv, REG_PLL_SERIAL_2, PLL_SERIAL_2_SRL_NOSC(div) | div 1262 drivers/gpu/drm/i915/display/intel_cdclk.c int div; div 1275 drivers/gpu/drm/i915/display/intel_cdclk.c div = 2; div 1279 drivers/gpu/drm/i915/display/intel_cdclk.c div = 3; div 1282 drivers/gpu/drm/i915/display/intel_cdclk.c div = 4; div 1285 drivers/gpu/drm/i915/display/intel_cdclk.c div = 8; div 1292 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, div); div 1554 drivers/gpu/drm/i915/display/intel_cdclk.c int div; div 1567 drivers/gpu/drm/i915/display/intel_cdclk.c div = 2; div 1570 drivers/gpu/drm/i915/display/intel_cdclk.c div = 4; div 1577 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, div); div 12828 drivers/gpu/drm/i915/display/intel_display.c PIPE_CONF_CHECK_X(dsi_pll.div); div 856 drivers/gpu/drm/i915/display/intel_display_types.h u32 ctrl, div; div 6534 drivers/gpu/drm/i915/display/intel_dp.c int div = dev_priv->rawclk_freq / 1000; div 6604 drivers/gpu/drm/i915/display/intel_dp.c REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, (100 * div) / 2 - 1) | div 105 drivers/gpu/drm/i915/display/vlv_dsi_pll.c config->dsi_pll.div = div 142 drivers/gpu/drm/i915/display/vlv_dsi_pll.c config->dsi_pll.div, config->dsi_pll.ctrl); div 157 drivers/gpu/drm/i915/display/vlv_dsi_pll.c vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_DIVIDER, config->dsi_pll.div); div 274 drivers/gpu/drm/i915/display/vlv_dsi_pll.c config->dsi_pll.div = pll_div; div 8112 drivers/gpu/drm/i915/i915_reg.h #define CNP_RAWCLK_DIV(div) ((div) << 16) div 8079 drivers/gpu/drm/i915/intel_pm.c int div = (vidfreq & 0x3f0000) >> 16; div 8086 drivers/gpu/drm/i915/intel_pm.c freq = ((div * 133333) / ((1<<post) * pre)); div 9984 drivers/gpu/drm/i915/intel_pm.c u32 mul, div; div 10009 drivers/gpu/drm/i915/intel_pm.c div = dev_priv->czclk_freq; div 10016 drivers/gpu/drm/i915/intel_pm.c div = 12; div 10019 drivers/gpu/drm/i915/intel_pm.c div = 1; div 10048 drivers/gpu/drm/i915/intel_pm.c return mul_u64_u32_div(time_hw, mul, div); div 277 drivers/gpu/drm/imx/imx-tve.c int div = 1; div 289 drivers/gpu/drm/imx/imx-tve.c div = 2; div 290 drivers/gpu/drm/imx/imx-tve.c clk_set_rate(tve->di_clk, rounded_rate / div); div 402 drivers/gpu/drm/imx/imx-tve.c unsigned long div; div 404 drivers/gpu/drm/imx/imx-tve.c div = *prate / rate; div 405 drivers/gpu/drm/imx/imx-tve.c if (div >= 4) div 407 drivers/gpu/drm/imx/imx-tve.c else if (div >= 2) div 416 drivers/gpu/drm/imx/imx-tve.c unsigned long div; div 420 drivers/gpu/drm/imx/imx-tve.c div = parent_rate / rate; div 421 drivers/gpu/drm/imx/imx-tve.c if (div >= 4) div 423 drivers/gpu/drm/imx/imx-tve.c else if (div >= 2) div 803 drivers/gpu/drm/mcde/mcde_display.c int div; div 806 drivers/gpu/drm/mcde/mcde_display.c for (div = 1; div < max_div; div++) div 807 drivers/gpu/drm/mcde/mcde_display.c if (ppl % div == 0 && ppl / div <= fifo_size) div 808 drivers/gpu/drm/mcde/mcde_display.c return div; div 213 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c unsigned int div; div 223 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c div = 3; div 226 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c div = 2; div 229 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c div = 1; div 239 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c (div << PLL_TXDIV_SHIFT), RG_HDMITX_PLL_TXDIV); div 85 drivers/gpu/drm/meson/meson_overlay.c #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) div 70 drivers/gpu/drm/meson/meson_plane.c #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) div 134 drivers/gpu/drm/meson/meson_vclk.c void meson_vid_pll_set(struct meson_drm *priv, unsigned int div) div 143 drivers/gpu/drm/meson/meson_vclk.c switch (div) { div 202 drivers/gpu/drm/meson/meson_vclk.c if (div == VID_PLL_DIV_1) div 222 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c unsigned int div; div 224 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c div = pll_read(bytediv->reg) & 0xff; div 226 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c return parent_rate / (div + 1); div 53 drivers/gpu/drm/msm/msm_drv.h #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) div 122 drivers/gpu/drm/nouveau/nouveau_backlight.c u32 div = 1025; div 127 drivers/gpu/drm/nouveau/nouveau_backlight.c return ((val * 100) + (div / 2)) / div; div 137 drivers/gpu/drm/nouveau/nouveau_backlight.c u32 div = 1025; div 138 drivers/gpu/drm/nouveau/nouveau_backlight.c u32 val = (bd->props.brightness * div) / 100; div 158 drivers/gpu/drm/nouveau/nouveau_backlight.c u32 div, val; div 160 drivers/gpu/drm/nouveau/nouveau_backlight.c div = nvif_rd32(device, NV50_PDISP_SOR_PWM_DIV(or)); div 163 drivers/gpu/drm/nouveau/nouveau_backlight.c if (div && div >= val) div 164 drivers/gpu/drm/nouveau/nouveau_backlight.c return ((val * 100) + (div / 2)) / div; div 176 drivers/gpu/drm/nouveau/nouveau_backlight.c u32 div, val; div 178 drivers/gpu/drm/nouveau/nouveau_backlight.c div = nvif_rd32(device, NV50_PDISP_SOR_PWM_DIV(or)); div 179 drivers/gpu/drm/nouveau/nouveau_backlight.c val = (bd->props.brightness * div) / 100; div 180 drivers/gpu/drm/nouveau/nouveau_backlight.c if (div) { div 42 drivers/gpu/drm/nouveau/nouveau_led.c u32 div, duty; div 44 drivers/gpu/drm/nouveau/nouveau_led.c div = nvif_rd32(device, 0x61c880) & 0x00ffffff; div 47 drivers/gpu/drm/nouveau/nouveau_led.c if (div > 0) div 48 drivers/gpu/drm/nouveau/nouveau_led.c return duty * LED_FULL / div; div 62 drivers/gpu/drm/nouveau/nouveau_led.c u32 div, duty; div 64 drivers/gpu/drm/nouveau/nouveau_led.c div = input_clk / freq; div 65 drivers/gpu/drm/nouveau/nouveau_led.c duty = value * div / LED_FULL; div 72 drivers/gpu/drm/nouveau/nouveau_led.c nvif_wr32(device, 0x61c880, div); div 40 drivers/gpu/drm/nouveau/nvkm/engine/disp/head.h void (*rgclk)(struct nvkm_head *, int div); div 43 drivers/gpu/drm/nouveau/nvkm/engine/disp/headgf119.c gf119_head_rgclk(struct nvkm_head *head, int div) div 46 drivers/gpu/drm/nouveau/nvkm/engine/disp/headgf119.c nvkm_mask(device, 0x612200 + (head->id * 0x800), 0x0000000f, div); div 41 drivers/gpu/drm/nouveau/nvkm/engine/disp/headnv50.c nv50_head_rgclk(struct nvkm_head *head, int div) div 44 drivers/gpu/drm/nouveau/nvkm/engine/disp/headnv50.c nvkm_mask(device, 0x614200 + (head->id * 0x800), 0x0000000f, div); div 32 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c const int div = sor->asy.link == 3; div 34 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c nvkm_mask(device, 0x614300 + soff, 0x00000707, (div << 8) | div); div 212 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c u32 div = min((ref * 2) / freq, (u32)65); div 213 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c if (div < 2) div 214 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c div = 2; div 216 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c *ddiv = div - 2; div 217 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c return (ref * 2) / div; div 225 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c u32 div = min((ref * 2) / freq, (u32)65); div 226 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c if (div < 2) div 227 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c div = 2; div 229 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c *ddiv = div - 2; div 230 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c return (ref * 2) / div; div 44 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c static u32 div_to_pl(u32 div) div 49 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c if (_pl_to_div[pl] >= div) div 146 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c static u32 div_to_pl(u32 div) div 148 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c return div; div 185 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c calc_P(u32 src, u32 target, int *div) div 188 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c for (*div = 0; *div <= 7; (*div)++) { div 190 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c clk1 = clk0 << (*div ? 1 : 0); div 198 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c (*div)--; div 344 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c calc_div(u32 src, u32 target, int *div) div 347 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c for (*div = 0; *div <= 7; (*div)++) { div 349 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c clk1 = clk0 << (*div ? 1 : 0); div 357 drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c (*div)--; div 141 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c int ref, div, out; div 192 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c div = max(min((ref * 2) / freq, (u32)65), (u32)2) - 2; div 193 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c out = (ref * 2) / (div + 2); div 43 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.c u32 div, duty; div 45 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.c div = nvkm_rd32(device, 0x20340); div 48 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.c return bios->base + bios->pwm_range * duty / div; div 56 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.c u32 div, duty; div 59 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.c div = 27648000 / bios->pwm_freq; div 60 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.c duty = DIV_ROUND_UP((uv - bios->base) * div, bios->pwm_range); div 62 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.c nvkm_wr32(device, 0x20340, div); div 450 drivers/gpu/drm/pl111/pl111_display.c int best_div = 1, div; div 456 drivers/gpu/drm/pl111/pl111_display.c for (div = 1; div < max_div; div++) { div 460 drivers/gpu/drm/pl111/pl111_display.c this_prate = clk_hw_round_rate(parent, rate * div); div 463 drivers/gpu/drm/pl111/pl111_display.c div_rate = DIV_ROUND_UP_ULL(this_prate, div); div 467 drivers/gpu/drm/pl111/pl111_display.c best_div = div; div 480 drivers/gpu/drm/pl111/pl111_display.c int div = pl111_clk_div_choose_div(hw, rate, prate, true); div 482 drivers/gpu/drm/pl111/pl111_display.c return DIV_ROUND_UP_ULL(*prate, div); div 491 drivers/gpu/drm/pl111/pl111_display.c int div; div 496 drivers/gpu/drm/pl111/pl111_display.c div = tim2 & TIM2_PCD_LO_MASK; div 497 drivers/gpu/drm/pl111/pl111_display.c div |= (tim2 & TIM2_PCD_HI_MASK) >> div 499 drivers/gpu/drm/pl111/pl111_display.c div += 2; div 501 drivers/gpu/drm/pl111/pl111_display.c return DIV_ROUND_UP_ULL(prate, div); div 509 drivers/gpu/drm/pl111/pl111_display.c int div = pl111_clk_div_choose_div(hw, rate, &prate, false); div 516 drivers/gpu/drm/pl111/pl111_display.c if (div == 1) { div 519 drivers/gpu/drm/pl111/pl111_display.c div -= 2; div 520 drivers/gpu/drm/pl111/pl111_display.c tim2 |= div & TIM2_PCD_LO_MASK; div 521 drivers/gpu/drm/pl111/pl111_display.c tim2 |= (div >> TIM2_PCD_LO_BITS) << TIM2_PCD_HI_SHIFT; div 541 drivers/gpu/drm/pl111/pl111_display.c struct clk_hw *div = &priv->clk_div; div 565 drivers/gpu/drm/pl111/pl111_display.c div->init = &init; div 567 drivers/gpu/drm/pl111/pl111_display.c ret = devm_clk_hw_register(drm->dev, div); div 569 drivers/gpu/drm/pl111/pl111_display.c priv->clk = div->clk; div 304 drivers/gpu/drm/radeon/dce6_afmt.c unsigned int div = (RREG32(DENTIST_DISPCLK_CNTL) & div 307 drivers/gpu/drm/radeon/dce6_afmt.c div = radeon_audio_decode_dfs_div(div); div 309 drivers/gpu/drm/radeon/dce6_afmt.c if (div) div 310 drivers/gpu/drm/radeon/dce6_afmt.c clock = clock * 100 / div; div 293 drivers/gpu/drm/radeon/evergreen_hdmi.c unsigned int div = (RREG32(DCE41_DENTIST_DISPCLK_CNTL) & div 296 drivers/gpu/drm/radeon/evergreen_hdmi.c div = radeon_audio_decode_dfs_div(div); div 298 drivers/gpu/drm/radeon/evergreen_hdmi.c if (div) div 299 drivers/gpu/drm/radeon/evergreen_hdmi.c clock = 100 * clock / div; div 552 drivers/gpu/drm/radeon/radeon_audio.c unsigned long div, mul; div 559 drivers/gpu/drm/radeon/radeon_audio.c div = gcd(n, cts); div 561 drivers/gpu/drm/radeon/radeon_audio.c n /= div; div 562 drivers/gpu/drm/radeon/radeon_audio.c cts /= div; div 775 drivers/gpu/drm/radeon/radeon_audio.c unsigned int radeon_audio_decode_dfs_div(unsigned int div) div 777 drivers/gpu/drm/radeon/radeon_audio.c if (div >= 8 && div < 64) div 778 drivers/gpu/drm/radeon/radeon_audio.c return (div - 8) * 25 + 200; div 779 drivers/gpu/drm/radeon/radeon_audio.c else if (div >= 64 && div < 96) div 780 drivers/gpu/drm/radeon/radeon_audio.c return (div - 64) * 50 + 1600; div 781 drivers/gpu/drm/radeon/radeon_audio.c else if (div >= 96 && div < 128) div 782 drivers/gpu/drm/radeon/radeon_audio.c return (div - 96) * 100 + 3200; div 82 drivers/gpu/drm/radeon/radeon_audio.h unsigned int radeon_audio_decode_dfs_div(unsigned int div); div 177 drivers/gpu/drm/rcar-du/rcar_du_crtc.c u32 div; div 191 drivers/gpu/drm/rcar-du/rcar_du_crtc.c div = clamp(DIV_ROUND_CLOSEST(rate, target), 1UL, 64UL) - 1; div 192 drivers/gpu/drm/rcar-du/rcar_du_crtc.c diff = abs(rate / (div + 1) - target); div 202 drivers/gpu/drm/rcar-du/rcar_du_crtc.c params->escr = escr | div; div 224 drivers/gpu/drm/rcar-du/rcar_du_crtc.c u32 div = 0; div 241 drivers/gpu/drm/rcar-du/rcar_du_crtc.c div = 1; div 261 drivers/gpu/drm/rcar-du/rcar_du_crtc.c escr = ESCR_DCLKSEL_DCLKIN | div; div 25 drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c u16 div; /* PLL dividers */ div 72 drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c dw_hdmi_phy_i2c_write(hdmi, params->div, RCAR_HDMI_PHY_PLLDIVCTRL); div 186 drivers/gpu/drm/rcar-du/rcar_lvds.c unsigned int div; div 283 drivers/gpu/drm/rcar-du/rcar_lvds.c unsigned int div; div 291 drivers/gpu/drm/rcar-du/rcar_lvds.c div = max(1UL, DIV_ROUND_CLOSEST(fout, target)); div 292 drivers/gpu/drm/rcar-du/rcar_lvds.c diff = abs(fout / div - target); div 299 drivers/gpu/drm/rcar-du/rcar_lvds.c pll->div = div; div 311 drivers/gpu/drm/rcar-du/rcar_lvds.c / div7 / pll->div; div 318 drivers/gpu/drm/rcar-du/rcar_lvds.c pll->pll_m, pll->pll_n, pll->pll_e, pll->div); div 346 drivers/gpu/drm/rcar-du/rcar_lvds.c if (pll.div > 1) div 352 drivers/gpu/drm/rcar-du/rcar_lvds.c LVDDIV_DIVRESET | LVDDIV_DIV(pll.div - 1)); div 301 drivers/gpu/drm/rockchip/rockchip_drm_vop.h #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) div 119 drivers/gpu/drm/sun4i/sun4i_dotclock.c u8 div = parent_rate / rate; div 122 drivers/gpu/drm/sun4i/sun4i_dotclock.c GENMASK(6, 0), div); div 30 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c u8 *div, div 57 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c if (div && half) { div 58 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c *div = best_m; div 149 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c u8 div; div 152 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c &div, &half); div 162 drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c writel(reg | SUN4I_HDMI_PLL_CTRL_DIV(div - tmds->div_offset), div 1185 drivers/gpu/drm/tegra/dc.c copy->div = state->div; div 1632 drivers/gpu/drm/tegra/dc.c unsigned int div) div 1641 drivers/gpu/drm/tegra/dc.c state->div = div; div 1673 drivers/gpu/drm/tegra/dc.c state->div); div 1677 drivers/gpu/drm/tegra/dc.c value = SHIFT_CLK_DIVIDER(state->div) | PIXEL_CLK_DIVIDER_PCD1; div 23 drivers/gpu/drm/tegra/dc.h unsigned int div; div 154 drivers/gpu/drm/tegra/dc.h unsigned int div); div 45 drivers/gpu/drm/tegra/dsi.c unsigned int div; div 489 drivers/gpu/drm/tegra/dsi.c unsigned int hact, hsw, hbp, hfp, i, mul, div; div 501 drivers/gpu/drm/tegra/dsi.c div = state->div; div 547 drivers/gpu/drm/tegra/dsi.c hact = mode->hdisplay * mul / div; div 550 drivers/gpu/drm/tegra/dsi.c hsw = (mode->hsync_end - mode->hsync_start) * mul / div; div 553 drivers/gpu/drm/tegra/dsi.c hbp = (mode->htotal - mode->hsync_end) * mul / div; div 559 drivers/gpu/drm/tegra/dsi.c hfp = (mode->hsync_start - mode->hdisplay) * mul / div; div 572 drivers/gpu/drm/tegra/dsi.c tegra_dsi_writel(dsi, 8 * mul / div, DSI_SOL_DELAY); div 582 drivers/gpu/drm/tegra/dsi.c bytes = 1 + (mode->hdisplay / 2) * mul / div; div 585 drivers/gpu/drm/tegra/dsi.c bytes = 1 + mode->hdisplay * mul / div; div 604 drivers/gpu/drm/tegra/dsi.c delay = DIV_ROUND_UP(delay * mul, div * lanes); div 608 drivers/gpu/drm/tegra/dsi.c bclk = DIV_ROUND_UP(mode->htotal * mul, div * lanes); div 613 drivers/gpu/drm/tegra/dsi.c value = 8 * mul / div; div 959 drivers/gpu/drm/tegra/dsi.c err = tegra_dsi_get_muldiv(dsi->format, &state->mul, &state->div); div 972 drivers/gpu/drm/tegra/dsi.c state->bclk = (state->pclk * state->mul) / (state->div * state->lanes); div 974 drivers/gpu/drm/tegra/dsi.c DRM_DEBUG_KMS("mul: %u, div: %u, lanes: %u\n", state->mul, state->div, div 1013 drivers/gpu/drm/tegra/dsi.c scdiv = ((8 * state->mul) / (state->div * state->lanes)) - 2; div 14 drivers/gpu/drm/tegra/hda.c unsigned int mul, div, bits, channels; div 27 drivers/gpu/drm/tegra/hda.c div = (format & AC_FMT_DIV_MASK) >> AC_FMT_DIV_SHIFT; div 29 drivers/gpu/drm/tegra/hda.c fmt->sample_rate *= (mul + 1) / (div + 1); div 176 drivers/gpu/drm/tegra/rgb.c unsigned int div; div 195 drivers/gpu/drm/tegra/rgb.c div = ((clk_get_rate(rgb->clk) * 2) / pclk) - 2; div 199 drivers/gpu/drm/tegra/rgb.c pclk, div); div 2431 drivers/gpu/drm/tegra/sor.c unsigned int div, i; div 2448 drivers/gpu/drm/tegra/sor.c div = clk_get_rate(sor->clk) / 1000000 * 4; div 2550 drivers/gpu/drm/tegra/sor.c value = SOR_REFCLK_DIV_INT(div) | SOR_REFCLK_DIV_FRAC(div); div 1384 drivers/gpu/drm/vc4/vc4_dsi.c int div; div 1416 drivers/gpu/drm/vc4/vc4_dsi.c fix->div = phy_clocks[i].div; div 46 drivers/gpu/drm/zte/zx_plane.c #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) div 402 drivers/gpu/drm/zte/zx_vga.c int div; div 408 drivers/gpu/drm/zte/zx_vga.c div = DIV_ROUND_UP(ref / 1000, 400 * 4) - 1; div 409 drivers/gpu/drm/zte/zx_vga.c zx_writel(vga->mmio + VGA_CLK_DIV_FS, div); div 266 drivers/gpu/ipu-v3/ipu-di.c struct ipu_di_signal_cfg *sig, int div) div 281 drivers/gpu/ipu-v3/ipu-di.c .offset_count = div * sig->v_to_h_sync, div 341 drivers/gpu/ipu-v3/ipu-di.c .offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */ div 367 drivers/gpu/ipu-v3/ipu-di.c .offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */ div 426 drivers/gpu/ipu-v3/ipu-di.c unsigned div; div 431 drivers/gpu/ipu-v3/ipu-di.c div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock); div 432 drivers/gpu/ipu-v3/ipu-di.c div = clamp(div, 1U, 255U); div 434 drivers/gpu/ipu-v3/ipu-di.c clkgen0 = div << 4; div 445 drivers/gpu/ipu-v3/ipu-di.c unsigned div, error; div 448 drivers/gpu/ipu-v3/ipu-di.c div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock); div 449 drivers/gpu/ipu-v3/ipu-di.c div = clamp(div, 1U, 255U); div 450 drivers/gpu/ipu-v3/ipu-di.c rate = clkrate / div; div 455 drivers/gpu/ipu-v3/ipu-di.c rate, div, (signed)(error - 1000) / 10, error % 10); div 461 drivers/gpu/ipu-v3/ipu-di.c clkgen0 = div << 4; div 464 drivers/gpu/ipu-v3/ipu-di.c unsigned div; div 471 drivers/gpu/ipu-v3/ipu-di.c div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock); div 472 drivers/gpu/ipu-v3/ipu-di.c div = clamp(div, 1U, 255U); div 474 drivers/gpu/ipu-v3/ipu-di.c clkgen0 = div << 4; div 561 drivers/gpu/ipu-v3/ipu-di.c u32 div; div 575 drivers/gpu/ipu-v3/ipu-di.c div = ipu_di_read(di, DI_BS_CLKGEN0) & 0xfff; div 576 drivers/gpu/ipu-v3/ipu-di.c div = div / 16; /* Now divider is integer portion */ div 580 drivers/gpu/ipu-v3/ipu-di.c ipu_di_write(di, (div << 16), DI_BS_CLKGEN1); div 582 drivers/gpu/ipu-v3/ipu-di.c ipu_di_data_wave_config(di, SYNC_WAVE, div - 1, div - 1); div 583 drivers/gpu/ipu-v3/ipu-di.c ipu_di_data_pin_config(di, SYNC_WAVE, DI_PIN15, 3, 0, div * 2); div 596 drivers/gpu/ipu-v3/ipu-di.c ipu_di_sync_config_noninterlaced(di, sig, div); div 1300 drivers/hid/hid-wiimote-modules.c __s32 val[4], tmp, div; div 1351 drivers/hid/hid-wiimote-modules.c div = s->calib_bboard[i][1] - s->calib_bboard[i][0]; div 1352 drivers/hid/hid-wiimote-modules.c tmp /= div ? div : 1; div 1356 drivers/hid/hid-wiimote-modules.c div = s->calib_bboard[i][2] - s->calib_bboard[i][1]; div 1357 drivers/hid/hid-wiimote-modules.c tmp /= div ? div : 1; div 462 drivers/hsi/controllers/omap_ssi_port.c u32 div; div 470 drivers/hsi/controllers/omap_ssi_port.c div = ssi_calculate_div(ssi); div 471 drivers/hsi/controllers/omap_ssi_port.c if (div > SSI_MAX_DIVISOR) { div 473 drivers/hsi/controllers/omap_ssi_port.c cl->tx_cfg.speed, div); div 484 drivers/hsi/controllers/omap_ssi_port.c writel_relaxed(div, sst + SSI_SST_DIVISOR_REG); div 501 drivers/hsi/controllers/omap_ssi_port.c omap_port->sst.divisor = div; div 1280 drivers/hsi/controllers/omap_ssi_port.c u32 div = ssi_calculate_div(ssi); div 1281 drivers/hsi/controllers/omap_ssi_port.c omap_port->sst.divisor = div; div 197 drivers/hwmon/adm1026.c #define FAN_TO_REG(val, div) ((val) <= 0 ? 0xff : \ div 198 drivers/hwmon/adm1026.c clamp_val(1350000 / ((val) * (div)), \ div 200 drivers/hwmon/adm1026.c #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 0xff ? 0 : \ div 201 drivers/hwmon/adm1026.c 1350000 / ((val) * (div))) div 209 drivers/hwmon/adm1031.c #define FAN_FROM_REG(reg, div) ((reg) ? \ div 210 drivers/hwmon/adm1031.c (11250 * 60) / ((reg) * (div)) : 0) div 212 drivers/hwmon/adm1031.c static int FAN_TO_REG(int reg, int div) div 215 drivers/hwmon/adm1031.c tmp = FAN_FROM_REG(clamp_val(reg, 0, 65535), div); div 70 drivers/hwmon/adm9240.c static inline int SCALE(long val, int mul, int div) div 73 drivers/hwmon/adm9240.c return (val * mul - div / 2) / div; div 75 drivers/hwmon/adm9240.c return (val * mul + div / 2) / div; div 100 drivers/hwmon/adm9240.c static inline unsigned int FAN_FROM_REG(u8 reg, u8 div) div 108 drivers/hwmon/adm9240.c return SCALE(1350000, 1, reg * div); div 113 drivers/hwmon/asb100.c static u8 FAN_TO_REG(long rpm, int div) div 120 drivers/hwmon/asb100.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); div 123 drivers/hwmon/asb100.c static int FAN_FROM_REG(u8 val, int div) div 125 drivers/hwmon/asb100.c return val == 0 ? -1 : val == 255 ? 0 : 1350000 / (val * div); div 61 drivers/hwmon/g760a.c static inline unsigned int rpm_from_cnt(u8 val, u32 clk, u16 div) div 63 drivers/hwmon/g760a.c return ((val == 0x00) ? 0 : ((clk*30)/(val*div))); div 80 drivers/hwmon/gl518sm.c static inline u8 FAN_TO_REG(long rpm, int div) div 85 drivers/hwmon/gl518sm.c rpmdiv = clamp_val(rpm, 1, 960000) * div; div 88 drivers/hwmon/gl518sm.c #define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : (480000 / ((val) * (div)))) div 329 drivers/hwmon/gl520sm.c #define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : (480000 / ((val) << (div)))) div 331 drivers/hwmon/gl520sm.c #define FAN_BASE(div) (480000 >> (div)) div 332 drivers/hwmon/gl520sm.c #define FAN_CLAMP(val, div) clamp_val(val, FAN_BASE(div) / 255, \ div 333 drivers/hwmon/gl520sm.c FAN_BASE(div)) div 334 drivers/hwmon/gl520sm.c #define FAN_TO_REG(val, div) ((val) == 0 ? 0 : \ div 336 drivers/hwmon/gl520sm.c FAN_CLAMP(val, div) << (div))) div 592 drivers/hwmon/it87.c static inline u8 FAN_TO_REG(long rpm, int div) div 597 drivers/hwmon/it87.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); div 607 drivers/hwmon/it87.c #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \ div 608 drivers/hwmon/it87.c 1350000 / ((val) * (div))) div 79 drivers/hwmon/lm78.c static inline u8 FAN_TO_REG(long rpm, int div) div 85 drivers/hwmon/lm78.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); div 88 drivers/hwmon/lm78.c static inline int FAN_FROM_REG(u8 val, int div) div 90 drivers/hwmon/lm78.c return val == 0 ? -1 : val == 255 ? 0 : 1350000 / (val * div); div 65 drivers/hwmon/lm80.c static inline unsigned char FAN_TO_REG(unsigned rpm, unsigned div) div 70 drivers/hwmon/lm80.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); div 73 drivers/hwmon/lm80.c #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \ div 74 drivers/hwmon/lm80.c (val) == 255 ? 0 : 1350000/((div) * (val))) div 119 drivers/hwmon/lm87.c #define FAN_FROM_REG(reg, div) ((reg) == 255 || (reg) == 0 ? 0 : \ div 120 drivers/hwmon/lm87.c (1350000 + (reg)*(div) / 2) / ((reg) * (div))) div 121 drivers/hwmon/lm87.c #define FAN_TO_REG(val, div) ((val) * (div) * 255 <= 1350000 ? 255 : \ div 122 drivers/hwmon/lm87.c (1350000 + (val)*(div) / 2) / ((val) * (div))) div 112 drivers/hwmon/pc87360.c #define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : \ div 113 drivers/hwmon/pc87360.c 480000 / ((val) * (div))) div 114 drivers/hwmon/pc87360.c #define FAN_TO_REG(val, div) ((val) <= 100 ? 0 : \ div 115 drivers/hwmon/pc87360.c 480000 / ((val) * (div))) div 167 drivers/hwmon/s3c-hwmon.c ret = DIV_ROUND_CLOSEST(ret, cfg->div); div 317 drivers/hwmon/s3c-hwmon.c if (cfg->div == 0) { div 126 drivers/hwmon/sis5595.c static inline u8 FAN_TO_REG(long rpm, int div) div 132 drivers/hwmon/sis5595.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); div 135 drivers/hwmon/sis5595.c static inline int FAN_FROM_REG(u8 val, int div) div 137 drivers/hwmon/sis5595.c return val == 0 ? -1 : val == 255 ? 0 : 1350000 / (val * div); div 106 drivers/hwmon/smsc47m1.c #define MIN_FROM_REG(reg, div) ((reg) >= 192 ? 0 : \ div 107 drivers/hwmon/smsc47m1.c 983040 / ((192 - (reg)) * (div))) div 108 drivers/hwmon/smsc47m1.c #define FAN_FROM_REG(reg, div, preload) ((reg) <= (preload) || (reg) == 255 ? \ div 110 drivers/hwmon/smsc47m1.c 983040 / (((reg) - (preload)) * (div))) div 47 drivers/hwmon/smsc47m192.c static inline int SCALE(long val, int mul, int div) div 50 drivers/hwmon/smsc47m192.c return (val * mul - div / 2) / div; div 52 drivers/hwmon/smsc47m192.c return (val * mul + div / 2) / div; div 157 drivers/hwmon/via686a.c static inline u8 FAN_TO_REG(long rpm, int div) div 162 drivers/hwmon/via686a.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 255); div 165 drivers/hwmon/via686a.c #define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : (val) == 255 ? 0 : 1350000 / \ div 166 drivers/hwmon/via686a.c ((val) * (div))) div 170 drivers/hwmon/vt1211.c #define RPM_FROM_REG(reg, div) (((reg) == 0) || ((reg) == 255) ? 0 : \ div 171 drivers/hwmon/vt1211.c 1310720 / (reg) / DIV_FROM_REG(div)) div 172 drivers/hwmon/vt1211.c #define RPM_TO_REG(val, div) ((val) == 0 ? 255 : \ div 174 drivers/hwmon/vt1211.c DIV_FROM_REG(div)), 1, 254)) div 133 drivers/hwmon/vt8231.c static inline u8 FAN_TO_REG(long rpm, int div) div 137 drivers/hwmon/vt8231.c return clamp_val(1310720 / (rpm * div), 1, 255); div 140 drivers/hwmon/vt8231.c #define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : 1310720 / ((val) * (div))) div 253 drivers/hwmon/w83627hf.c static inline u8 FAN_TO_REG(long rpm, int div) div 258 drivers/hwmon/w83627hf.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); div 280 drivers/hwmon/w83627hf.c #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div))) div 153 drivers/hwmon/w83781d.c FAN_TO_REG(long rpm, int div) div 158 drivers/hwmon/w83781d.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); div 162 drivers/hwmon/w83781d.c FAN_FROM_REG(u8 val, int div) div 168 drivers/hwmon/w83781d.c return 1350000 / (val * div); div 213 drivers/hwmon/w83791d.c static u8 fan_to_reg(long rpm, int div) div 218 drivers/hwmon/w83791d.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); div 221 drivers/hwmon/w83791d.c #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \ div 223 drivers/hwmon/w83791d.c 1350000 / ((val) * (div)))) div 221 drivers/hwmon/w83792d.c FAN_TO_REG(long rpm, int div) div 226 drivers/hwmon/w83792d.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); div 229 drivers/hwmon/w83792d.c #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \ div 231 drivers/hwmon/w83792d.c 1350000 / ((val) * (div)))) div 72 drivers/hwmon/w83l786ng.c FAN_TO_REG(long rpm, int div) div 77 drivers/hwmon/w83l786ng.c return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); div 80 drivers/hwmon/w83l786ng.c #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \ div 82 drivers/hwmon/w83l786ng.c 1350000 / ((val) * (div)))) div 48 drivers/i2c/busses/i2c-at91-master.c int ckdiv, cdiv, div, hold = 0; div 56 drivers/i2c/busses/i2c-at91-master.c div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk), div 58 drivers/i2c/busses/i2c-at91-master.c ckdiv = fls(div >> 8); div 59 drivers/i2c/busses/i2c-at91-master.c cdiv = div >> ckdiv; div 107 drivers/i2c/busses/i2c-bcm2835.c struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw); div 114 drivers/i2c/busses/i2c-bcm2835.c bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DIV, divider); div 129 drivers/i2c/busses/i2c-bcm2835.c bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DEL, div 146 drivers/i2c/busses/i2c-bcm2835.c struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw); div 147 drivers/i2c/busses/i2c-bcm2835.c u32 divider = bcm2835_i2c_readl(div->i2c_dev, BCM2835_I2C_DIV); div 73 drivers/i2c/busses/i2c-efm32.c #define REG_CLKDIV_DIV(div) MASK_VAL(REG_CLKDIV_DIV__MASK, (div)) div 286 drivers/i2c/busses/i2c-exynos5.c int div, clk_cycle, temp; div 307 drivers/i2c/busses/i2c-exynos5.c div = temp / 512; div 308 drivers/i2c/busses/i2c-exynos5.c clk_cycle = temp / (div + 1) - 2; div 309 drivers/i2c/busses/i2c-exynos5.c if (temp < 4 || div >= 256 || clk_cycle < 2) { div 326 drivers/i2c/busses/i2c-exynos5.c i2c_timing_s3 = div << 16 | t_sr_release << 0; div 334 drivers/i2c/busses/i2c-exynos5.c div, t_sr_release); div 121 drivers/i2c/busses/i2c-imx.c u16 div; div 481 drivers/i2c/busses/i2c-imx.c unsigned int div; div 490 drivers/i2c/busses/i2c-imx.c div = (i2c_clk_rate + i2c_imx->bitrate - 1) / i2c_imx->bitrate; div 491 drivers/i2c/busses/i2c-imx.c if (div < i2c_clk_div[0].div) div 493 drivers/i2c/busses/i2c-imx.c else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div) div 496 drivers/i2c/busses/i2c-imx.c for (i = 0; i2c_clk_div[i].div < div; i++) div 508 drivers/i2c/busses/i2c-imx.c i2c_imx->disable_delay = (500000U * i2c_clk_div[i].div div 513 drivers/i2c/busses/i2c-imx.c i2c_clk_rate, div); div 515 drivers/i2c/busses/i2c-imx.c i2c_clk_div[i].val, i2c_clk_div[i].div); div 133 drivers/i2c/busses/i2c-meson.c unsigned int div; div 135 drivers/i2c/busses/i2c-meson.c div = DIV_ROUND_UP(clk_rate, freq * i2c->data->div_factor); div 138 drivers/i2c/busses/i2c-meson.c if (div >= (1 << 12)) { div 140 drivers/i2c/busses/i2c-meson.c div = (1 << 12) - 1; div 144 drivers/i2c/busses/i2c-meson.c (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT); div 147 drivers/i2c/busses/i2c-meson.c (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT); div 150 drivers/i2c/busses/i2c-meson.c clk_rate, freq, div); div 204 drivers/i2c/busses/i2c-mpc.c const struct mpc_i2c_divider *div = NULL; div 223 drivers/i2c/busses/i2c-mpc.c div = &mpc_i2c_dividers_52xx[i]; div 225 drivers/i2c/busses/i2c-mpc.c if (div->fdr & 0xc0 && pvr == 0x80822011) div 227 drivers/i2c/busses/i2c-mpc.c if (div->divider >= divider) div 231 drivers/i2c/busses/i2c-mpc.c *real_clk = mpc5xxx_get_bus_frequency(node) / div->divider; div 232 drivers/i2c/busses/i2c-mpc.c return (int)div->fdr; div 391 drivers/i2c/busses/i2c-mpc.c const struct mpc_i2c_divider *div = NULL; div 412 drivers/i2c/busses/i2c-mpc.c div = &mpc_i2c_dividers_8xxx[i]; div 413 drivers/i2c/busses/i2c-mpc.c if (div->divider >= divider) div 417 drivers/i2c/busses/i2c-mpc.c *real_clk = fsl_get_sys_freq() / prescaler / div->divider; div 418 drivers/i2c/busses/i2c-mpc.c return div ? (int)div->fdr : -EINVAL; div 351 drivers/i2c/busses/i2c-nomadik.c u32 i2c_clk, div; div 399 drivers/i2c/busses/i2c-nomadik.c div = (dev->clk_freq > 100000) ? 3 : 2; div 409 drivers/i2c/busses/i2c-nomadik.c brcr2 = (i2c_clk/(dev->clk_freq * div)) & 0xffff; div 184 drivers/iio/adc/npcm_adc.c u32 div; div 212 drivers/iio/adc/npcm_adc.c div = reg_con & NPCM_ADCCON_DIV_MASK; div 213 drivers/iio/adc/npcm_adc.c div = div >> NPCM_ADCCON_DIV_SHIFT; div 214 drivers/iio/adc/npcm_adc.c info->adc_sample_hz = clk_get_rate(info->adc_clk) / ((div + 1) * 2); div 174 drivers/iio/adc/stm32-adc-core.c int div; div 202 drivers/iio/adc/stm32-adc-core.c int i, div; div 229 drivers/iio/adc/stm32-adc-core.c div = stm32h7_adc_ckmodes_spec[i].div; div 234 drivers/iio/adc/stm32-adc-core.c if ((rate / div) <= priv->cfg->max_clk_rate_hz) div 249 drivers/iio/adc/stm32-adc-core.c div = stm32h7_adc_ckmodes_spec[i].div; div 254 drivers/iio/adc/stm32-adc-core.c if ((rate / div) <= priv->cfg->max_clk_rate_hz) div 263 drivers/iio/adc/stm32-adc-core.c priv->common.rate = rate / div; div 273 drivers/iio/adc/stm32-adc-core.c ckmode ? "bus" : "adc", div, priv->common.rate / 1000); div 342 drivers/iio/adc/xilinx-xadc-core.c unsigned int div; div 365 drivers/iio/adc/xilinx-xadc-core.c div = 2; div 367 drivers/iio/adc/xilinx-xadc-core.c div = pcap_rate / tck_rate; div 368 drivers/iio/adc/xilinx-xadc-core.c if (pcap_rate / div > XADC_ZYNQ_TCK_RATE_MAX) div 369 drivers/iio/adc/xilinx-xadc-core.c div++; div 372 drivers/iio/adc/xilinx-xadc-core.c if (div <= 3) div 374 drivers/iio/adc/xilinx-xadc-core.c else if (div <= 7) div 376 drivers/iio/adc/xilinx-xadc-core.c else if (div <= 15) div 400 drivers/iio/adc/xilinx-xadc-core.c unsigned int div; div 407 drivers/iio/adc/xilinx-xadc-core.c div = 4; div 410 drivers/iio/adc/xilinx-xadc-core.c div = 8; div 413 drivers/iio/adc/xilinx-xadc-core.c div = 16; div 416 drivers/iio/adc/xilinx-xadc-core.c div = 2; div 420 drivers/iio/adc/xilinx-xadc-core.c return clk_get_rate(xadc->clk) / div; div 849 drivers/iio/adc/xilinx-xadc-core.c unsigned int div; div 857 drivers/iio/adc/xilinx-xadc-core.c div = (val16 & XADC_CONF2_DIV_MASK) >> XADC_CONF2_DIV_OFFSET; div 858 drivers/iio/adc/xilinx-xadc-core.c if (div < 2) div 859 drivers/iio/adc/xilinx-xadc-core.c div = 2; div 861 drivers/iio/adc/xilinx-xadc-core.c return xadc_get_dclk_rate(xadc) / div / 26; div 934 drivers/iio/adc/xilinx-xadc-core.c unsigned int div; div 956 drivers/iio/adc/xilinx-xadc-core.c div = clk_rate / val; div 957 drivers/iio/adc/xilinx-xadc-core.c if (clk_rate / div / 26 > XADC_MAX_SAMPLERATE) div 958 drivers/iio/adc/xilinx-xadc-core.c div++; div 959 drivers/iio/adc/xilinx-xadc-core.c if (div < 2) div 960 drivers/iio/adc/xilinx-xadc-core.c div = 2; div 961 drivers/iio/adc/xilinx-xadc-core.c else if (div > 0xff) div 962 drivers/iio/adc/xilinx-xadc-core.c div = 0xff; div 965 drivers/iio/adc/xilinx-xadc-core.c div << XADC_CONF2_DIV_OFFSET); div 352 drivers/iio/humidity/hts221_core.c s32 rem, div, data; div 357 drivers/iio/humidity/hts221_core.c div = (1 << 4) * 1000; div 361 drivers/iio/humidity/hts221_core.c div = (1 << 6) * 1000; div 367 drivers/iio/humidity/hts221_core.c tmp = div_s64(data * 1000000000LL, div); div 381 drivers/iio/humidity/hts221_core.c s32 rem, div, data; div 386 drivers/iio/humidity/hts221_core.c div = hw->sensors[HTS221_SENSOR_H].slope; div 390 drivers/iio/humidity/hts221_core.c div = hw->sensors[HTS221_SENSOR_T].slope; div 396 drivers/iio/humidity/hts221_core.c tmp = div_s64(data * 1000000000LL, div); div 107 drivers/iio/trigger/stm32-timer-trigger.c unsigned long long prd, div; div 112 drivers/iio/trigger/stm32-timer-trigger.c div = (unsigned long long)clk_get_rate(priv->clk); div 114 drivers/iio/trigger/stm32-timer-trigger.c do_div(div, frequency); div 116 drivers/iio/trigger/stm32-timer-trigger.c prd = div; div 122 drivers/iio/trigger/stm32-timer-trigger.c while (div > priv->max_arr) { div 124 drivers/iio/trigger/stm32-timer-trigger.c div = prd; div 125 drivers/iio/trigger/stm32-timer-trigger.c do_div(div, (prescaler + 1)); div 127 drivers/iio/trigger/stm32-timer-trigger.c prd = div; div 767 drivers/infiniband/hw/hfi1/pcie.c u8 div) div 780 drivers/infiniband/hw/hfi1/pcie.c c_minus1 = eq[i][PREC] / div; div 781 drivers/infiniband/hw/hfi1/pcie.c c0 = fs - (eq[i][PREC] / div) - (eq[i][POST] / div); div 782 drivers/infiniband/hw/hfi1/pcie.c c_plus1 = eq[i][POST] / div; div 997 drivers/infiniband/hw/hfi1/pcie.c u8 div; div 1135 drivers/infiniband/hw/hfi1/pcie.c div = 3; div 1145 drivers/infiniband/hw/hfi1/pcie.c div = 1; div 1157 drivers/infiniband/hw/hfi1/pcie.c ret = load_eq_table(dd, eq, fs, div); div 112 drivers/input/keyboard/lkkbd.c #define LK_CMD_SET_MODE(mode, div) ((mode) | ((div) << 3)) div 1886 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c ((y * step + l) / (vdiv * div)) * tpg->bytesperline[p] + \ div 1929 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned p, unsigned first, unsigned div, unsigned step, div 1936 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned p, unsigned first, unsigned div, unsigned step, div 1943 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned p, unsigned first, unsigned div, unsigned step, div 1950 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned p, unsigned first, unsigned div, unsigned step, div 1960 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned div = step; div 1983 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c div = 2; div 1989 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg_print_str_2(tpg, basep, p, first, div, step, y, x, div 1993 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg_print_str_4(tpg, basep, p, first, div, step, y, x, div 1997 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg_print_str_6(tpg, basep, p, first, div, step, y, x, div 2001 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg_print_str_8(tpg, basep, p, first, div, step, y, x, div 60 drivers/media/dvb-frontends/bsbe1.h u32 div; div 67 drivers/media/dvb-frontends/bsbe1.h div = p->frequency / 1000; div 68 drivers/media/dvb-frontends/bsbe1.h data[0] = (div >> 8) & 0x7f; div 69 drivers/media/dvb-frontends/bsbe1.h data[1] = div & 0xff; div 70 drivers/media/dvb-frontends/bsbe1.h data[2] = 0x80 | ((div & 0x18000) >> 10) | 0x1; div 91 drivers/media/dvb-frontends/bsru6.h u32 div; div 98 drivers/media/dvb-frontends/bsru6.h div = (p->frequency + (125 - 1)) / 125; /* round correctly */ div 99 drivers/media/dvb-frontends/bsru6.h buf[0] = (div >> 8) & 0x7f; div 100 drivers/media/dvb-frontends/bsru6.h buf[1] = div & 0xff; div 101 drivers/media/dvb-frontends/bsru6.h buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4; div 431 drivers/media/dvb-frontends/cx24123.c u32 div = a / b; div 433 drivers/media/dvb-frontends/cx24123.c ++div; div 434 drivers/media/dvb-frontends/cx24123.c if (div < (1UL << 31)) { div 435 drivers/media/dvb-frontends/cx24123.c for (exp = 1; div > exp; nearest++) div 601 drivers/media/dvb-frontends/dvb-pll.c u32 div; div 616 drivers/media/dvb-frontends/dvb-pll.c div = (frequency + desc->iffreq + div 618 drivers/media/dvb-frontends/dvb-pll.c buf[0] = div >> 8; div 619 drivers/media/dvb-frontends/dvb-pll.c buf[1] = div & 0xff; div 628 drivers/media/dvb-frontends/dvb-pll.c desc->name, div, buf[0], buf[1], buf[2], buf[3]); div 631 drivers/media/dvb-frontends/dvb-pll.c return (div * desc->entries[i].stepsize) - desc->iffreq; div 306 drivers/media/dvb-frontends/mt352.c u16 div; div 327 drivers/media/dvb-frontends/mt352.c div = (mt352_read_register(state, CHAN_START_1) << 8) | mt352_read_register(state, CHAN_START_0); div 389 drivers/media/dvb-frontends/mt352.c op->frequency = (500 * (div - IF_FREQUENCYx6)) / 3 * 1000; div 541 drivers/media/dvb-frontends/stb0899_drv.c u32 mclk = 0, div = 0; div 543 drivers/media/dvb-frontends/stb0899_drv.c div = stb0899_read_reg(state, STB0899_NCOARSE); div 544 drivers/media/dvb-frontends/stb0899_drv.c mclk = (div + 1) * state->config->xtal_freq / 6; div 545 drivers/media/dvb-frontends/stb0899_drv.c dprintk(state->verbose, FE_DEBUG, 1, "div=%d, mclk=%d", div, mclk); div 1197 drivers/media/dvb-frontends/stb0899_drv.c u8 div, reg; div 1205 drivers/media/dvb-frontends/stb0899_drv.c div = (internal->master_clk / 100) / 5632; div 1206 drivers/media/dvb-frontends/stb0899_drv.c div = (div + 5) / 10; div 1211 drivers/media/dvb-frontends/stb0899_drv.c stb0899_write_reg(state, STB0899_ACRDIV1, div); div 273 drivers/media/dvb-frontends/stv0900_core.c u32 mclk, div, ad_div; div 275 drivers/media/dvb-frontends/stv0900_core.c div = stv0900_get_bits(intp, F0900_M_DIV); div 278 drivers/media/dvb-frontends/stv0900_core.c mclk = (div + 1) * ext_clk / ad_div; div 3681 drivers/media/dvb-frontends/stv090x.c s32 div; div 3700 drivers/media/dvb-frontends/stv090x.c div = stv090x_s2cn_tab[last].real - div 3705 drivers/media/dvb-frontends/stv090x.c *cnr = val * 0xFFFF / div; div 3725 drivers/media/dvb-frontends/stv090x.c div = stv090x_s1cn_tab[last].real - div 3728 drivers/media/dvb-frontends/stv090x.c *cnr = val * 0xFFFF / div; div 4259 drivers/media/dvb-frontends/stv090x.c u32 div, reg; div 4262 drivers/media/dvb-frontends/stv090x.c div = stv090x_read_reg(state, STV090x_NCOARSE); div 4266 drivers/media/dvb-frontends/stv090x.c return (div + 1) * config->xtal / ratio; /* kHz */ div 4272 drivers/media/dvb-frontends/stv090x.c u32 reg, div, clk_sel; div 4277 drivers/media/dvb-frontends/stv090x.c div = ((clk_sel * mclk) / config->xtal) - 1; div 4280 drivers/media/dvb-frontends/stv090x.c STV090x_SETFIELD(reg, M_DIV_FIELD, div); div 4287 drivers/media/dvb-frontends/stv090x.c div = state->internal->mclk / 704000; div 4288 drivers/media/dvb-frontends/stv090x.c if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0) div 4290 drivers/media/dvb-frontends/stv090x.c if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0) div 453 drivers/media/dvb-frontends/stv6111.c u32 p = 1, psel = 0, fvco, div, frac; div 469 drivers/media/dvb-frontends/stv6111.c div = fvco / state->ref_freq; div 492 drivers/media/dvb-frontends/stv6111.c state->reg[0x04] = (div & 0xFF); div 493 drivers/media/dvb-frontends/stv6111.c state->reg[0x05] = (((div >> 8) & 0x01) | ((frac & 0x7F) << 1)) & 0xff; div 553 drivers/media/dvb-frontends/tda10071.c u8 mode, rolloff, pilot, inversion, div; div 651 drivers/media/dvb-frontends/tda10071.c div = 14; div 653 drivers/media/dvb-frontends/tda10071.c div = 4; div 655 drivers/media/dvb-frontends/tda10071.c ret = regmap_write(dev->regmap, 0x81, div); div 659 drivers/media/dvb-frontends/tda10071.c ret = regmap_write(dev->regmap, 0xe3, div); div 65 drivers/media/dvb-frontends/tda826x.c u32 div; div 73 drivers/media/dvb-frontends/tda826x.c div = (p->frequency + (1000-1)) / 1000; div 89 drivers/media/dvb-frontends/tda826x.c buf[3] = div >> 7; div 90 drivers/media/dvb-frontends/tda826x.c buf[4] = div << 1; div 106 drivers/media/dvb-frontends/tda826x.c priv->frequency = div * 1000; div 33 drivers/media/dvb-frontends/tdhd1.h u32 div; div 35 drivers/media/dvb-frontends/tdhd1.h div = (p->frequency + 36166666) / 166666; div 37 drivers/media/dvb-frontends/tdhd1.h data[0] = (div >> 8) & 0x7f; div 38 drivers/media/dvb-frontends/tdhd1.h data[1] = div & 0xff; div 61 drivers/media/dvb-frontends/tua6100.c u32 div; div 106 drivers/media/dvb-frontends/tua6100.c div = prediv / _P_VAL; div 107 drivers/media/dvb-frontends/tua6100.c reg1[1] |= (div >> 9) & 0x03; div 108 drivers/media/dvb-frontends/tua6100.c reg1[2] = div >> 1; div 109 drivers/media/dvb-frontends/tua6100.c reg1[3] = (div << 7); div 110 drivers/media/dvb-frontends/tua6100.c priv->frequency = ((div * _P_VAL) * (_ri / 1000)) / _R_VAL; div 113 drivers/media/dvb-frontends/tua6100.c reg1[3] |= (prediv - (div*_P_VAL)) & 0x7f; div 173 drivers/media/dvb-frontends/zl10036.c u32 div, foffset; div 175 drivers/media/dvb-frontends/zl10036.c div = (frequency + _FR/2) / _FR; div 176 drivers/media/dvb-frontends/zl10036.c state->frequency = div * _FR; div 180 drivers/media/dvb-frontends/zl10036.c buf[0] = (div >> 8) & 0x7f; div 181 drivers/media/dvb-frontends/zl10036.c buf[1] = (div >> 0) & 0xff; div 184 drivers/media/dvb-frontends/zl10036.c frequency, state->frequency, foffset, div); div 183 drivers/media/dvb-frontends/zl10039.c u32 div; div 192 drivers/media/dvb-frontends/zl10039.c div = (c->frequency * 1000) / 126387; div 198 drivers/media/dvb-frontends/zl10039.c buf[0] = (div >> 8) & 0x7f; div 199 drivers/media/dvb-frontends/zl10039.c buf[1] = (div >> 0) & 0xff; div 25 drivers/media/i2c/aptina-pll.c unsigned int div; div 42 drivers/media/i2c/aptina-pll.c div = gcd(pll->pix_clock, pll->ext_clock); div 43 drivers/media/i2c/aptina-pll.c pll->m = pll->pix_clock / div; div 44 drivers/media/i2c/aptina-pll.c div = pll->ext_clock / div; div 59 drivers/media/i2c/aptina-pll.c mf_min = max(mf_min, limits->n_min * limits->p1_min / div); div 63 drivers/media/i2c/aptina-pll.c mf_max = min(mf_max, DIV_ROUND_UP(limits->n_max * limits->p1_max, div)); div 128 drivers/media/i2c/aptina-pll.c p1_min = max(limits->p1_min, DIV_ROUND_UP(limits->out_clock_min * div, div 130 drivers/media/i2c/aptina-pll.c p1_max = min(limits->p1_max, limits->out_clock_max * div / div 134 drivers/media/i2c/aptina-pll.c unsigned int mf_inc = p1 / gcd(div, p1); div 139 drivers/media/i2c/aptina-pll.c limits->int_clock_max * div)), mf_inc); div 141 drivers/media/i2c/aptina-pll.c (limits->int_clock_min * div)); div 146 drivers/media/i2c/aptina-pll.c pll->n = div * mf_low / p1; div 246 drivers/media/i2c/mt9p031.c unsigned int div; div 248 drivers/media/i2c/mt9p031.c div = DIV_ROUND_UP(pdata->ext_freq, pdata->target_freq); div 249 drivers/media/i2c/mt9p031.c div = roundup_pow_of_two(div) / 2; div 251 drivers/media/i2c/mt9p031.c mt9p031->clk_div = min_t(unsigned int, div, 64); div 217 drivers/media/i2c/ov2659.c unsigned int div; div 921 drivers/media/i2c/ov2659.c for (i = 0; ctrl1[i].div != 0; i++) { div 922 drivers/media/i2c/ov2659.c postdiv = ctrl1[i].div; div 923 drivers/media/i2c/ov2659.c for (j = 0; ctrl3[j].div != 0; j++) { div 924 drivers/media/i2c/ov2659.c prediv = ctrl3[j].div; div 774 drivers/media/i2c/ov6650.c int div, ret; div 778 drivers/media/i2c/ov6650.c div = 1; /* Reset to full rate */ div 780 drivers/media/i2c/ov6650.c div = (tpf->numerator * FRAME_RATE_MAX) / tpf->denominator; div 782 drivers/media/i2c/ov6650.c if (div == 0) div 783 drivers/media/i2c/ov6650.c div = 1; div 784 drivers/media/i2c/ov6650.c else if (div > GET_CLKRC_DIV(CLKRC_DIV_MASK)) div 785 drivers/media/i2c/ov6650.c div = GET_CLKRC_DIV(CLKRC_DIV_MASK); div 787 drivers/media/i2c/ov6650.c tpf->numerator = div; div 891 drivers/media/i2c/ov7670.c int div; div 894 drivers/media/i2c/ov7670.c div = 1; /* Reset to full rate */ div 896 drivers/media/i2c/ov7670.c div = (tpf->numerator * info->clock_speed) / tpf->denominator; div 897 drivers/media/i2c/ov7670.c if (div == 0) div 898 drivers/media/i2c/ov7670.c div = 1; div 899 drivers/media/i2c/ov7670.c else if (div > CLK_SCALE) div 900 drivers/media/i2c/ov7670.c div = CLK_SCALE; div 901 drivers/media/i2c/ov7670.c info->clkrc = (info->clkrc & 0x80) | div; div 903 drivers/media/i2c/ov7670.c tpf->denominator = info->clock_speed / div; div 680 drivers/media/i2c/ov772x.c unsigned int div; div 685 drivers/media/i2c/ov772x.c div = DIV_ROUND_CLOSEST(pll_out, pclk); div 686 drivers/media/i2c/ov772x.c t_pclk = DIV_ROUND_CLOSEST(fin * pll_mult, div); div 690 drivers/media/i2c/ov772x.c clkrc = CLKRC_DIV(div); div 155 drivers/media/i2c/smiapp-pll.c uint32_t div, uint32_t lane_op_clock_ratio) div 193 drivers/media/i2c/smiapp-pll.c / div); div 220 drivers/media/i2c/smiapp-pll.c more_mul_factor = lcm(div, pll->pre_pll_clk_div) / div; div 236 drivers/media/i2c/smiapp-pll.c op_pll->sys_clk_div = div * i / pll->pre_pll_clk_div; div 395 drivers/media/i2c/smiapp-pll.c uint32_t mul, div; div 450 drivers/media/i2c/smiapp-pll.c div = pll->ext_clk_freq_hz / i; div 451 drivers/media/i2c/smiapp-pll.c dev_dbg(dev, "mul %u / div %u\n", mul, div); div 465 drivers/media/i2c/smiapp-pll.c op_pll, mul, div, div 145 drivers/media/pci/bt8xx/dvb-bt8xx.c u32 div; div 152 drivers/media/pci/bt8xx/dvb-bt8xx.c div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; div 169 drivers/media/pci/bt8xx/dvb-bt8xx.c pllbuf[1] = div >> 8; div 170 drivers/media/pci/bt8xx/dvb-bt8xx.c pllbuf[2] = div & 0xff; div 267 drivers/media/pci/bt8xx/dvb-bt8xx.c u32 div; div 270 drivers/media/pci/bt8xx/dvb-bt8xx.c div = (36000000 + c->frequency + 83333) / 166666; div 291 drivers/media/pci/bt8xx/dvb-bt8xx.c data[0] = (div >> 8) & 0x7f; div 292 drivers/media/pci/bt8xx/dvb-bt8xx.c data[1] = div & 0xff; div 293 drivers/media/pci/bt8xx/dvb-bt8xx.c data[2] = ((div >> 10) & 0x60) | cfg; div 299 drivers/media/pci/bt8xx/dvb-bt8xx.c return (div * 166666 - 36000000); div 340 drivers/media/pci/bt8xx/dvb-bt8xx.c u32 div; div 346 drivers/media/pci/bt8xx/dvb-bt8xx.c div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; div 383 drivers/media/pci/bt8xx/dvb-bt8xx.c pllbuf[1] = div >> 8; div 384 drivers/media/pci/bt8xx/dvb-bt8xx.c pllbuf[2] = div & 0xff; div 458 drivers/media/pci/bt8xx/dvb-bt8xx.c u32 div; div 461 drivers/media/pci/bt8xx/dvb-bt8xx.c div = (c->frequency + 36166667) / 166667; div 463 drivers/media/pci/bt8xx/dvb-bt8xx.c buf[0] = (div >> 8) & 0x7F; div 464 drivers/media/pci/bt8xx/dvb-bt8xx.c buf[1] = div & 0xFF; div 508 drivers/media/pci/bt8xx/dvb-bt8xx.c u32 div; div 514 drivers/media/pci/bt8xx/dvb-bt8xx.c div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; div 517 drivers/media/pci/bt8xx/dvb-bt8xx.c pllbuf[1] = (div >> 8) & 0x7F; div 518 drivers/media/pci/bt8xx/dvb-bt8xx.c pllbuf[2] = div & 0xFF; div 521 drivers/media/pci/bt8xx/dvb-bt8xx.c dprintk("frequency %u, div %u\n", c->frequency, div); div 859 drivers/media/pci/cx88/cx88-dvb.c u32 div; div 866 drivers/media/pci/cx88/cx88-dvb.c div = c->frequency / 125; div 868 drivers/media/pci/cx88/cx88-dvb.c buf[0] = (div >> 8) & 0x7f; div 869 drivers/media/pci/cx88/cx88-dvb.c buf[1] = div & 0xff; div 146 drivers/media/pci/ddbridge/ddbridge-core.c dma->bufval = ((dma->div & 0x0f) << 16) | div 2266 drivers/media/pci/ddbridge/ddbridge-core.c dma->div = 1; div 2273 drivers/media/pci/ddbridge/ddbridge-core.c dma->div = 1; div 150 drivers/media/pci/ddbridge/ddbridge.h u32 div; div 81 drivers/media/pci/mantis/mantis_vp1033.c u32 div; div 86 drivers/media/pci/mantis/mantis_vp1033.c div = p->frequency / 250; div 88 drivers/media/pci/mantis/mantis_vp1033.c buf[0] = (div >> 8) & 0x7f; div 89 drivers/media/pci/mantis/mantis_vp1033.c buf[1] = div & 0xff; div 69 drivers/media/pci/mantis/mantis_vp2033.c u32 div = (p->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL; div 71 drivers/media/pci/mantis/mantis_vp2033.c buf[0] = (div >> 8) & 0x7f; div 72 drivers/media/pci/mantis/mantis_vp2033.c buf[1] = div & 0xff; div 51 drivers/media/pci/mantis/mantis_vp2040.c u32 div = (p->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL; div 53 drivers/media/pci/mantis/mantis_vp2040.c buf[0] = (div >> 8) & 0x7f; div 54 drivers/media/pci/mantis/mantis_vp2040.c buf[1] = div & 0xff; div 441 drivers/media/pci/pluto2/pluto2.c u32 div; div 448 drivers/media/pci/pluto2/pluto2.c div = divide(p->frequency * 3, 500000) + 217; div 449 drivers/media/pci/pluto2/pluto2.c buf[0] = (div >> 8) & 0x7f; div 450 drivers/media/pci/pluto2/pluto2.c buf[1] = (div >> 0) & 0xff; div 529 drivers/media/pci/saa7134/saa7134-video.c int div = interlace ? 2 : 1; div 550 drivers/media/pci/saa7134/saa7134-video.c yscale = 512 * div * dev->crop_current.height / height; div 560 drivers/media/pci/saa7134/saa7134-video.c saa_writeb(SAA7134_VIDEO_LINES1(task), height/div & 0xff); div 561 drivers/media/pci/saa7134/saa7134-video.c saa_writeb(SAA7134_VIDEO_LINES2(task), height/div >> 8); div 630 drivers/media/pci/saa7134/saa7134-video.c int div = interlace ? 2 : 1; div 641 drivers/media/pci/saa7134/saa7134-video.c row[rows].position = clip_range(clips[i].c.top / div); div 645 drivers/media/pci/saa7134/saa7134-video.c / div); div 1543 drivers/media/pci/ttpci/av7110.c u32 div = (p->frequency + 479500) / 125; div 1558 drivers/media/pci/ttpci/av7110.c buf[0] = (div >> 8) & 0x7f; div 1559 drivers/media/pci/ttpci/av7110.c buf[1] = div & 0xff; div 1560 drivers/media/pci/ttpci/av7110.c buf[2] = ((div & 0x18000) >> 10) | 0x95; div 1583 drivers/media/pci/ttpci/av7110.c u32 div; div 1587 drivers/media/pci/ttpci/av7110.c div = (p->frequency + 35937500 + 31250) / 62500; div 1589 drivers/media/pci/ttpci/av7110.c data[0] = (div >> 8) & 0x7f; div 1590 drivers/media/pci/ttpci/av7110.c data[1] = div & 0xff; div 1591 drivers/media/pci/ttpci/av7110.c data[2] = 0x85 | ((div >> 10) & 0x60); div 1615 drivers/media/pci/ttpci/av7110.c u32 div; div 1619 drivers/media/pci/ttpci/av7110.c div = p->frequency / 125; div 1620 drivers/media/pci/ttpci/av7110.c data[0] = (div >> 8) & 0x7f; div 1621 drivers/media/pci/ttpci/av7110.c data[1] = div & 0xff; div 1642 drivers/media/pci/ttpci/av7110.c u32 div; div 1647 drivers/media/pci/ttpci/av7110.c div = (f + 36125000 + 31250) / 62500; div 1649 drivers/media/pci/ttpci/av7110.c data[0] = (div >> 8) & 0x7f; div 1650 drivers/media/pci/ttpci/av7110.c data[1] = div & 0xff; div 1674 drivers/media/pci/ttpci/av7110.c u32 div, pwr; div 1678 drivers/media/pci/ttpci/av7110.c div = (p->frequency + 36200000) / 166666; div 1685 drivers/media/pci/ttpci/av7110.c data[0] = (div >> 8) & 0x7f; div 1686 drivers/media/pci/ttpci/av7110.c data[1] = div & 0xff; div 1812 drivers/media/pci/ttpci/av7110.c u32 div; div 1818 drivers/media/pci/ttpci/av7110.c div = (p->frequency + 36150000 + 31250) / 62500; div 1820 drivers/media/pci/ttpci/av7110.c data[0] = (div >> 8) & 0x7f; div 1821 drivers/media/pci/ttpci/av7110.c data[1] = div & 0xff; div 1868 drivers/media/pci/ttpci/av7110.c u32 div; div 1873 drivers/media/pci/ttpci/av7110.c div = (36125000 + p->frequency) / 166666; div 1895 drivers/media/pci/ttpci/av7110.c data[0] = (div >> 8) & 0x7f; div 1896 drivers/media/pci/ttpci/av7110.c data[1] = div & 0xff; div 1897 drivers/media/pci/ttpci/av7110.c data[2] = ((div >> 10) & 0x60) | cfg; div 149 drivers/media/pci/ttpci/av7110_v4l.c u32 div; div 157 drivers/media/pci/ttpci/av7110_v4l.c div = freq + 614; div 159 drivers/media/pci/ttpci/av7110_v4l.c buf[0] = (div >> 8) & 0x7f; div 160 drivers/media/pci/ttpci/av7110_v4l.c buf[1] = div & 0xff; div 179 drivers/media/pci/ttpci/av7110_v4l.c u32 div; div 182 drivers/media/pci/ttpci/av7110_v4l.c div = (freq + 38900000 + 31250) / 62500; div 184 drivers/media/pci/ttpci/av7110_v4l.c data[0] = (div >> 8) & 0x7f; div 185 drivers/media/pci/ttpci/av7110_v4l.c data[1] = div & 0xff; div 491 drivers/media/pci/ttpci/budget-av.c u32 div; div 499 drivers/media/pci/ttpci/budget-av.c div = (c->frequency + (125 - 1)) / 125; /* round correctly */ div 500 drivers/media/pci/ttpci/budget-av.c buf[0] = (div >> 8) & 0x7f; div 501 drivers/media/pci/ttpci/budget-av.c buf[1] = div & 0xff; div 502 drivers/media/pci/ttpci/budget-av.c buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4; div 614 drivers/media/pci/ttpci/budget-av.c u32 div = (c->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL; div 616 drivers/media/pci/ttpci/budget-av.c buf[0] = (div >> 8) & 0x7f; div 617 drivers/media/pci/ttpci/budget-av.c buf[1] = div & 0xff; div 651 drivers/media/pci/ttpci/budget-ci.c u32 div; div 658 drivers/media/pci/ttpci/budget-ci.c div = (p->frequency + (500 - 1)) / 500; /* round correctly */ div 659 drivers/media/pci/ttpci/budget-ci.c buf[0] = (div >> 8) & 0x7f; div 660 drivers/media/pci/ttpci/budget-ci.c buf[1] = div & 0xff; div 661 drivers/media/pci/ttpci/budget-ci.c buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2; div 257 drivers/media/pci/ttpci/budget-patch.c u32 div = (p->frequency + 479500) / 125; div 271 drivers/media/pci/ttpci/budget-patch.c buf[0] = (div >> 8) & 0x7f; div 272 drivers/media/pci/ttpci/budget-patch.c buf[1] = div & 0xff; div 273 drivers/media/pci/ttpci/budget-patch.c buf[2] = ((div & 0x18000) >> 10) | 0x95; div 296 drivers/media/pci/ttpci/budget-patch.c u32 div; div 300 drivers/media/pci/ttpci/budget-patch.c div = p->frequency / 125; div 301 drivers/media/pci/ttpci/budget-patch.c data[0] = (div >> 8) & 0x7f; div 302 drivers/media/pci/ttpci/budget-patch.c data[1] = div & 0xff; div 199 drivers/media/pci/ttpci/budget.c u32 div = (c->frequency + 479500) / 125; div 213 drivers/media/pci/ttpci/budget.c buf[0] = (div >> 8) & 0x7f; div 214 drivers/media/pci/ttpci/budget.c buf[1] = div & 0xff; div 215 drivers/media/pci/ttpci/budget.c buf[2] = ((div & 0x18000) >> 10) | 0x95; div 238 drivers/media/pci/ttpci/budget.c u32 div; div 242 drivers/media/pci/ttpci/budget.c div = (c->frequency + 35937500 + 31250) / 62500; div 244 drivers/media/pci/ttpci/budget.c data[0] = (div >> 8) & 0x7f; div 245 drivers/media/pci/ttpci/budget.c data[1] = div & 0xff; div 246 drivers/media/pci/ttpci/budget.c data[2] = 0x85 | ((div >> 10) & 0x60); div 267 drivers/media/pci/ttpci/budget.c u32 div; div 277 drivers/media/pci/ttpci/budget.c div = (36125000 + c->frequency) / 166666; div 299 drivers/media/pci/ttpci/budget.c data[0] = (div >> 8) & 0x7f; div 300 drivers/media/pci/ttpci/budget.c data[1] = div & 0xff; div 301 drivers/media/pci/ttpci/budget.c data[2] = ((div >> 10) & 0x60) | cfg; div 324 drivers/media/pci/ttpci/budget.c u32 div; div 328 drivers/media/pci/ttpci/budget.c div = c->frequency / 125; div 329 drivers/media/pci/ttpci/budget.c data[0] = (div >> 8) & 0x7f; div 330 drivers/media/pci/ttpci/budget.c data[1] = div & 0xff; div 348 drivers/media/pci/ttpci/budget.c u32 div; div 352 drivers/media/pci/ttpci/budget.c div = c->frequency / 1000; div 353 drivers/media/pci/ttpci/budget.c data[0] = (div >> 8) & 0x7f; div 354 drivers/media/pci/ttpci/budget.c data[1] = div & 0xff; div 357 drivers/media/pci/ttpci/budget.c if (div < 1450) div 359 drivers/media/pci/ttpci/budget.c else if (div < 1850) div 361 drivers/media/pci/ttpci/budget.c else if (div < 2000) div 295 drivers/media/platform/atmel/atmel-isc-base.c __func__, isc_clk->div, isc_clk->parent_id); div 300 drivers/media/platform/atmel/atmel-isc-base.c (isc_clk->div << ISC_CLKCFG_DIV_SHIFT(id)) | div 345 drivers/media/platform/atmel/atmel-isc-base.c return DIV_ROUND_CLOSEST(parent_rate, isc_clk->div + 1); div 354 drivers/media/platform/atmel/atmel-isc-base.c unsigned int i, div; div 368 drivers/media/platform/atmel/atmel-isc-base.c for (div = 1; div < ISC_CLK_MAX_DIV + 2; div++) { div 372 drivers/media/platform/atmel/atmel-isc-base.c rate = DIV_ROUND_CLOSEST(parent_rate, div); div 428 drivers/media/platform/atmel/atmel-isc-base.c u32 div; div 433 drivers/media/platform/atmel/atmel-isc-base.c div = DIV_ROUND_CLOSEST(parent_rate, rate); div 434 drivers/media/platform/atmel/atmel-isc-base.c if (div > (ISC_CLK_MAX_DIV + 1) || !div) div 437 drivers/media/platform/atmel/atmel-isc-base.c isc_clk->div = div - 1; div 30 drivers/media/platform/atmel/atmel-isc.h u32 div; div 1249 drivers/media/platform/coda/coda-common.c unsigned int i, div, s_denominator; div 1266 drivers/media/platform/coda/coda-common.c div = gcd(s.numerator, s.denominator); div 1267 drivers/media/platform/coda/coda-common.c if (div > 1) { div 1268 drivers/media/platform/coda/coda-common.c s.numerator /= div; div 1269 drivers/media/platform/coda/coda-common.c s.denominator /= div; div 811 drivers/media/platform/omap3isp/ispccdc.c unsigned int div = 0; div 854 drivers/media/platform/omap3isp/ispccdc.c div = DIV_ROUND_UP(l3_ick, pipe->max_rate); div 856 drivers/media/platform/omap3isp/ispccdc.c div = l3_ick / pipe->external_rate; div 858 drivers/media/platform/omap3isp/ispccdc.c div = clamp(div, 2U, max_div); div 859 drivers/media/platform/omap3isp/ispccdc.c fmtcfg |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT; div 1119 drivers/media/platform/pxa_camera.c u32 div; div 1133 drivers/media/platform/pxa_camera.c div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1; div 1137 drivers/media/platform/pxa_camera.c pcdev->mclk = lcdclk / (2 * (div + 1)); div 1140 drivers/media/platform/pxa_camera.c lcdclk, mclk, div); div 1142 drivers/media/platform/pxa_camera.c return div; div 232 drivers/media/platform/s3c-camif/camif-regs.c unsigned int div, rem; div 237 drivers/media/platform/s3c-camif/camif-regs.c for (div = 16; div >= 2; div /= 2) { div 238 drivers/media/platform/s3c-camif/camif-regs.c if (nwords < div) div 241 drivers/media/platform/s3c-camif/camif-regs.c rem = nwords & (div - 1); div 243 drivers/media/platform/s3c-camif/camif-regs.c *mburst = div; div 244 drivers/media/platform/s3c-camif/camif-regs.c *rburst = div; div 247 drivers/media/platform/s3c-camif/camif-regs.c if (rem == div / 2 || rem == div / 4) { div 248 drivers/media/platform/s3c-camif/camif-regs.c *mburst = div; div 121 drivers/media/platform/sti/hva/hva-debugfs.c u64 div; div 131 drivers/media/platform/sti/hva/hva-debugfs.c div = (u64)ktime_us_delta(dbg->begin, prev); div 132 drivers/media/platform/sti/hva/hva-debugfs.c do_div(div, 100); div 133 drivers/media/platform/sti/hva/hva-debugfs.c period = (u32)div; div 152 drivers/media/platform/sti/hva/hva-debugfs.c div = (u64)dbg->window_stream_size * 80; div 153 drivers/media/platform/sti/hva/hva-debugfs.c do_div(div, dbg->window_duration); div 154 drivers/media/platform/sti/hva/hva-debugfs.c bitrate = (u32)div; div 178 drivers/media/platform/sti/hva/hva-debugfs.c u64 div; div 187 drivers/media/platform/sti/hva/hva-debugfs.c div = stream->vbuf.vb2_buf.timestamp; div 188 drivers/media/platform/sti/hva/hva-debugfs.c do_div(div, 1000); div 189 drivers/media/platform/sti/hva/hva-debugfs.c timestamp = (u32)div; div 192 drivers/media/platform/sti/hva/hva-debugfs.c div = (u64)ktime_us_delta(end, dbg->begin); div 199 drivers/media/platform/sti/hva/hva-debugfs.c bytesused, (u32)div); div 201 drivers/media/platform/sti/hva/hva-debugfs.c do_div(div, 100); div 202 drivers/media/platform/sti/hva/hva-debugfs.c duration = (u32)div; div 221 drivers/media/platform/sti/hva/hva-debugfs.c u64 div; div 225 drivers/media/platform/sti/hva/hva-debugfs.c div = (u64)dbg->total_duration; div 226 drivers/media/platform/sti/hva/hva-debugfs.c do_div(div, dbg->cnt_duration); div 227 drivers/media/platform/sti/hva/hva-debugfs.c dbg->avg_duration = (u32)div; div 233 drivers/media/platform/sti/hva/hva-debugfs.c div = (u64)dbg->cnt_duration * 100000; div 234 drivers/media/platform/sti/hva/hva-debugfs.c do_div(div, dbg->total_duration); div 235 drivers/media/platform/sti/hva/hva-debugfs.c dbg->max_fps = (u32)div; div 241 drivers/media/platform/sti/hva/hva-debugfs.c div = (u64)dbg->total_period; div 242 drivers/media/platform/sti/hva/hva-debugfs.c do_div(div, dbg->cnt_period); div 243 drivers/media/platform/sti/hva/hva-debugfs.c dbg->avg_period = (u32)div; div 249 drivers/media/platform/sti/hva/hva-debugfs.c div = (u64)dbg->cnt_period * 100000; div 250 drivers/media/platform/sti/hva/hva-debugfs.c do_div(div, dbg->total_period); div 251 drivers/media/platform/sti/hva/hva-debugfs.c dbg->avg_fps = (u32)div; div 262 drivers/media/platform/sti/hva/hva-debugfs.c div = (u64)dbg->total_stream_size * 80; div 263 drivers/media/platform/sti/hva/hva-debugfs.c do_div(div, dbg->total_period); div 264 drivers/media/platform/sti/hva/hva-debugfs.c dbg->avg_bitrate = (u32)div; div 96 drivers/media/platform/vicodec/codec-fwht.h #define vic_round_dim(dim, div) (round_up((dim) / (div), 8) * (div)) div 109 drivers/media/rc/mtk-cir.c u8 div; div 156 drivers/media/rc/mtk-cir.c clk_get_rate(ir->bus) / ir->data->div); div 165 drivers/media/rc/mtk-cir.c clk_get_rate(ir->bus) / ir->data->div); div 276 drivers/media/rc/mtk-cir.c .div = 4, div 284 drivers/media/rc/mtk-cir.c .div = 32, div 31 drivers/media/tuners/m88rs6000t.c u32 div, ts_mclk; div 60 drivers/media/tuners/m88rs6000t.c div = 36000 * pll_div_fb; div 61 drivers/media/tuners/m88rs6000t.c div /= ts_mclk; div 63 drivers/media/tuners/m88rs6000t.c if (div <= 32) { div 66 drivers/media/tuners/m88rs6000t.c f1 = div / 2; div 67 drivers/media/tuners/m88rs6000t.c f2 = div - f1; div 69 drivers/media/tuners/m88rs6000t.c } else if (div <= 48) { div 71 drivers/media/tuners/m88rs6000t.c f0 = div / 3; div 72 drivers/media/tuners/m88rs6000t.c f1 = (div - f0) / 2; div 73 drivers/media/tuners/m88rs6000t.c f2 = div - f0 - f1; div 75 drivers/media/tuners/m88rs6000t.c } else if (div <= 64) { div 77 drivers/media/tuners/m88rs6000t.c f0 = div / 4; div 78 drivers/media/tuners/m88rs6000t.c f1 = (div - f0) / 3; div 79 drivers/media/tuners/m88rs6000t.c f2 = (div - f0 - f1) / 2; div 80 drivers/media/tuners/m88rs6000t.c f3 = div - f0 - f1 - f2; div 174 drivers/media/tuners/mxl301rf.c u32 tmp, div; div 197 drivers/media/tuners/mxl301rf.c div = 1000000; div 200 drivers/media/tuners/mxl301rf.c div >>= 1; div 201 drivers/media/tuners/mxl301rf.c if (tmp > div) { div 202 drivers/media/tuners/mxl301rf.c tmp -= div; div 49 drivers/media/tuners/qt1010.c u32 freq, div, mod1, mod2; div 107 drivers/media/tuners/qt1010.c div = (freq + QT1010_OFFSET) / QT1010_STEP; div 108 drivers/media/tuners/qt1010.c freq = (div * QT1010_STEP) - QT1010_OFFSET; div 556 drivers/media/tuners/tda18271-common.c u32 div; div 564 drivers/media/tuners/tda18271-common.c div = ((d * (freq / 1000)) << 7) / 125; div 566 drivers/media/tuners/tda18271-common.c regs[R_MD1] = 0x7f & (div >> 16); div 567 drivers/media/tuners/tda18271-common.c regs[R_MD2] = 0xff & (div >> 8); div 568 drivers/media/tuners/tda18271-common.c regs[R_MD3] = 0xff & div; div 579 drivers/media/tuners/tda18271-common.c u32 div; div 587 drivers/media/tuners/tda18271-common.c div = ((d * (freq / 1000)) << 7) / 125; div 589 drivers/media/tuners/tda18271-common.c regs[R_CD1] = 0x7f & (div >> 16); div 590 drivers/media/tuners/tda18271-common.c regs[R_CD2] = 0xff & (div >> 8); div 591 drivers/media/tuners/tda18271-common.c regs[R_CD3] = 0xff & div; div 1053 drivers/media/tuners/tda18271-maps.c u32 *freq, u8 *post_div, u8 *div) div 1094 drivers/media/tuners/tda18271-maps.c *div = map[i].d; div 1097 drivers/media/tuners/tda18271-maps.c i, map_name, *post_div, *div); div 180 drivers/media/tuners/tda18271-priv.h u32 *freq, u8 *post_div, u8 *div); div 125 drivers/media/tuners/tea5761.c unsigned int div, frq; div 127 drivers/media/tuners/tea5761.c div = ((buffer[2] & 0x3f) << 8) | buffer[3]; div 129 drivers/media/tuners/tea5761.c frq = 1000 * (div * 32768 / 1000 + FREQ_OFFSET + 225) / 4; /* Freq in KHz */ div 132 drivers/media/tuners/tea5761.c frq / 1000, frq % 1000, div); div 143 drivers/media/tuners/tea5761.c unsigned div; div 163 drivers/media/tuners/tea5761.c div = (1000 * (frq * 4 / 16 + 700 + 225) ) >> 15; div 164 drivers/media/tuners/tea5761.c buffer[1] = (div >> 8) & 0x3f; div 165 drivers/media/tuners/tea5761.c buffer[2] = div & 0xff; div 135 drivers/media/tuners/tea5767.c unsigned int div, frq; div 147 drivers/media/tuners/tea5767.c div = ((buffer[0] & 0x3f) << 8) | buffer[1]; div 151 drivers/media/tuners/tea5767.c frq = (div * 50000 - 700000 - 225000) / 4; /* Freq in KHz */ div 154 drivers/media/tuners/tea5767.c frq = (div * 50000 + 700000 + 225000) / 4; /* Freq in KHz */ div 157 drivers/media/tuners/tea5767.c frq = (div * 32768 + 700000 + 225000) / 4; /* Freq in KHz */ div 161 drivers/media/tuners/tea5767.c frq = (div * 32768 - 700000 - 225000) / 4; /* Freq in KHz */ div 164 drivers/media/tuners/tea5767.c buffer[0] = (div >> 8) & 0x3f; div 165 drivers/media/tuners/tea5767.c buffer[1] = div & 0xff; div 168 drivers/media/tuners/tea5767.c frq / 1000, frq % 1000, div); div 193 drivers/media/tuners/tea5767.c unsigned div; div 244 drivers/media/tuners/tea5767.c div = (frq * (4000 / 16) + 700000 + 225000 + 25000) / 50000; div 249 drivers/media/tuners/tea5767.c div = (frq * (4000 / 16) - 700000 - 225000 + 25000) / 50000; div 255 drivers/media/tuners/tea5767.c div = ((frq * (4000 / 16) - 700000 - 225000) + 16384) >> 15; div 263 drivers/media/tuners/tea5767.c div = ((frq * (4000 / 16) + 700000 + 225000) + 16384) >> 15; div 266 drivers/media/tuners/tea5767.c buffer[0] = (div >> 8) & 0x3f; div 267 drivers/media/tuners/tea5767.c buffer[1] = div & 0xff; div 352 drivers/media/tuners/tea5767.c unsigned div, rc; div 354 drivers/media/tuners/tea5767.c div = (87500 * 4 + 700 + 225 + 25) / 50; /* Set frequency to 87.5 MHz */ div 355 drivers/media/tuners/tea5767.c buffer[0] = (div >> 8) & 0x3f; div 356 drivers/media/tuners/tea5767.c buffer[1] = div & 0xff; div 441 drivers/media/tuners/tuner-simple.c u16 div, u8 config, u8 cb) div 477 drivers/media/tuners/tuner-simple.c buffer[0] = (div>>8) & 0x7f; div 478 drivers/media/tuners/tuner-simple.c buffer[1] = div & 0xff; div 548 drivers/media/tuners/tuner-simple.c u16 div; div 586 drivers/media/tuners/tuner-simple.c div = params->frequency + IFPCoff + offset; div 591 drivers/media/tuners/tuner-simple.c offset / 16, offset % 16 * 100 / 16, div); div 596 drivers/media/tuners/tuner-simple.c if (t_params->cb_first_if_lower_freq && div < priv->last_div) { div 599 drivers/media/tuners/tuner-simple.c buffer[2] = (div>>8) & 0x7f; div 600 drivers/media/tuners/tuner-simple.c buffer[3] = div & 0xff; div 602 drivers/media/tuners/tuner-simple.c buffer[0] = (div>>8) & 0x7f; div 603 drivers/media/tuners/tuner-simple.c buffer[1] = div & 0xff; div 607 drivers/media/tuners/tuner-simple.c priv->last_div = div; div 659 drivers/media/tuners/tuner-simple.c simple_post_tune(fe, &buffer[0], div, config, cb); div 670 drivers/media/tuners/tuner-simple.c u16 div; div 710 drivers/media/tuners/tuner-simple.c div = (freq + 400) / 800; div 712 drivers/media/tuners/tuner-simple.c if (t_params->cb_first_if_lower_freq && div < priv->last_div) { div 715 drivers/media/tuners/tuner-simple.c buffer[2] = (div>>8) & 0x7f; div 716 drivers/media/tuners/tuner-simple.c buffer[3] = div & 0xff; div 718 drivers/media/tuners/tuner-simple.c buffer[0] = (div>>8) & 0x7f; div 719 drivers/media/tuners/tuner-simple.c buffer[1] = div & 0xff; div 724 drivers/media/tuners/tuner-simple.c priv->last_div = div; div 853 drivers/media/tuners/tuner-simple.c u32 div; div 870 drivers/media/tuners/tuner-simple.c div = ((frequency + t_params->iffreq) * 62500 + offset + div 873 drivers/media/tuners/tuner-simple.c buf[0] = div >> 8; div 874 drivers/media/tuners/tuner-simple.c buf[1] = div & 0xff; div 881 drivers/media/tuners/tuner-simple.c tun->name, div, buf[0], buf[1], buf[2], buf[3]); div 884 drivers/media/tuners/tuner-simple.c return (div * tun->stepsize) - t_params->iffreq; div 1017 drivers/media/tuners/tuner-xc2028.c u32 div, offset = 0; div 1114 drivers/media/tuners/tuner-xc2028.c div = (freq - offset + DIV / 2) / DIV; div 1134 drivers/media/tuners/tuner-xc2028.c buf[0] = 0xff & (div >> 24); div 1135 drivers/media/tuners/tuner-xc2028.c buf[1] = 0xff & (div >> 16); div 1136 drivers/media/tuners/tuner-xc2028.c buf[2] = 0xff & (div >> 8); div 1137 drivers/media/tuners/tuner-xc2028.c buf[3] = 0xff & (div); div 1013 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c u32 div; div 1015 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c div = (p->frequency + 36166667) / 166667; div 1017 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c data[0] = (div >> 8) & 0x7f; div 1018 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c data[1] = div & 0xff; div 1019 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c data[2] = ((div >> 10) & 0x60) | 0x85; div 1274 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c u32 div; div 1280 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c div = (p->frequency + (125 - 1)) / 125; /* round correctly */ div 1281 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c buf[0] = (div >> 8) & 0x7f; div 1282 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c buf[1] = div & 0xff; div 1283 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4; div 1318 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c u32 div; div 1321 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c div = p->frequency / 125; div 1323 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c buf[0] = (div >> 8) & 0x7f; div 1324 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c buf[1] = div & 0xff; div 1345 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c u32 div; div 1349 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c div = (p->frequency + 35937500 + 31250) / 62500; div 1351 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c data[0] = (div >> 8) & 0x7f; div 1352 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c data[1] = div & 0xff; div 1353 drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c data[2] = 0x85 | ((div >> 10) & 0x60); div 506 drivers/media/usb/uvc/uvc_driver.c unsigned int div = info->hdiv * info->vdiv; div 508 drivers/media/usb/uvc/uvc_driver.c n = info->bpp[0] * div; div 512 drivers/media/usb/uvc/uvc_driver.c format->bpp = DIV_ROUND_UP(8 * n, div); div 305 drivers/memory/omap-gpmc.c int div; div 311 drivers/memory/omap-gpmc.c div = (l & 0x03) + 1; div 313 drivers/memory/omap-gpmc.c tick_ps *= div; div 666 drivers/memory/omap-gpmc.c int div = gpmc_ns_to_ticks(wait_monitoring); div 668 drivers/memory/omap-gpmc.c div += GPMC_CONFIG1_WAITMONITORINGTIME_MAX - 1; div 669 drivers/memory/omap-gpmc.c div /= GPMC_CONFIG1_WAITMONITORINGTIME_MAX; div 671 drivers/memory/omap-gpmc.c if (div > 4) div 673 drivers/memory/omap-gpmc.c if (div <= 0) div 674 drivers/memory/omap-gpmc.c div = 1; div 676 drivers/memory/omap-gpmc.c return div; div 688 drivers/memory/omap-gpmc.c int div = gpmc_ps_to_ticks(sync_clk); div 690 drivers/memory/omap-gpmc.c if (div > 4) div 692 drivers/memory/omap-gpmc.c if (div <= 0) div 693 drivers/memory/omap-gpmc.c div = 1; div 695 drivers/memory/omap-gpmc.c return div; div 708 drivers/memory/omap-gpmc.c int div; div 711 drivers/memory/omap-gpmc.c div = gpmc_calc_divider(t->sync_clk); div 712 drivers/memory/omap-gpmc.c if (div < 0) div 713 drivers/memory/omap-gpmc.c return div; div 732 drivers/memory/omap-gpmc.c div = gpmc_calc_waitmonitoring_divider(t->wait_monitoring); div 733 drivers/memory/omap-gpmc.c if (div < 0) { div 780 drivers/memory/omap-gpmc.c l |= (div - 1); div 792 drivers/memory/omap-gpmc.c cs, (div * gpmc_get_fclk_period()) / 1000, div); div 1496 drivers/memory/omap-gpmc.c int div; div 1498 drivers/memory/omap-gpmc.c div = gpmc_calc_divider(sync_clk); div 1500 drivers/memory/omap-gpmc.c temp = (temp + div - 1) / div; div 1501 drivers/memory/omap-gpmc.c return gpmc_ticks_to_ps(temp * div); div 725 drivers/mfd/db8500-prcmu.c int prcmu_config_clkout(u8 clkout, u8 source, u8 div) div 736 drivers/mfd/db8500-prcmu.c BUG_ON(div > 63); div 739 drivers/mfd/db8500-prcmu.c if (!div && !requests[clkout]) div 746 drivers/mfd/db8500-prcmu.c (div << PRCM_CLKOCR_CLKODIV0_SHIFT)); div 752 drivers/mfd/db8500-prcmu.c (div << PRCM_CLKOCR_CLKODIV1_SHIFT)); div 760 drivers/mfd/db8500-prcmu.c if (div) { div 773 drivers/mfd/db8500-prcmu.c requests[clkout] += (div ? 1 : -1); div 959 drivers/mfd/db8500-prcmu.c u32 div; div 962 drivers/mfd/db8500-prcmu.c div = (val & PRCM_CLK_MGT_CLKPLLDIV_MASK); div 964 drivers/mfd/db8500-prcmu.c if ((div <= 1) || (div > 15)) { div 966 drivers/mfd/db8500-prcmu.c div, __func__); div 969 drivers/mfd/db8500-prcmu.c div <<= 1; div 971 drivers/mfd/db8500-prcmu.c if (div <= 2) div 973 drivers/mfd/db8500-prcmu.c div >>= 1; div 976 drivers/mfd/db8500-prcmu.c (div & PRCM_CLK_MGT_CLKPLLDIV_MASK)); div 1476 drivers/mfd/db8500-prcmu.c u32 div = 1; div 1485 drivers/mfd/db8500-prcmu.c div *= d; div 1489 drivers/mfd/db8500-prcmu.c div *= d; div 1492 drivers/mfd/db8500-prcmu.c div *= 2; div 1499 drivers/mfd/db8500-prcmu.c div *= 2; div 1501 drivers/mfd/db8500-prcmu.c (void)do_div(rate, div); div 1579 drivers/mfd/db8500-prcmu.c u32 div = 1; div 1591 drivers/mfd/db8500-prcmu.c div *= 2; div 1594 drivers/mfd/db8500-prcmu.c div *= 2; div 1598 drivers/mfd/db8500-prcmu.c PLL_RAW) / div; div 1606 drivers/mfd/db8500-prcmu.c u32 div; div 1608 drivers/mfd/db8500-prcmu.c div = readl(PRCM_DSITVCLK_DIV); div 1609 drivers/mfd/db8500-prcmu.c div = ((div & dsiescclk[n].div_mask) >> (dsiescclk[n].div_shift)); div 1610 drivers/mfd/db8500-prcmu.c return clock_rate(PRCMU_TVCLK) / max((u32)1, div); div 1657 drivers/mfd/db8500-prcmu.c u32 div; div 1659 drivers/mfd/db8500-prcmu.c div = (src_rate / rate); div 1660 drivers/mfd/db8500-prcmu.c if (div == 0) div 1662 drivers/mfd/db8500-prcmu.c if (rate < (src_rate / div)) div 1663 drivers/mfd/db8500-prcmu.c div++; div 1664 drivers/mfd/db8500-prcmu.c return div; div 1670 drivers/mfd/db8500-prcmu.c u32 div; div 1677 drivers/mfd/db8500-prcmu.c div = clock_divider(src_rate, rate); div 1680 drivers/mfd/db8500-prcmu.c if (div > 2) div 1681 drivers/mfd/db8500-prcmu.c div = 2; div 1683 drivers/mfd/db8500-prcmu.c div = 1; div 1685 drivers/mfd/db8500-prcmu.c } else if ((clock == PRCMU_SGACLK) && (div == 3)) { div 1692 drivers/mfd/db8500-prcmu.c rounded_rate = (src_rate / min(div, (u32)31)); div 1782 drivers/mfd/db8500-prcmu.c u32 div; div 1788 drivers/mfd/db8500-prcmu.c div = clock_divider(src_rate, rate); div 1789 drivers/mfd/db8500-prcmu.c rounded_rate = (src_rate / ((div > 2) ? 4 : div)); div 1796 drivers/mfd/db8500-prcmu.c u32 div; div 1801 drivers/mfd/db8500-prcmu.c div = clock_divider(src_rate, rate); div 1802 drivers/mfd/db8500-prcmu.c rounded_rate = (src_rate / min(div, (u32)255)); div 1826 drivers/mfd/db8500-prcmu.c u32 div; div 1839 drivers/mfd/db8500-prcmu.c div = clock_divider(src_rate, rate); div 1842 drivers/mfd/db8500-prcmu.c if (div > 1) div 1850 drivers/mfd/db8500-prcmu.c if (div == 3) { div 1856 drivers/mfd/db8500-prcmu.c div = 0; div 1859 drivers/mfd/db8500-prcmu.c val |= min(div, (u32)31); div 1862 drivers/mfd/db8500-prcmu.c val |= min(div, (u32)31); div 1952 drivers/mfd/db8500-prcmu.c u32 div; div 1954 drivers/mfd/db8500-prcmu.c div = clock_divider(pll_rate(PRCM_PLLDSI_FREQ, div 1957 drivers/mfd/db8500-prcmu.c dsiclk[n].divsel = (div == 1) ? PRCM_DSI_PLLOUT_SEL_PHI : div 1958 drivers/mfd/db8500-prcmu.c (div == 2) ? PRCM_DSI_PLLOUT_SEL_PHI_2 : div 1970 drivers/mfd/db8500-prcmu.c u32 div; div 1972 drivers/mfd/db8500-prcmu.c div = clock_divider(clock_rate(PRCMU_TVCLK), rate); div 1975 drivers/mfd/db8500-prcmu.c val |= (min(div, (u32)255) << dsiescclk[n].div_shift); div 60 drivers/mfd/mcp-core.c void mcp_set_telecom_divisor(struct mcp *mcp, unsigned int div) div 65 drivers/mfd/mcp-core.c mcp->ops->set_telecom_divisor(mcp, div); div 77 drivers/mfd/mcp-core.c void mcp_set_audio_divisor(struct mcp *mcp, unsigned int div) div 82 drivers/mfd/mcp-core.c mcp->ops->set_audio_divisor(mcp, div); div 716 drivers/misc/cardreader/rtsx_pcr.c static u8 revise_ssc_depth(u8 ssc_depth, u8 div) div 718 drivers/misc/cardreader/rtsx_pcr.c if (div > CLK_DIV_1) { div 719 drivers/misc/cardreader/rtsx_pcr.c if (ssc_depth > (div - 1)) div 720 drivers/misc/cardreader/rtsx_pcr.c ssc_depth -= (div - 1); div 732 drivers/misc/cardreader/rtsx_pcr.c u8 n, clk_divider, mcu_cnt, div; div 784 drivers/misc/cardreader/rtsx_pcr.c div = CLK_DIV_1; div 785 drivers/misc/cardreader/rtsx_pcr.c while ((n < MIN_DIV_N_PCR) && (div < CLK_DIV_8)) { div 794 drivers/misc/cardreader/rtsx_pcr.c div++; div 796 drivers/misc/cardreader/rtsx_pcr.c pcr_dbg(pcr, "n = %d, div = %d\n", n, div); div 802 drivers/misc/cardreader/rtsx_pcr.c ssc_depth = revise_ssc_depth(ssc_depth, div); div 809 drivers/misc/cardreader/rtsx_pcr.c 0xFF, (div << 4) | mcu_cnt); div 377 drivers/misc/cardreader/rtsx_usb.c static u8 revise_ssc_depth(u8 ssc_depth, u8 div) div 379 drivers/misc/cardreader/rtsx_usb.c if (div > CLK_DIV_1) { div 380 drivers/misc/cardreader/rtsx_usb.c if (ssc_depth > div - 1) div 381 drivers/misc/cardreader/rtsx_usb.c ssc_depth -= (div - 1); div 393 drivers/misc/cardreader/rtsx_usb.c u8 n, clk_divider, mcu_cnt, div; div 437 drivers/misc/cardreader/rtsx_usb.c div = CLK_DIV_1; div 438 drivers/misc/cardreader/rtsx_usb.c while (n < MIN_DIV_N && div < CLK_DIV_4) { div 440 drivers/misc/cardreader/rtsx_usb.c div++; div 442 drivers/misc/cardreader/rtsx_usb.c dev_dbg(&ucr->pusb_intf->dev, "n = %d, div = %d\n", n, div); div 447 drivers/misc/cardreader/rtsx_usb.c ssc_depth = revise_ssc_depth(ssc_depth, div); div 453 drivers/misc/cardreader/rtsx_usb.c 0x3F, (div << 4) | mcu_cnt); div 224 drivers/misc/lis3lv02d/lis3lv02d.c int div = lis3lv02d_get_odr(lis3); div 226 drivers/misc/lis3lv02d/lis3lv02d.c if (WARN_ONCE(div == 0, "device returned spurious data")) div 230 drivers/misc/lis3lv02d/lis3lv02d.c msleep(lis3->pwron_delay / div); div 1103 drivers/mmc/host/bcm2835.c int div; div 1135 drivers/mmc/host/bcm2835.c div = host->max_clk / clock; div 1136 drivers/mmc/host/bcm2835.c if (div < 2) div 1137 drivers/mmc/host/bcm2835.c div = 2; div 1138 drivers/mmc/host/bcm2835.c if ((host->max_clk / div) > clock) div 1139 drivers/mmc/host/bcm2835.c div++; div 1140 drivers/mmc/host/bcm2835.c div -= 2; div 1142 drivers/mmc/host/bcm2835.c if (div > SDCDIV_MAX_CDIV) div 1143 drivers/mmc/host/bcm2835.c div = SDCDIV_MAX_CDIV; div 1145 drivers/mmc/host/bcm2835.c clock = host->max_clk / (div + 2); div 1153 drivers/mmc/host/bcm2835.c host->cdiv = div; div 266 drivers/mmc/host/dw_mmc-exynos.c u8 div; div 282 drivers/mmc/host/dw_mmc-exynos.c div = dw_mci_exynos_get_ciu_div(host); div 283 drivers/mmc/host/dw_mmc-exynos.c ret = clk_set_rate(host->ciu_clk, wanted * div); div 287 drivers/mmc/host/dw_mmc-exynos.c wanted * div, ret); div 289 drivers/mmc/host/dw_mmc-exynos.c host->bus_hz = actual / div; div 341 drivers/mmc/host/dw_mmc-exynos.c u32 div = 0; div 359 drivers/mmc/host/dw_mmc-exynos.c of_property_read_u32(np, "samsung,dw-mshc-ciu-div", &div); div 360 drivers/mmc/host/dw_mmc-exynos.c priv->ciu_div = div; div 368 drivers/mmc/host/dw_mmc-exynos.c priv->sdr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div); div 375 drivers/mmc/host/dw_mmc-exynos.c priv->ddr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div); div 1200 drivers/mmc/host/dw_mmc.c u32 div; div 1214 drivers/mmc/host/dw_mmc.c div = host->bus_hz / clock; div 1220 drivers/mmc/host/dw_mmc.c div += 1; div 1222 drivers/mmc/host/dw_mmc.c div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0; div 1232 drivers/mmc/host/dw_mmc.c div ? ((host->bus_hz / div) >> 1) : div 1233 drivers/mmc/host/dw_mmc.c host->bus_hz, div); div 1252 drivers/mmc/host/dw_mmc.c mci_writel(host, CLKDIV, div); div 1268 drivers/mmc/host/dw_mmc.c slot->mmc->actual_clock = div ? ((host->bus_hz / div) >> 1) : div 841 drivers/mmc/host/jz4740_mmc.c int div = 0; div 849 drivers/mmc/host/jz4740_mmc.c while (real_rate > rate && div < 7) { div 850 drivers/mmc/host/jz4740_mmc.c ++div; div 854 drivers/mmc/host/jz4740_mmc.c writew(div, host->base + JZ_REG_MMC_CLKRT); div 408 drivers/mmc/host/meson-gx-mmc.c struct clk_divider *div; div 461 drivers/mmc/host/meson-gx-mmc.c div = devm_kzalloc(host->dev, sizeof(*div), GFP_KERNEL); div 462 drivers/mmc/host/meson-gx-mmc.c if (!div) div 473 drivers/mmc/host/meson-gx-mmc.c div->reg = host->regs + SD_EMMC_CLOCK; div 474 drivers/mmc/host/meson-gx-mmc.c div->shift = __ffs(CLK_DIV_MASK); div 475 drivers/mmc/host/meson-gx-mmc.c div->width = __builtin_popcountl(CLK_DIV_MASK); div 476 drivers/mmc/host/meson-gx-mmc.c div->hw.init = &init; div 477 drivers/mmc/host/meson-gx-mmc.c div->flags = CLK_DIVIDER_ONE_BASED; div 479 drivers/mmc/host/meson-gx-mmc.c host->mmc_clk = devm_clk_register(host->dev, &div->hw); div 594 drivers/mmc/host/meson-mx-sdio.c host->fixed_factor.div = 2; div 496 drivers/mmc/host/moxart-mmc.c u8 power, div; div 502 drivers/mmc/host/moxart-mmc.c for (div = 0; div < CLK_DIV_MASK; ++div) { div 503 drivers/mmc/host/moxart-mmc.c if (ios->clock >= host->sysclk / (2 * (div + 1))) div 506 drivers/mmc/host/moxart-mmc.c ctrl = CLK_SD | div; div 507 drivers/mmc/host/moxart-mmc.c host->rate = host->sysclk / (2 * (div + 1)); div 753 drivers/mmc/host/mtk-sd.c u32 div; div 781 drivers/mmc/host/mtk-sd.c div = 0; /* mean div = 1/4 */ div 784 drivers/mmc/host/mtk-sd.c div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); div 785 drivers/mmc/host/mtk-sd.c sclk = (host->src_clk_freq >> 2) / div; div 786 drivers/mmc/host/mtk-sd.c div = (div >> 1); div 798 drivers/mmc/host/mtk-sd.c div = 0; /* div is ignore when bit18 is set */ div 802 drivers/mmc/host/mtk-sd.c div = 0; div 807 drivers/mmc/host/mtk-sd.c div = 0; /* mean div = 1/2 */ div 810 drivers/mmc/host/mtk-sd.c div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); div 811 drivers/mmc/host/mtk-sd.c sclk = (host->src_clk_freq >> 2) / div; div 826 drivers/mmc/host/mtk-sd.c (mode << 8) | div); div 830 drivers/mmc/host/mtk-sd.c (mode << 12) | div); div 26 drivers/mmc/host/sdhci-cns3xxx.c int div = 1; div 37 drivers/mmc/host/sdhci-cns3xxx.c while (host->max_clk / div > clock) { div 42 drivers/mmc/host/sdhci-cns3xxx.c if (div < 4) div 43 drivers/mmc/host/sdhci-cns3xxx.c div += 1; div 44 drivers/mmc/host/sdhci-cns3xxx.c else if (div < 256) div 45 drivers/mmc/host/sdhci-cns3xxx.c div *= 2; div 51 drivers/mmc/host/sdhci-cns3xxx.c clock, host->max_clk / div); div 54 drivers/mmc/host/sdhci-cns3xxx.c if (div != 3) div 55 drivers/mmc/host/sdhci-cns3xxx.c div >>= 1; div 57 drivers/mmc/host/sdhci-cns3xxx.c clk = div << SDHCI_DIVIDER_SHIFT; div 745 drivers/mmc/host/sdhci-esdhc-imx.c int div = 1; div 790 drivers/mmc/host/sdhci-esdhc-imx.c while (host_clock / (div * pre_div * ddr_pre_div) > clock && div < 16) div 791 drivers/mmc/host/sdhci-esdhc-imx.c div++; div 793 drivers/mmc/host/sdhci-esdhc-imx.c host->mmc->actual_clock = host_clock / (div * pre_div * ddr_pre_div); div 798 drivers/mmc/host/sdhci-esdhc-imx.c div--; div 802 drivers/mmc/host/sdhci-esdhc-imx.c | (div << ESDHC_DIVIDER_SHIFT) div 57 drivers/mmc/host/sdhci-of-aspeed.c int div; div 71 drivers/mmc/host/sdhci-of-aspeed.c for (div = 1; div < 256; div *= 2) { div 72 drivers/mmc/host/sdhci-of-aspeed.c if ((parent / div) <= clock) div 75 drivers/mmc/host/sdhci-of-aspeed.c div >>= 1; div 77 drivers/mmc/host/sdhci-of-aspeed.c clk = div << SDHCI_DIVIDER_SHIFT; div 599 drivers/mmc/host/sdhci-of-esdhc.c int div = 1; div 633 drivers/mmc/host/sdhci-of-esdhc.c while (host->max_clk / pre_div / div > clock && div < 16) div 634 drivers/mmc/host/sdhci-of-esdhc.c div++; div 640 drivers/mmc/host/sdhci-of-esdhc.c division = pre_div * div; div 643 drivers/mmc/host/sdhci-of-esdhc.c div = 1; div 646 drivers/mmc/host/sdhci-of-esdhc.c div = 2; div 649 drivers/mmc/host/sdhci-of-esdhc.c div = 3; div 657 drivers/mmc/host/sdhci-of-esdhc.c clock, host->max_clk / pre_div / div); div 658 drivers/mmc/host/sdhci-of-esdhc.c host->mmc->actual_clock = host->max_clk / pre_div / div; div 659 drivers/mmc/host/sdhci-of-esdhc.c esdhc->div_ratio = pre_div * div; div 661 drivers/mmc/host/sdhci-of-esdhc.c div--; div 665 drivers/mmc/host/sdhci-of-esdhc.c | (div << ESDHC_DIVIDER_SHIFT) div 192 drivers/mmc/host/sdhci-sprd.c u32 div; div 198 drivers/mmc/host/sdhci-sprd.c div = (u32) (base_clk / (clk * 2)); div 200 drivers/mmc/host/sdhci-sprd.c if ((base_clk / div) > (clk * 2)) div 201 drivers/mmc/host/sdhci-sprd.c div++; div 203 drivers/mmc/host/sdhci-sprd.c if (div > SDHCI_SPRD_CLK_MAX_DIV) div 204 drivers/mmc/host/sdhci-sprd.c div = SDHCI_SPRD_CLK_MAX_DIV; div 206 drivers/mmc/host/sdhci-sprd.c if (div % 2) div 207 drivers/mmc/host/sdhci-sprd.c div = (div + 1) / 2; div 209 drivers/mmc/host/sdhci-sprd.c div = div / 2; div 211 drivers/mmc/host/sdhci-sprd.c return div; div 218 drivers/mmc/host/sdhci-sprd.c u32 div, val, mask; div 222 drivers/mmc/host/sdhci-sprd.c div = sdhci_sprd_calc_div(sprd_host->base_rate, clk); div 223 drivers/mmc/host/sdhci-sprd.c div = ((div & 0x300) >> 2) | ((div & 0xFF) << 8); div 224 drivers/mmc/host/sdhci-sprd.c sdhci_enable_clk(host, div); div 1544 drivers/mmc/host/sdhci.c int div = 0; /* Initialized for compiler warning */ div 1545 drivers/mmc/host/sdhci.c int real_div = div, clk_mul = 1; div 1555 drivers/mmc/host/sdhci.c div = (pre_val & SDHCI_PRESET_SDCLK_FREQ_MASK) div 1560 drivers/mmc/host/sdhci.c real_div = div + 1; div 1563 drivers/mmc/host/sdhci.c real_div = max_t(int, 1, div << 1); div 1573 drivers/mmc/host/sdhci.c for (div = 1; div <= 1024; div++) { div 1574 drivers/mmc/host/sdhci.c if ((host->max_clk * host->clk_mul / div) div 1578 drivers/mmc/host/sdhci.c if ((host->max_clk * host->clk_mul / div) <= clock) { div 1584 drivers/mmc/host/sdhci.c real_div = div; div 1586 drivers/mmc/host/sdhci.c div--; div 1599 drivers/mmc/host/sdhci.c div = 1; div 1601 drivers/mmc/host/sdhci.c for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div 1602 drivers/mmc/host/sdhci.c div += 2) { div 1603 drivers/mmc/host/sdhci.c if ((host->max_clk / div) <= clock) div 1607 drivers/mmc/host/sdhci.c real_div = div; div 1608 drivers/mmc/host/sdhci.c div >>= 1; div 1610 drivers/mmc/host/sdhci.c && !div && host->max_clk <= 25000000) div 1611 drivers/mmc/host/sdhci.c div = 1; div 1615 drivers/mmc/host/sdhci.c for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) { div 1616 drivers/mmc/host/sdhci.c if ((host->max_clk / div) <= clock) div 1619 drivers/mmc/host/sdhci.c real_div = div; div 1620 drivers/mmc/host/sdhci.c div >>= 1; div 1626 drivers/mmc/host/sdhci.c clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; div 1627 drivers/mmc/host/sdhci.c clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) div 489 drivers/mmc/host/sh_mmcif.c unsigned int freq, best_freq, myclk, div, diff_min, diff; div 504 drivers/mmc/host/sh_mmcif.c div = 1 << (i + 1); div 505 drivers/mmc/host/sh_mmcif.c freq = clk_round_rate(host->clk, clk * div); div 506 drivers/mmc/host/sh_mmcif.c myclk = freq / div; div 760 drivers/mmc/host/sunxi-mmc.c u32 rval, clock = ios->clock, div = 1; div 785 drivers/mmc/host/sunxi-mmc.c div = 2; div 818 drivers/mmc/host/sunxi-mmc.c rval |= div - 1; div 822 drivers/mmc/host/sunxi-mmc.c rate /= div; div 84 drivers/mmc/host/toshsd.c int div = 1; div 86 drivers/mmc/host/toshsd.c while (ios->clock < HCLK / div) div 87 drivers/mmc/host/toshsd.c div *= 2; div 89 drivers/mmc/host/toshsd.c clk = div >> 2; div 91 drivers/mmc/host/toshsd.c if (div == 1) { /* disable the divider */ div 753 drivers/mmc/host/usdhi6rol0.c unsigned long div = div 755 drivers/mmc/host/usdhi6rol0.c val |= div >> 2; div 756 drivers/mmc/host/usdhi6rol0.c new_rate = host->imclk / div; div 1102 drivers/mtd/nand/raw/meson_nand.c u32 div, bt_min, bt_max, tbers_clocks; div 1111 drivers/mtd/nand/raw/meson_nand.c div = DIV_ROUND_UP((timings->tRC_min / 1000), NFC_CLK_CYCLE); div 1112 drivers/mtd/nand/raw/meson_nand.c bt_min = (timings->tREA_max + NFC_DEFAULT_DELAY) / div; div 1114 drivers/mtd/nand/raw/meson_nand.c timings->tRC_min / 2) / div; div 1117 drivers/mtd/nand/raw/meson_nand.c div * NFC_CLK_CYCLE); div 1119 drivers/mtd/nand/raw/meson_nand.c div * NFC_CLK_CYCLE); div 1121 drivers/mtd/nand/raw/meson_nand.c div * NFC_CLK_CYCLE); div 1132 drivers/mtd/nand/raw/meson_nand.c meson_chip->level1_divider = div; div 813 drivers/mtd/spi-nor/cadence-quadspi.c u32 reg, div; div 816 drivers/mtd/spi-nor/cadence-quadspi.c div = DIV_ROUND_UP(ref_clk_hz, 2 * cqspi->sclk) - 1; div 820 drivers/mtd/spi-nor/cadence-quadspi.c reg |= (div & CQSPI_REG_CONFIG_BAUD_MASK) << CQSPI_REG_CONFIG_BAUD_LSB; div 471 drivers/net/ethernet/atheros/ag71xx.c static int ag71xx_mdio_get_divider(struct ag71xx *ag, u32 *div) div 497 drivers/net/ethernet/atheros/ag71xx.c *div = i; div 948 drivers/net/ethernet/cisco/enic/vnic_dev.c vdev->intr_coal_timer_info.div = 3; div 977 drivers/net/ethernet/cisco/enic/vnic_dev.c vdev->intr_coal_timer_info.div = (u32) vdev->args[1]; div 1031 drivers/net/ethernet/cisco/enic/vnic_dev.c vdev->intr_coal_timer_info.div; div 1036 drivers/net/ethernet/cisco/enic/vnic_dev.c return (hw_cycles * vdev->intr_coal_timer_info.div) / div 87 drivers/net/ethernet/cisco/enic/vnic_dev.h u32 div; div 204 drivers/net/ethernet/pensando/ionic/ionic_lif.h u32 div = le32_to_cpu(ionic->ident.dev.intr_coal_div); div 207 drivers/net/ethernet/pensando/ionic/ionic_lif.h if (!div || !mult) div 211 drivers/net/ethernet/pensando/ionic/ionic_lif.h usecs += (div / mult) >> 1; div 214 drivers/net/ethernet/pensando/ionic/ionic_lif.h return (usecs * mult) / div; div 220 drivers/net/ethernet/pensando/ionic/ionic_lif.h u32 div = le32_to_cpu(ionic->ident.dev.intr_coal_div); div 223 drivers/net/ethernet/pensando/ionic/ionic_lif.h if (!div || !mult) div 227 drivers/net/ethernet/pensando/ionic/ionic_lif.h return (units * div) / mult; div 96 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c int div; div 100 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c div = NSS_COMMON_CLK_DIV_SGMII_1000; div 104 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c div = NSS_COMMON_CLK_DIV_SGMII_100; div 108 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c div = NSS_COMMON_CLK_DIV_SGMII_10; div 116 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c return div; div 122 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c int div; div 126 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c div = NSS_COMMON_CLK_DIV_RGMII_1000; div 130 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c div = NSS_COMMON_CLK_DIV_RGMII_100; div 134 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c div = NSS_COMMON_CLK_DIV_RGMII_10; div 142 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c return div; div 148 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c int div; div 152 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c div = get_clk_div_rgmii(gmac, speed); div 158 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c div = get_clk_div_sgmii(gmac, speed); div 178 drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c val |= div << NSS_COMMON_CLK_DIV_OFFSET(gmac->id); div 116 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c { .div = 2, .val = 2, }, div 117 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c { .div = 3, .val = 3, }, div 118 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c { .div = 4, .val = 4, }, div 119 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c { .div = 5, .val = 5, }, div 120 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c { .div = 6, .val = 6, }, div 121 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c { .div = 7, .val = 7, }, div 169 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c clk_configs->fixed_div2.div = 2; div 156 drivers/net/ethernet/ti/cpmac.c #define MDIOC_CLKDIV(div) ((div) & 0xff) div 97 drivers/net/ethernet/ti/davinci_mdio.c u32 mdio_in, div, mdio_out_khz, access_time; div 100 drivers/net/ethernet/ti/davinci_mdio.c div = (mdio_in / data->pdata.bus_freq) - 1; div 101 drivers/net/ethernet/ti/davinci_mdio.c if (div > CONTROL_MAX_DIV) div 102 drivers/net/ethernet/ti/davinci_mdio.c div = CONTROL_MAX_DIV; div 104 drivers/net/ethernet/ti/davinci_mdio.c data->clk_div = div; div 111 drivers/net/ethernet/ti/davinci_mdio.c mdio_out_khz = mdio_in / (1000 * (div + 1)); div 191 drivers/net/phy/mdio-bcm-unimac.c u32 reg, div; div 202 drivers/net/phy/mdio-bcm-unimac.c div = (rate / (2 * priv->clk_freq)) - 1; div 203 drivers/net/phy/mdio-bcm-unimac.c if (div & ~MDIO_CLK_DIV_MASK) { div 213 drivers/net/phy/mdio-bcm-unimac.c reg |= div << MDIO_CLK_DIV_SHIFT; div 481 drivers/net/wireless/ath/ath10k/hw.c .div = 0xe, div 489 drivers/net/wireless/ath/ath10k/hw.c .div = 0x24, div 497 drivers/net/wireless/ath/ath10k/hw.c .div = 0x1d, div 505 drivers/net/wireless/ath/ath10k/hw.c .div = 0x1b, div 513 drivers/net/wireless/ath/ath10k/hw.c .div = 0x12, div 521 drivers/net/wireless/ath/ath10k/hw.c .div = 0x12, div 529 drivers/net/wireless/ath/ath10k/hw.c .div = 0x12, div 537 drivers/net/wireless/ath/ath10k/hw.c .div = 0x1b, div 818 drivers/net/wireless/ath/ath10k/hw.c SM(hw_clk->div, WLAN_PLL_CONTROL_DIV) | div 503 drivers/net/wireless/ath/ath10k/hw.h u32 div; div 653 drivers/net/wireless/ath/ath5k/mac80211-ops.c unsigned int div = common->clockrate * 1000; div 661 drivers/net/wireless/ath/ath5k/mac80211-ops.c ah->survey.time += cc->cycles / div; div 662 drivers/net/wireless/ath/ath5k/mac80211-ops.c ah->survey.time_busy += cc->rx_busy / div; div 663 drivers/net/wireless/ath/ath5k/mac80211-ops.c ah->survey.time_rx += cc->rx_frame / div; div 664 drivers/net/wireless/ath/ath5k/mac80211-ops.c ah->survey.time_tx += cc->tx_frame / div; div 152 drivers/net/wireless/ath/ath9k/ar9003_phy.c u32 freq, chan_frac, div, channelSel = 0, reg32 = 0; div 164 drivers/net/wireless/ath/ath9k/ar9003_phy.c div = 75; div 166 drivers/net/wireless/ath/ath9k/ar9003_phy.c div = 120; div 168 drivers/net/wireless/ath/ath9k/ar9003_phy.c channelSel = (freq * 4) / div; div 169 drivers/net/wireless/ath/ath9k/ar9003_phy.c chan_frac = (((freq * 4) % div) * 0x20000) / div; div 513 drivers/net/wireless/ath/ath9k/link.c unsigned int div = common->clockrate * 1000; div 527 drivers/net/wireless/ath/ath9k/link.c survey->time += cc->cycles / div; div 528 drivers/net/wireless/ath/ath9k/link.c survey->time_busy += cc->rx_busy / div; div 529 drivers/net/wireless/ath/ath9k/link.c survey->time_rx += cc->rx_frame / div; div 530 drivers/net/wireless/ath/ath9k/link.c survey->time_tx += cc->tx_frame / div; div 533 drivers/net/wireless/ath/ath9k/link.c if (cc->cycles < div) div 2487 drivers/net/wireless/broadcom/b43/phy_lp.c int i, div = (crystal_freq <= 26000000 ? 1 : 2); div 2522 drivers/net/wireless/broadcom/b43/phy_lp.c val2 = lpphy_qdiv_roundup(crystal_freq, 1000000 * div, 16); div 2524 drivers/net/wireless/broadcom/b43/phy_lp.c timeout = ((((8 * crystal_freq) / (div * 5000000)) + 1) >> 1) - 1; div 2531 drivers/net/wireless/broadcom/b43/phy_lp.c timeoutref = ((((8 * crystal_freq) / (div * (timeout + 1))) + div 575 drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c uint div; div 578 drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c div = bcma_read32(cc, CHIPCREGOFFS(system_clk_ctl)); div 579 drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c div = 4 * ((div >> SYCC_CD_SHIFT) + 1); div 580 drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c return max_freq ? XTALMAXFREQ : (XTALMINFREQ / div); div 400 drivers/net/wireless/intel/iwlegacy/3945-debug.c struct iwl39_stats_div *div, *accum_div, *delta_div, *max_div; div 418 drivers/net/wireless/intel/iwlegacy/3945-debug.c div = &il->_3945.stats.general.div; div 425 drivers/net/wireless/intel/iwlegacy/3945-debug.c accum_div = &il->_3945.accum_stats.general.div; div 426 drivers/net/wireless/intel/iwlegacy/3945-debug.c delta_div = &il->_3945.delta_stats.general.div; div 427 drivers/net/wireless/intel/iwlegacy/3945-debug.c max_div = &il->_3945.max_delta.general.div; div 467 drivers/net/wireless/intel/iwlegacy/3945-debug.c le32_to_cpu(div->tx_on_a), accum_div->tx_on_a, div 472 drivers/net/wireless/intel/iwlegacy/3945-debug.c le32_to_cpu(div->tx_on_b), accum_div->tx_on_b, div 477 drivers/net/wireless/intel/iwlegacy/3945-debug.c le32_to_cpu(div->exec_time), accum_div->exec_time, div 482 drivers/net/wireless/intel/iwlegacy/3945-debug.c le32_to_cpu(div->probe_time), accum_div->probe_time, div 630 drivers/net/wireless/intel/iwlegacy/4965-debug.c struct stats_div *div, *accum_div, *delta_div, *max_div; div 647 drivers/net/wireless/intel/iwlegacy/4965-debug.c div = &il->_4965.stats.general.common.div; div 650 drivers/net/wireless/intel/iwlegacy/4965-debug.c accum_div = &il->_4965.accum_stats.general.common.div; div 655 drivers/net/wireless/intel/iwlegacy/4965-debug.c delta_div = &il->_4965.delta_stats.general.common.div; div 656 drivers/net/wireless/intel/iwlegacy/4965-debug.c max_div = &il->_4965.max_delta.general.common.div; div 699 drivers/net/wireless/intel/iwlegacy/4965-debug.c le32_to_cpu(div->tx_on_a), accum_div->tx_on_a, div 703 drivers/net/wireless/intel/iwlegacy/4965-debug.c le32_to_cpu(div->tx_on_b), accum_div->tx_on_b, div 707 drivers/net/wireless/intel/iwlegacy/4965-debug.c le32_to_cpu(div->exec_time), accum_div->exec_time, div 711 drivers/net/wireless/intel/iwlegacy/4965-debug.c le32_to_cpu(div->probe_time), accum_div->probe_time, div 2774 drivers/net/wireless/intel/iwlegacy/commands.h struct iwl39_stats_div div; div 2918 drivers/net/wireless/intel/iwlegacy/commands.h struct stats_div div; div 2678 drivers/net/wireless/intel/iwlwifi/dvm/commands.h struct statistics_div div; div 1312 drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c struct statistics_div *div, *accum_div, *delta_div, *max_div; div 1330 drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c div = &priv->statistics.common.div; div 1333 drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c accum_div = &priv->accum_stats.common.div; div 1338 drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c delta_div = &priv->delta_stats.common.div; div 1339 drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c max_div = &priv->max_delta_stats.common.div; div 1386 drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c le32_to_cpu(div->tx_on_a), accum_div->tx_on_a, div 1390 drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c le32_to_cpu(div->tx_on_b), accum_div->tx_on_b, div 1394 drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c le32_to_cpu(div->exec_time), accum_div->exec_time, div 1398 drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c le32_to_cpu(div->probe_time), accum_div->probe_time, div 37 drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h #define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div)) div 678 drivers/pci/controller/dwc/pci-imx6.c int mult, div; div 693 drivers/pci/controller/dwc/pci-imx6.c div = 0; div 697 drivers/pci/controller/dwc/pci-imx6.c div = 1; div 715 drivers/pci/controller/dwc/pci-imx6.c val |= div << PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT; div 295 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(cycle-count-div-64, 0x01), div 313 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(cycle-count-div-64, 0x01), div 330 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(cycle-count-div-64, 0x01), div 340 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(cycle-count-div-64, 0x01), div 78 drivers/phy/cadence/cdns-dphy.c void (*set_psm_div)(struct cdns_dphy *dphy, u8 div); div 196 drivers/phy/cadence/cdns-dphy.c static void cdns_dphy_ref_set_psm_div(struct cdns_dphy *dphy, u8 div) div 198 drivers/phy/cadence/cdns-dphy.c writel(DPHY_PSM_CFG_FROM_REG | DPHY_PSM_CLK_DIV(div), div 921 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c int div = cfg->postdiv / 2 - 1; div 926 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c RK3228_POST_PLL_POST_DIV(div)); div 174 drivers/pinctrl/pinctrl-at91.c bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div); div 175 drivers/pinctrl/pinctrl-at91.c void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32 div); div 510 drivers/pinctrl/pinctrl-at91.c static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div) div 512 drivers/pinctrl/pinctrl-at91.c *div = readl_relaxed(pio + PIO_SCDR); div 519 drivers/pinctrl/pinctrl-at91.c bool is_on, u32 div) div 523 drivers/pinctrl/pinctrl-at91.c writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR); div 965 drivers/pinctrl/pinctrl-at91.c int div; div 985 drivers/pinctrl/pinctrl-at91.c if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div)) div 986 drivers/pinctrl/pinctrl-at91.c *config |= DEBOUNCE | (div << DEBOUNCE_VAL_SHIFT); div 1323 drivers/pinctrl/sunxi/pinctrl-sunxi.c u8 div, src; div 1364 drivers/pinctrl/sunxi/pinctrl-sunxi.c div = hosc_div; div 1367 drivers/pinctrl/sunxi/pinctrl-sunxi.c div = losc_div; div 1371 drivers/pinctrl/sunxi/pinctrl-sunxi.c writel(src | div << 4, div 239 drivers/power/supply/da9150-fg.c u64 div, res; div 250 drivers/power/supply/da9150-fg.c div = (u64) (sd_gain * shunt_val * 65536ULL); div 251 drivers/power/supply/da9150-fg.c do_div(div, 1000000); div 253 drivers/power/supply/da9150-fg.c do_div(res, div); div 35 drivers/pwm/pwm-atmel-tcb.c unsigned div; /* PWM clock divider */ div 98 drivers/pwm/pwm-atmel-tcb.c tcbpwm->div = 0; div 114 drivers/pwm/pwm-atmel-tcb.c tcbpwm->div = cmr & ATMEL_TC_TCCLKS; div 264 drivers/pwm/pwm-atmel-tcb.c cmr |= (tcbpwm->div & ATMEL_TC_TCCLKS); div 352 drivers/pwm/pwm-atmel-tcb.c (atcbpwm->div != i || atcbpwm->period != period)) { div 359 drivers/pwm/pwm-atmel-tcb.c tcbpwm->div = i; div 138 drivers/pwm/pwm-bcm-iproc.c u64 value, div; div 140 drivers/pwm/pwm-bcm-iproc.c div = NSEC_PER_SEC * (prescale + 1); div 142 drivers/pwm/pwm-bcm-iproc.c period = div64_u64(value, div); div 144 drivers/pwm/pwm-bcm-iproc.c duty = div64_u64(value, div); div 115 drivers/pwm/pwm-bcm-kona.c u64 val, div, rate; div 133 drivers/pwm/pwm-bcm-kona.c div = 1000000000; div 134 drivers/pwm/pwm-bcm-kona.c div *= 1 + prescale; div 136 drivers/pwm/pwm-bcm-kona.c pc = div64_u64(val, div); div 138 drivers/pwm/pwm-bcm-kona.c dc = div64_u64(val, div); div 95 drivers/pwm/pwm-img.c u32 val, div, duty, timebase; div 112 drivers/pwm/pwm-img.c div = PWM_CTRL_CFG_NO_SUB_DIV; div 115 drivers/pwm/pwm-img.c div = PWM_CTRL_CFG_SUB_DIV0; div 118 drivers/pwm/pwm-img.c div = PWM_CTRL_CFG_SUB_DIV1; div 121 drivers/pwm/pwm-img.c div = PWM_CTRL_CFG_SUB_DIV0_DIV1; div 137 drivers/pwm/pwm-img.c val |= (div & PWM_CTRL_CFG_DIV_MASK) << div 74 drivers/pwm/pwm-mtk-disp.c u64 div, rate; div 93 drivers/pwm/pwm-mtk-disp.c div = NSEC_PER_SEC * (clk_div + 1); div 94 drivers/pwm/pwm-mtk-disp.c period = div64_u64(rate * period_ns, div); div 98 drivers/pwm/pwm-mtk-disp.c high_width = div64_u64(rate * duty_ns, div); div 29 drivers/pwm/pwm-mxs.c #define PERIOD_CDIV(div) (((div) & 0x7) << 20) div 48 drivers/pwm/pwm-mxs.c int ret, div = 0; div 55 drivers/pwm/pwm-mxs.c c = rate / cdiv[div]; div 60 drivers/pwm/pwm-mxs.c div++; div 61 drivers/pwm/pwm-mxs.c if (div >= PERIOD_CDIV_MAX) div 83 drivers/pwm/pwm-mxs.c PERIOD_INACTIVE_LOW | PERIOD_CDIV(div), div 73 drivers/pwm/pwm-rcar.c u64 div, tmp; div 78 drivers/pwm/pwm-rcar.c div = (u64)NSEC_PER_SEC * RCAR_PWM_MAX_CYCLE; div 79 drivers/pwm/pwm-rcar.c tmp = (u64)period_ns * clk_rate + div - 1; div 80 drivers/pwm/pwm-rcar.c tmp = div64_u64(tmp, div); div 81 drivers/pwm/pwm-rcar.c div = ilog2(tmp - 1) + 1; div 83 drivers/pwm/pwm-rcar.c return (div <= RCAR_PWM_MAX_DIVISION) ? div : -ERANGE; div 87 drivers/pwm/pwm-rcar.c unsigned int div) div 94 drivers/pwm/pwm-rcar.c if (div & 1) div 97 drivers/pwm/pwm-rcar.c div >>= 1; div 99 drivers/pwm/pwm-rcar.c value |= div << RCAR_PWMCR_CC0_SHIFT; div 103 drivers/pwm/pwm-rcar.c static int rcar_pwm_set_counter(struct rcar_pwm_chip *rp, int div, int duty_ns, div 110 drivers/pwm/pwm-rcar.c one_cycle = (unsigned long long)NSEC_PER_SEC * 100ULL * (1 << div); div 165 drivers/pwm/pwm-rcar.c int div, ret; div 177 drivers/pwm/pwm-rcar.c div = rcar_pwm_get_clock_division(rp, state->period); div 178 drivers/pwm/pwm-rcar.c if (div < 0) div 179 drivers/pwm/pwm-rcar.c return div; div 183 drivers/pwm/pwm-rcar.c ret = rcar_pwm_set_counter(rp, div, state->duty_cycle, state->period); div 185 drivers/pwm/pwm-rcar.c rcar_pwm_set_clock_control(rp, div); div 106 drivers/pwm/pwm-rockchip.c u64 clk_rate, div; div 116 drivers/pwm/pwm-rockchip.c div = clk_rate * state->period; div 117 drivers/pwm/pwm-rockchip.c period = DIV_ROUND_CLOSEST_ULL(div, div 120 drivers/pwm/pwm-rockchip.c div = clk_rate * state->duty_cycle; div 121 drivers/pwm/pwm-rockchip.c duty = DIV_ROUND_CLOSEST_ULL(div, pc->data->prescaler * NSEC_PER_SEC); div 174 drivers/pwm/pwm-samsung.c u8 div; div 198 drivers/pwm/pwm-samsung.c for (div = variant->div_base; div < 4; ++div) div 199 drivers/pwm/pwm-samsung.c if ((rate >> (variant->bits + div)) < freq) div 206 drivers/pwm/pwm-samsung.c div = variant->div_base; div 209 drivers/pwm/pwm-samsung.c pwm_samsung_set_divisor(chip, chan, BIT(div)); div 211 drivers/pwm/pwm-samsung.c return rate >> div; div 81 drivers/pwm/pwm-spear.c u64 val, div, clk_rate; div 97 drivers/pwm/pwm-spear.c div = 1000000000; div 98 drivers/pwm/pwm-spear.c div *= 1 + prescale; div 100 drivers/pwm/pwm-spear.c pv = div64_u64(val, div); div 102 drivers/pwm/pwm-spear.c dc = div64_u64(val, div); div 38 drivers/pwm/pwm-stm32-lp.c unsigned long long prd, div, dty; div 60 drivers/pwm/pwm-stm32-lp.c div = (unsigned long long)clk_get_rate(priv->clk) * state->period; div 61 drivers/pwm/pwm-stm32-lp.c do_div(div, NSEC_PER_SEC); div 62 drivers/pwm/pwm-stm32-lp.c if (!div) { div 68 drivers/pwm/pwm-stm32-lp.c prd = div; div 69 drivers/pwm/pwm-stm32-lp.c while (div > STM32_LPTIM_MAX_ARR) { div 75 drivers/pwm/pwm-stm32-lp.c div = prd >> presc; div 77 drivers/pwm/pwm-stm32-lp.c prd = div; div 170 drivers/pwm/pwm-stm32.c unsigned long long prd, div, dty; div 196 drivers/pwm/pwm-stm32.c div = (unsigned long long)rate * (unsigned long long)tmo_ms; div 197 drivers/pwm/pwm-stm32.c do_div(div, MSEC_PER_SEC); div 198 drivers/pwm/pwm-stm32.c prd = div; div 199 drivers/pwm/pwm-stm32.c while ((div > priv->max_arr) && (psc < MAX_TIM_PSC)) { div 201 drivers/pwm/pwm-stm32.c div = prd; div 202 drivers/pwm/pwm-stm32.c do_div(div, psc + 1); div 322 drivers/pwm/pwm-stm32.c unsigned long long prd, div, dty; div 327 drivers/pwm/pwm-stm32.c div = (unsigned long long)clk_get_rate(priv->clk) * period_ns; div 329 drivers/pwm/pwm-stm32.c do_div(div, NSEC_PER_SEC); div 330 drivers/pwm/pwm-stm32.c prd = div; div 332 drivers/pwm/pwm-stm32.c while (div > priv->max_arr) { div 334 drivers/pwm/pwm-stm32.c div = prd; div 335 drivers/pwm/pwm-stm32.c do_div(div, prescaler + 1); div 338 drivers/pwm/pwm-stm32.c prd = div; div 151 drivers/pwm/pwm-sun4i.c u64 clk_rate, div = 0; div 165 drivers/pwm/pwm-sun4i.c div = clk_rate * state->period + NSEC_PER_SEC / 2; div 166 drivers/pwm/pwm-sun4i.c do_div(div, NSEC_PER_SEC); div 167 drivers/pwm/pwm-sun4i.c if (div - 1 > PWM_PRD_MASK) div 177 drivers/pwm/pwm-sun4i.c div = clk_rate; div 178 drivers/pwm/pwm-sun4i.c do_div(div, pval); div 179 drivers/pwm/pwm-sun4i.c div = div * state->period; div 180 drivers/pwm/pwm-sun4i.c do_div(div, NSEC_PER_SEC); div 181 drivers/pwm/pwm-sun4i.c if (div - 1 <= PWM_PRD_MASK) div 185 drivers/pwm/pwm-sun4i.c if (div - 1 > PWM_PRD_MASK) div 189 drivers/pwm/pwm-sun4i.c *prd = div; div 190 drivers/pwm/pwm-sun4i.c div *= state->duty_cycle; div 191 drivers/pwm/pwm-sun4i.c do_div(div, state->period); div 192 drivers/pwm/pwm-sun4i.c *dty = div; div 69 drivers/pwm/pwm-zx.c unsigned int div; div 85 drivers/pwm/pwm-zx.c div = (value & ZX_PWM_CLKDIV_MASK) >> ZX_PWM_CLKDIV_SHIFT; div 89 drivers/pwm/pwm-zx.c tmp *= div * NSEC_PER_SEC; div 93 drivers/pwm/pwm-zx.c tmp *= div * NSEC_PER_SEC; div 103 drivers/pwm/pwm-zx.c unsigned int div = 1; div 110 drivers/pwm/pwm-zx.c c = rate / div; div 117 drivers/pwm/pwm-zx.c div++; div 119 drivers/pwm/pwm-zx.c if (div > ZX_PWM_CLKDIV_MAX) div 138 drivers/pwm/pwm-zx.c ZX_PWM_CLKDIV(div)); div 107 drivers/rtc/rtc-ac100.c { .val = 0, .div = 1 }, div 108 drivers/rtc/rtc-ac100.c { .val = 1, .div = 2 }, div 109 drivers/rtc/rtc-ac100.c { .val = 2, .div = 4 }, div 110 drivers/rtc/rtc-ac100.c { .val = 3, .div = 8 }, div 111 drivers/rtc/rtc-ac100.c { .val = 4, .div = 16 }, div 112 drivers/rtc/rtc-ac100.c { .val = 5, .div = 32 }, div 113 drivers/rtc/rtc-ac100.c { .val = 6, .div = 64 }, div 114 drivers/rtc/rtc-ac100.c { .val = 7, .div = 122 }, div 123 drivers/rtc/rtc-ac100.c unsigned int reg, div; div 129 drivers/rtc/rtc-ac100.c div = (reg >> AC100_CLKOUT_PRE_DIV_SHIFT) & div 131 drivers/rtc/rtc-ac100.c prate = divider_recalc_rate(hw, prate, div, div 136 drivers/rtc/rtc-ac100.c div = (reg >> AC100_CLKOUT_DIV_SHIFT) & div 138 drivers/rtc/rtc-ac100.c return divider_recalc_rate(hw, prate, div, NULL, div 154 drivers/rtc/rtc-ac100.c for (i = 0; ac100_clkout_prediv[i].div; i++) { div 226 drivers/rtc/rtc-ac100.c int div = 0, pre_div = 0; div 229 drivers/rtc/rtc-ac100.c div = divider_get_val(rate * ac100_clkout_prediv[pre_div].div, div 232 drivers/rtc/rtc-ac100.c if (div >= 0) div 235 drivers/rtc/rtc-ac100.c ac100_clkout_prediv[++pre_div].div); div 237 drivers/rtc/rtc-ac100.c if (div < 0) div 238 drivers/rtc/rtc-ac100.c return div; div 245 drivers/rtc/rtc-ac100.c (div - 1) << AC100_CLKOUT_DIV_SHIFT | div 393 drivers/rtc/rtc-armada38x.c long div = ppb + 1000000000L; div 395 drivers/rtc/rtc-armada38x.c return div_s64(1000000000000000000LL + div / 2, div) - 1000000000L; div 5420 drivers/scsi/ncr53c8xx.c int div = np->clock_divn; /* Number of divisors supported */ div 5438 drivers/scsi/ncr53c8xx.c while (--div > 0) div 5439 drivers/scsi/ncr53c8xx.c if (kpc >= (div_10M[div] << 2)) break; div 5445 drivers/scsi/ncr53c8xx.c fak = (kpc - 1) / div_10M[div] + 1; div 5449 drivers/scsi/ncr53c8xx.c per = (fak * div_10M[div]) / clk; div 5456 drivers/scsi/ncr53c8xx.c if (div >= 1 && fak < 8) { div 5458 drivers/scsi/ncr53c8xx.c fak2 = (kpc - 1) / div_10M[div-1] + 1; div 5459 drivers/scsi/ncr53c8xx.c per2 = (fak2 * div_10M[div-1]) / clk; div 5463 drivers/scsi/ncr53c8xx.c --div; div 5474 drivers/scsi/ncr53c8xx.c *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0); div 472 drivers/scsi/sym53c8xx_2/sym_hipd.c int div = np->clock_divn; /* Number of divisors supported */ div 505 drivers/scsi/sym53c8xx_2/sym_hipd.c while (div > 0) { div 506 drivers/scsi/sym53c8xx_2/sym_hipd.c --div; div 507 drivers/scsi/sym53c8xx_2/sym_hipd.c if (kpc > (div_10M[div] << 2)) { div 508 drivers/scsi/sym53c8xx_2/sym_hipd.c ++div; div 513 drivers/scsi/sym53c8xx_2/sym_hipd.c if (div == np->clock_divn) { /* Are we too fast ? */ div 516 drivers/scsi/sym53c8xx_2/sym_hipd.c *divp = div; div 526 drivers/scsi/sym53c8xx_2/sym_hipd.c while (--div > 0) div 527 drivers/scsi/sym53c8xx_2/sym_hipd.c if (kpc >= (div_10M[div] << 2)) break; div 536 drivers/scsi/sym53c8xx_2/sym_hipd.c fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2; div 539 drivers/scsi/sym53c8xx_2/sym_hipd.c fak = (kpc - 1) / div_10M[div] + 1 - 4; div 554 drivers/scsi/sym53c8xx_2/sym_hipd.c *divp = div; div 1932 drivers/scsi/sym53c8xx_2/sym_hipd.c u_char per, u_char wide, u_char div, u_char fak) div 1960 drivers/scsi/sym53c8xx_2/sym_hipd.c wval = (wval & ~0x70) | ((div+1) << 4); div 2092 drivers/scsi/sym53c8xx_2/sym_hipd.c u_char ofs, u_char per, u_char div, u_char fak) div 2098 drivers/scsi/sym53c8xx_2/sym_hipd.c sym_settrans(np, target, 0, ofs, per, wide, div, fak); div 2125 drivers/scsi/sym53c8xx_2/sym_hipd.c u_char per, u_char wide, u_char div, u_char fak) div 2130 drivers/scsi/sym53c8xx_2/sym_hipd.c sym_settrans(np, target, opts, ofs, per, wide, div, fak); div 3948 drivers/scsi/sym53c8xx_2/sym_hipd.c u_char chg, ofs, per, fak, div; div 3977 drivers/scsi/sym53c8xx_2/sym_hipd.c div = fak = 0; div 3978 drivers/scsi/sym53c8xx_2/sym_hipd.c if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0) div 3984 drivers/scsi/sym53c8xx_2/sym_hipd.c ofs, per, div, fak, chg); div 3997 drivers/scsi/sym53c8xx_2/sym_hipd.c sym_setsync (np, target, ofs, per, div, fak); div 4063 drivers/scsi/sym53c8xx_2/sym_hipd.c unsigned char fak, div; div 4109 drivers/scsi/sym53c8xx_2/sym_hipd.c div = fak = 0; div 4110 drivers/scsi/sym53c8xx_2/sym_hipd.c if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0) div 4123 drivers/scsi/sym53c8xx_2/sym_hipd.c sym_setpprot(np, target, opts, ofs, per, wide, div, fak); div 45 drivers/sh/clk/core.c unsigned long mult, div; div 52 drivers/sh/clk/core.c div = 1; div 56 drivers/sh/clk/core.c div = src_table->divisors[i]; div 61 drivers/sh/clk/core.c if (!div || !mult || (bitmap && !test_bit(i, bitmap))) div 64 drivers/sh/clk/core.c freq = clk->parent->rate * mult / div; div 105 drivers/spi/spi-au1550.c u32 div, brg; div 107 drivers/spi/spi-au1550.c for (div = 0; div < 4; div++) { div 108 drivers/spi/spi-au1550.c brg = mainclk_hz / speed_hz / (4 << div); div 117 drivers/spi/spi-au1550.c if (div == 4) { div 118 drivers/spi/spi-au1550.c div = 3; /* speed_hz too small */ div 122 drivers/spi/spi-au1550.c return PSC_SPICFG_SET_BAUD(brg) | PSC_SPICFG_SET_DIV(div); div 198 drivers/spi/spi-dw.h static inline void spi_set_clk(struct dw_spi *dws, u16 div) div 200 drivers/spi/spi-dw.h dw_writel(dws, DW_SPI_BAUDR, div); div 204 drivers/spi/spi-geni-qcom.c u32 demux_sel, clk_sel, m_clk_cfg, idx, div; div 231 drivers/spi/spi-geni-qcom.c ret = get_spi_clk_cfg(mas->cur_speed_hz, mas, &idx, &div); div 239 drivers/spi/spi-geni-qcom.c m_clk_cfg = (div << CLK_DIV_SHFT) | SER_CLK_EN; div 321 drivers/spi/spi-geni-qcom.c unsigned int idx, div; div 323 drivers/spi/spi-geni-qcom.c ret = get_spi_clk_cfg(xfer->speed_hz, mas, &idx, &div); div 337 drivers/spi/spi-geni-qcom.c m_clk_cfg = (div << CLK_DIV_SHFT) | SER_CLK_EN; div 497 drivers/spi/spi-img-spfi.c u32 val, div; div 503 drivers/spi/spi-img-spfi.c div = DIV_ROUND_UP(clk_get_rate(spfi->spfi_clk), xfer->speed_hz); div 504 drivers/spi/spi-img-spfi.c div = clamp(512 / (1 << get_count_order(div)), 1, 128); div 509 drivers/spi/spi-img-spfi.c val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT; div 198 drivers/spi/spi-imx.c int i, div = 4; div 201 drivers/spi/spi-imx.c if (fspi * div >= fin) div 203 drivers/spi/spi-imx.c div <<= 1; div 207 drivers/spi/spi-imx.c *fres = fin / div; div 305 drivers/spi/spi-meson-spicc.c unsigned int i, div; div 320 drivers/spi/spi-meson-spicc.c div = 7; div 324 drivers/spi/spi-meson-spicc.c div = i; div 327 drivers/spi/spi-meson-spicc.c parent, speed, value, div); div 330 drivers/spi/spi-meson-spicc.c conf |= FIELD_PREP(SPICC_DATARATE_MASK, div); div 282 drivers/spi/spi-mt65xx.c u32 spi_clk_hz, div, sck_time, cs_time, reg_val = 0; div 287 drivers/spi/spi-mt65xx.c div = DIV_ROUND_UP(spi_clk_hz, xfer->speed_hz); div 289 drivers/spi/spi-mt65xx.c div = 1; div 291 drivers/spi/spi-mt65xx.c sck_time = (div + 1) / 2; div 882 drivers/spi/spi-omap2-mcspi.c u32 div; div 884 drivers/spi/spi-omap2-mcspi.c for (div = 0; div < 15; div++) div 885 drivers/spi/spi-omap2-mcspi.c if (speed_hz >= (OMAP2_MCSPI_MAX_FREQ >> div)) div 886 drivers/spi/spi-omap2-mcspi.c return div; div 897 drivers/spi/spi-omap2-mcspi.c u32 l = 0, clkd = 0, div, extclk = 0, clkg = 0; div 917 drivers/spi/spi-omap2-mcspi.c div = (OMAP2_MCSPI_MAX_FREQ + speed_hz - 1) / speed_hz; div 918 drivers/spi/spi-omap2-mcspi.c speed_hz = OMAP2_MCSPI_MAX_FREQ / div; div 919 drivers/spi/spi-omap2-mcspi.c clkd = (div - 1) & 0xf; div 920 drivers/spi/spi-omap2-mcspi.c extclk = (div - 1) >> 4; div 167 drivers/spi/spi-pic32-sqi.c u32 val, div; div 170 drivers/spi/spi-pic32-sqi.c div = clk_get_rate(sqi->base_clk) / (2 * sck); div 171 drivers/spi/spi-pic32-sqi.c div &= PESQI_CLKDIV; div 176 drivers/spi/spi-pic32-sqi.c val |= div << PESQI_CLKDIV_SHIFT; div 138 drivers/spi/spi-pic32.c u32 div; div 141 drivers/spi/spi-pic32.c div = DIV_ROUND_CLOSEST(clk_get_rate(pic32s->clk), 2 * spi_ck) - 1; div 143 drivers/spi/spi-pic32.c writel(div & BAUD_MASK, &pic32s->regs->baud); div 291 drivers/spi/spi-rspi.c int div = 0; div 298 drivers/spi/spi-rspi.c while (div < 3) { div 301 drivers/spi/spi-rspi.c div++; div 308 drivers/spi/spi-rspi.c rspi->spcmd |= div << 2; div 121 drivers/spi/spi-s3c24xx.c unsigned int div; div 144 drivers/spi/spi-s3c24xx.c div = DIV_ROUND_UP(clk, hz * 2) - 1; div 146 drivers/spi/spi-s3c24xx.c if (div > 255) div 147 drivers/spi/spi-s3c24xx.c div = 255; div 150 drivers/spi/spi-s3c24xx.c div, hz, clk / (2 * (div + 1))); div 153 drivers/spi/spi-s3c24xx.c cs->sppre = div; div 267 drivers/spi/spi-sh-msiof.c unsigned long div; div 277 drivers/spi/spi-sh-msiof.c div = DIV_ROUND_UP(parent_rate, spi_hz); div 278 drivers/spi/spi-sh-msiof.c if (div <= 1024) { div 280 drivers/spi/spi-sh-msiof.c if (!div_pow && div <= 32 && div > 2) div 284 drivers/spi/spi-sh-msiof.c brps = (div + 1) >> div_pow; div 286 drivers/spi/spi-sh-msiof.c brps = div; div 443 drivers/spi/spi-stm32.c u32 div, mbrdiv; div 445 drivers/spi/spi-stm32.c div = DIV_ROUND_UP(spi->clk_rate, speed_hz); div 454 drivers/spi/spi-stm32.c if ((div < min_div) || (div > max_div)) div 458 drivers/spi/spi-stm32.c if (div & (div - 1)) div 459 drivers/spi/spi-stm32.c mbrdiv = fls(div); div 461 drivers/spi/spi-stm32.c mbrdiv = fls(div) - 1; div 57 drivers/spi/spi-sun4i.c #define SUN4I_CLK_CTL_CDR2(div) ((div) & SUN4I_CLK_CTL_CDR2_MASK) div 59 drivers/spi/spi-sun4i.c #define SUN4I_CLK_CTL_CDR1(div) (((div) & SUN4I_CLK_CTL_CDR1_MASK) << 8) div 209 drivers/spi/spi-sun4i.c unsigned int mclk_rate, div, timeout; div 289 drivers/spi/spi-sun4i.c div = mclk_rate / (2 * tfr->speed_hz); div 290 drivers/spi/spi-sun4i.c if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) { div 291 drivers/spi/spi-sun4i.c if (div > 0) div 292 drivers/spi/spi-sun4i.c div--; div 294 drivers/spi/spi-sun4i.c reg = SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS; div 296 drivers/spi/spi-sun4i.c div = ilog2(mclk_rate) - ilog2(tfr->speed_hz); div 297 drivers/spi/spi-sun4i.c reg = SUN4I_CLK_CTL_CDR1(div); div 68 drivers/spi/spi-sun6i.c #define SUN6I_CLK_CTL_CDR2(div) (((div) & SUN6I_CLK_CTL_CDR2_MASK) << 0) div 70 drivers/spi/spi-sun6i.c #define SUN6I_CLK_CTL_CDR1(div) (((div) & SUN6I_CLK_CTL_CDR1_MASK) << 8) div 201 drivers/spi/spi-sun6i.c unsigned int mclk_rate, div, timeout; div 290 drivers/spi/spi-sun6i.c div = mclk_rate / (2 * tfr->speed_hz); div 291 drivers/spi/spi-sun6i.c if (div <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) { div 292 drivers/spi/spi-sun6i.c if (div > 0) div 293 drivers/spi/spi-sun6i.c div--; div 295 drivers/spi/spi-sun6i.c reg = SUN6I_CLK_CTL_CDR2(div) | SUN6I_CLK_CTL_DRS; div 297 drivers/spi/spi-sun6i.c div = ilog2(mclk_rate) - ilog2(tfr->speed_hz); div 298 drivers/spi/spi-sun6i.c reg = SUN6I_CLK_CTL_CDR1(div); div 234 drivers/spi/spi-synquacer.c u32 rate, val, div; div 268 drivers/spi/spi-synquacer.c div = DIV_ROUND_UP(rate, speed); div 269 drivers/spi/spi-synquacer.c if (div > 254) { div 277 drivers/spi/spi-synquacer.c if (bpw == 8 && (mode & (SPI_TX_DUAL | SPI_RX_DUAL)) && div < 3) div 279 drivers/spi/spi-synquacer.c if (bpw == 8 && (mode & (SPI_TX_QUAD | SPI_RX_QUAD)) && div < 6) div 281 drivers/spi/spi-synquacer.c if (bpw == 16 && (mode & (SPI_TX_QUAD | SPI_RX_QUAD)) && div < 3) div 319 drivers/spi/spi-synquacer.c val |= ((div >> 1) << SYNQUACER_HSSPI_PCC_CDRS_SHIFT); div 608 drivers/ssb/driver_chipcommon.c u32 baud_base, div; div 620 drivers/ssb/driver_chipcommon.c div = 1; div 625 drivers/ssb/driver_chipcommon.c div = 48; div 632 drivers/ssb/driver_chipcommon.c div = 1; div 652 drivers/ssb/driver_chipcommon.c div = chipco_read32(cc, SSB_CHIPCO_CLKDIV) div 657 drivers/ssb/driver_chipcommon.c div = 48; div 666 drivers/ssb/driver_chipcommon.c baud_base /= div; div 636 drivers/staging/comedi/drivers/amplc_pci230.c u64 div; div 639 drivers/staging/comedi/drivers/amplc_pci230.c div = ns; div 640 drivers/staging/comedi/drivers/amplc_pci230.c rem = do_div(div, timebase); div 644 drivers/staging/comedi/drivers/amplc_pci230.c div += DIV_ROUND_CLOSEST(rem, timebase); div 649 drivers/staging/comedi/drivers/amplc_pci230.c div += DIV_ROUND_UP(rem, timebase); div 652 drivers/staging/comedi/drivers/amplc_pci230.c return div > UINT_MAX ? UINT_MAX : (unsigned int)div; div 359 drivers/staging/comedi/drivers/comedi_8254.c unsigned int div = d1 * d2; div 372 drivers/staging/comedi/drivers/comedi_8254.c if (div * i8254->osc_base == *nanosec && div 376 drivers/staging/comedi/drivers/comedi_8254.c div > d1 && div > d2 && div 377 drivers/staging/comedi/drivers/comedi_8254.c div * i8254->osc_base > div && div 378 drivers/staging/comedi/drivers/comedi_8254.c div * i8254->osc_base > i8254->osc_base) div 381 drivers/staging/comedi/drivers/comedi_8254.c div = *nanosec / i8254->osc_base; div 383 drivers/staging/comedi/drivers/comedi_8254.c start = div / d2; div 386 drivers/staging/comedi/drivers/comedi_8254.c for (d1 = start; d1 <= div / d1 + 1 && d1 <= I8254_MAX_COUNT; d1++) { div 387 drivers/staging/comedi/drivers/comedi_8254.c for (d2 = div / d1; div 388 drivers/staging/comedi/drivers/comedi_8254.c d1 * d2 <= div + d1 + 1 && d2 <= I8254_MAX_COUNT; d2++) { div 324 drivers/staging/comedi/drivers/dt2811.c unsigned int div = dt2811_clk_dividers[_div]; div 326 drivers/staging/comedi/drivers/dt2811.c unsigned long long divider = div * mult; div 4882 drivers/staging/comedi/drivers/ni_mio_common.c unsigned int div; div 4896 drivers/staging/comedi/drivers/ni_mio_common.c for (div = 1; div <= NI_M_PLL_MAX_DIVISOR; ++div) { div 4899 drivers/staging/comedi/drivers/ni_mio_common.c (reference_picosec * div) / mult; div 4903 drivers/staging/comedi/drivers/ni_mio_common.c best_div = div; div 606 drivers/staging/iio/adc/ad7192.c int ret, i, div; div 638 drivers/staging/iio/adc/ad7192.c div = st->fclk / (val * st->f_order * 1024); div 639 drivers/staging/iio/adc/ad7192.c if (div < 1 || div > 1023) { div 645 drivers/staging/iio/adc/ad7192.c st->mode |= AD7192_MODE_RATE(div); div 845 drivers/staging/media/imx/imx-media-csi.c unsigned int div; div 851 drivers/staging/media/imx/imx-media-csi.c div = gcd(interval->numerator, interval->denominator); div 852 drivers/staging/media/imx/imx-media-csi.c if (div > 1) { div 853 drivers/staging/media/imx/imx-media-csi.c interval->numerator /= div; div 854 drivers/staging/media/imx/imx-media-csi.c interval->denominator /= div; div 404 drivers/staging/media/meson/vdec/vdec_helpers.c u32 div; div 408 drivers/staging/media/meson/vdec/vdec_helpers.c div = gcd(sess->pixelaspect.numerator, sess->pixelaspect.denominator); div 409 drivers/staging/media/meson/vdec/vdec_helpers.c sess->pixelaspect.numerator /= div; div 410 drivers/staging/media/meson/vdec/vdec_helpers.c sess->pixelaspect.denominator /= div; div 626 drivers/staging/rts5208/rtsx_card.c u8 mcu_cnt, div, max_div, ssc_depth, ssc_depth_mask; div 646 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_1; div 647 drivers/staging/rts5208/rtsx_card.c while ((n < min_n) && (div < max_div)) { div 649 drivers/staging/rts5208/rtsx_card.c div++; div 651 drivers/staging/rts5208/rtsx_card.c dev_dbg(rtsx_dev(chip), "n = %d, div = %d\n", n, div); div 666 drivers/staging/rts5208/rtsx_card.c rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0xFF, (div << 4) | mcu_cnt); div 695 drivers/staging/rts5208/rtsx_card.c u8 sel, div, mcu_cnt; div 705 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_4; div 712 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_4; div 719 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_2; div 726 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_2; div 733 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_2; div 740 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_1; div 747 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_1; div 754 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_1; div 761 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_1; div 768 drivers/staging/rts5208/rtsx_card.c div = CLK_DIV_1; div 792 drivers/staging/rts5208/rtsx_card.c (div << 4) | mcu_cnt); div 375 drivers/thermal/armada_thermal.c u32 reg, div; div 389 drivers/thermal/armada_thermal.c div = priv->data->coef_div; div 392 drivers/thermal/armada_thermal.c *temp = div_s64((m * sample) - b, div); div 394 drivers/thermal/armada_thermal.c *temp = div_s64(b - (m * sample), div); div 461 drivers/thermal/armada_thermal.c s64 div = data->coef_div; div 465 drivers/thermal/armada_thermal.c sample = div_s64(((temp_mc * div) + b), m); div 467 drivers/thermal/armada_thermal.c sample = div_s64((b - (temp_mc * div)), m); div 115 drivers/thermal/tegra/soctherm-fuse.c s32 mult, div; div 135 drivers/thermal/tegra/soctherm-fuse.c div = sensor->config->tsample * sensor_group->pdiv_ate; div 138 drivers/thermal/tegra/soctherm-fuse.c therma = div64_s64_precise(temp, (s64)delta_sens * div); div 208 drivers/tty/serial/8250/8250_mid.c unsigned long mul, div; div 225 drivers/tty/serial/8250/8250_mid.c rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div); div 230 drivers/tty/serial/8250/8250_mid.c writel(div, p->membase + INTEL_MID_UART_DIV); div 184 drivers/tty/serial/ar933x_uart.c u32 div; div 186 drivers/tty/serial/ar933x_uart.c div = (2 << 16) * (scale + 1); div 189 drivers/tty/serial/ar933x_uart.c t += (div / 2); div 190 drivers/tty/serial/ar933x_uart.c do_div(t, div); div 2137 drivers/tty/serial/atmel_serial.c unsigned int old_mode, mode, imr, quot, baud, div, cd, fp = 0; div 2285 drivers/tty/serial/atmel_serial.c div = DIV_ROUND_CLOSEST(port->uartclk, baud * 2); div 2286 drivers/tty/serial/atmel_serial.c cd = div >> 3; div 2287 drivers/tty/serial/atmel_serial.c fp = div & ATMEL_US_FP_MASK; div 1572 drivers/tty/serial/imx.c unsigned long div; div 1672 drivers/tty/serial/imx.c div = sport->port.uartclk / (baud * 16); div 1673 drivers/tty/serial/imx.c if (baud == 38400 && quot != div) div 1676 drivers/tty/serial/imx.c div = sport->port.uartclk / (baud * 16); div 1677 drivers/tty/serial/imx.c if (div > 7) div 1678 drivers/tty/serial/imx.c div = 7; div 1679 drivers/tty/serial/imx.c if (!div) div 1680 drivers/tty/serial/imx.c div = 1; div 1682 drivers/tty/serial/imx.c rational_best_approximation(16 * div * baud, sport->port.uartclk, div 1687 drivers/tty/serial/imx.c do_div(tdiv64, denom * 16 * div); div 1695 drivers/tty/serial/imx.c ufcr = (ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div); div 1715 drivers/tty/serial/imx.c imx_uart_writel(sport, sport->port.uartclk / div / 1000, div 2038 drivers/tty/serial/imx.c unsigned int div = 16 * (ubmr + 1); div 2039 drivers/tty/serial/imx.c unsigned int rem = uartclk % div; div 2041 drivers/tty/serial/imx.c baud_raw = (uartclk / div) * mul; div 2042 drivers/tty/serial/imx.c baud_raw += (rem * mul + div / 2) / div; div 215 drivers/tty/serial/lpc32xx_hs.c u32 div, goodrate, hsu_rate, l_hsu_rate, comprate; div 219 drivers/tty/serial/lpc32xx_hs.c div = uartclk / rate; div 220 drivers/tty/serial/lpc32xx_hs.c goodrate = hsu_rate = (div / 14) - 1; div 504 drivers/tty/serial/max310x.c unsigned int mode = 0, div = 0, frac = 0, c = 0, F = 0; div 511 drivers/tty/serial/max310x.c div = port->uartclk / baud; div 512 drivers/tty/serial/max310x.c if (div < 8) { div 516 drivers/tty/serial/max310x.c } else if (div < 16) { div 525 drivers/tty/serial/max310x.c div /= c; div 529 drivers/tty/serial/max310x.c if (div > 0) div 532 drivers/tty/serial/max310x.c div = 1; div 534 drivers/tty/serial/max310x.c max310x_port_write(port, MAX310X_BRGDIVMSB_REG, div >> 8); div 535 drivers/tty/serial/max310x.c max310x_port_write(port, MAX310X_BRGDIVLSB_REG, div); div 539 drivers/tty/serial/max310x.c return (16*port->uartclk) / (c*(16*div + frac)); div 558 drivers/tty/serial/max310x.c unsigned int div, clksrc, pllcfg = 0; div 566 drivers/tty/serial/max310x.c for (div = 1; (div <= 63) && besterr; div++) { div 567 drivers/tty/serial/max310x.c fdiv = DIV_ROUND_CLOSEST(freq, div); div 573 drivers/tty/serial/max310x.c pllcfg = (0 << 6) | div; div 580 drivers/tty/serial/max310x.c pllcfg = (1 << 6) | div; div 587 drivers/tty/serial/max310x.c pllcfg = (2 << 6) | div; div 594 drivers/tty/serial/max310x.c pllcfg = (3 << 6) | div; div 979 drivers/tty/serial/mxs-auart.c u32 bm, ctrl, ctrl2, div; div 1079 drivers/tty/serial/mxs-auart.c div = u->uartclk * 4 / baud; div 1085 drivers/tty/serial/mxs-auart.c div = DIV_ROUND_CLOSEST(u->uartclk * 32, baud); div 1088 drivers/tty/serial/mxs-auart.c ctrl |= AUART_LINECTRL_BAUD_DIVFRAC(div & 0x3F); div 1089 drivers/tty/serial/mxs-auart.c ctrl |= AUART_LINECTRL_BAUD_DIVINT(div >> 6); div 443 drivers/tty/serial/pch_uart.c int div; div 445 drivers/tty/serial/pch_uart.c div = DIV_ROUND_CLOSEST(priv->uartclk / 16, baud); div 446 drivers/tty/serial/pch_uart.c if (div < 0 || USHRT_MAX <= div) { div 447 drivers/tty/serial/pch_uart.c dev_err(priv->port.dev, "Invalid Baud(div=0x%x)\n", div); div 451 drivers/tty/serial/pch_uart.c dll = (unsigned int)div & 0x00FFU; div 452 drivers/tty/serial/pch_uart.c dlm = ((unsigned int)div >> 8) & 0x00FFU; div 474 drivers/tty/serial/pch_uart.c __func__, baud, div, lcr, jiffies); div 1210 drivers/tty/serial/samsung.c unsigned long div = rate / req_baud; div 1220 drivers/tty/serial/samsung.c quot = div / 16; div 1221 drivers/tty/serial/samsung.c baud = rate / div; div 1314 drivers/tty/serial/samsung.c unsigned int div = ourport->baudclk_rate / baud; div 1317 drivers/tty/serial/samsung.c udivslot = (div & 15); div 1320 drivers/tty/serial/samsung.c udivslot = udivslot_table[div & 15]; div 1321 drivers/tty/serial/samsung.c dbg("udivslot = %04x (div %d)\n", udivslot, div & 15); div 496 drivers/tty/serial/sc16is7xx.c unsigned long clk = port->uartclk, div = clk / 16 / baud; div 498 drivers/tty/serial/sc16is7xx.c if (div > 0xffff) { div 500 drivers/tty/serial/sc16is7xx.c div /= 4; div 545 drivers/tty/serial/sc16is7xx.c sc16is7xx_port_write(port, SC16IS7XX_DLH_REG, div / 256); div 546 drivers/tty/serial/sc16is7xx.c sc16is7xx_port_write(port, SC16IS7XX_DLL_REG, div % 256); div 552 drivers/tty/serial/sc16is7xx.c return DIV_ROUND_CLOSEST(clk / 16, div); div 465 drivers/tty/serial/sifive.c u16 div; div 467 drivers/tty/serial/sifive.c div = DIV_ROUND_UP(ssp->clkin_rate, ssp->baud_rate) - 1; div 469 drivers/tty/serial/sifive.c __ssp_writel(div, SIFIVE_SERIAL_DIV_OFFS, ssp); div 310 drivers/tty/serial/vt8500_serial.c unsigned long div; div 313 drivers/tty/serial/vt8500_serial.c div = ((vt8500_port->clk_predivisor - 1) & 0xf) << 16; div 314 drivers/tty/serial/vt8500_serial.c div |= (uart_get_divisor(port, baud) - 1) & 0x3ff; div 317 drivers/tty/serial/vt8500_serial.c baud = port->uartclk / 16 / ((div & 0x3ff) + 1); div 322 drivers/tty/serial/vt8500_serial.c vt8500_write(port, div, VT8500_URDIV); div 3921 drivers/tty/synclink_gt.c unsigned int div; div 3931 drivers/tty/synclink_gt.c div = osc/rate; div 3932 drivers/tty/synclink_gt.c if (!(osc % rate) && div) div 3933 drivers/tty/synclink_gt.c div--; div 3934 drivers/tty/synclink_gt.c wr_reg16(info, BDR, (unsigned short)div); div 1026 drivers/usb/gadget/function/f_ncm.c const int div = le16_to_cpu(ntb_parameters.wNdpInDivisor); div 1054 drivers/usb/gadget/function/f_ncm.c div + rem + skb->len + div 1064 drivers/usb/gadget/function/f_ncm.c dgram_pad = ALIGN(ncb_len, div) + rem - ncb_len; div 1112 drivers/usb/gadget/function/f_ncm.c dgram_pad = ALIGN(ncb_len, div) + rem - ncb_len; div 264 drivers/usb/host/xhci-tegra.c unsigned int div; div 278 drivers/usb/host/xhci-tegra.c div = new_parent_rate / rate; div 280 drivers/usb/host/xhci-tegra.c err = clk_set_rate(clk, old_parent_rate / div); div 1082 drivers/usb/serial/cp210x.c unsigned int div; div 1087 drivers/usb/serial/cp210x.c div = DIV_ROUND_CLOSEST(48000000, 2 * prescale * baud); div 1088 drivers/usb/serial/cp210x.c baud = 48000000 / (2 * prescale * div); div 1864 drivers/usb/serial/keyspan.c div, /* divisor */ div 1879 drivers/usb/serial/keyspan.c div = baudclk / b16; div 1880 drivers/usb/serial/keyspan.c if (div == 0) div 1883 drivers/usb/serial/keyspan.c cnt = 0 - div; div 1885 drivers/usb/serial/keyspan.c if (div > 0xffff) div 1905 drivers/usb/serial/keyspan.c div; /* divisor */ div 1915 drivers/usb/serial/keyspan.c div = baudclk / b16; div 1916 drivers/usb/serial/keyspan.c if (div == 0) div 1919 drivers/usb/serial/keyspan.c if (div > 0xffff) div 1924 drivers/usb/serial/keyspan.c *rate_low = (u8) (div & 0xff); div 1927 drivers/usb/serial/keyspan.c *rate_hi = (u8) ((div >> 8) & 0xff); div 1942 drivers/usb/serial/keyspan.c div, /* divisor using 13/8 prescaler */ div 1968 drivers/usb/serial/keyspan.c div = clk / b16; div 1969 drivers/usb/serial/keyspan.c if (div == 0) div 1972 drivers/usb/serial/keyspan.c res = clk / div; div 1985 drivers/usb/serial/keyspan.c div = clk / b16; div 1989 drivers/usb/serial/keyspan.c *rate_low = (u8) (div & 0xff); div 1991 drivers/usb/serial/keyspan.c *rate_hi = (u8) ((div >> 8) & 0xff); div 2005 drivers/usb/serial/keyspan.c div, /* divisor */ div 2016 drivers/usb/serial/keyspan.c div = KEYSPAN_USA28_BAUDCLK / b16; div 2017 drivers/usb/serial/keyspan.c if (div == 0) div 2020 drivers/usb/serial/keyspan.c cnt = 0 - div; div 2025 drivers/usb/serial/keyspan.c if (div > 0xffff) div 2029 drivers/usb/serial/keyspan.c if (div > 0xff) div 408 drivers/video/fbdev/cirrusfb.c static void bestclock(long freq, int *nom, int *den, int *div); div 632 drivers/video/fbdev/cirrusfb.c static void cirrusfb_set_mclk_as_source(const struct fb_info *info, int div) div 640 drivers/video/fbdev/cirrusfb.c if (div) { div 642 drivers/video/fbdev/cirrusfb.c (div == 2) ? "MCLK/2" : "MCLK"); div 645 drivers/video/fbdev/cirrusfb.c if (div == 2) div 669 drivers/video/fbdev/cirrusfb.c int nom, den, div; div 845 drivers/video/fbdev/cirrusfb.c bestclock(freq, &nom, &den, &div); div 848 drivers/video/fbdev/cirrusfb.c freq, nom, den, div); div 886 drivers/video/fbdev/cirrusfb.c if (div != 0) div 2738 drivers/video/fbdev/cirrusfb.c static void bestclock(long freq, int *nom, int *den, int *div) div 2745 drivers/video/fbdev/cirrusfb.c assert(div != NULL); div 2749 drivers/video/fbdev/cirrusfb.c *div = 0; div 2773 drivers/video/fbdev/cirrusfb.c *div = s; div 2788 drivers/video/fbdev/cirrusfb.c *div = s; div 122 drivers/video/fbdev/mbx/mbxfb.c struct pixclock_div *div) div 155 drivers/video/fbdev/mbx/mbxfb.c div->m = m; div 156 drivers/video/fbdev/mbx/mbxfb.c div->n = n; div 157 drivers/video/fbdev/mbx/mbxfb.c div->p = p; div 184 drivers/video/fbdev/mbx/mbxfb.c struct pixclock_div div; div 186 drivers/video/fbdev/mbx/mbxfb.c var->pixclock = mbxfb_get_pixclock(var->pixclock, &div); div 236 drivers/video/fbdev/mbx/mbxfb.c struct pixclock_div div; div 282 drivers/video/fbdev/mbx/mbxfb.c var->pixclock = mbxfb_get_pixclock(info->var.pixclock, &div); div 284 drivers/video/fbdev/mbx/mbxfb.c write_reg_dly((Disp_Pll_M(div.m) | Disp_Pll_N(div.n) | div 285 drivers/video/fbdev/mbx/mbxfb.c Disp_Pll_P(div.p) | DISP_PLL_EN), DISPPLL); div 384 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CFG_SCLKCNT(div) ((div)<<24) /* 0xFF~0x2 */ div 562 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define DSI1_BITCLK_DIV(div) (div<<8) div 564 drivers/video/fbdev/mmp/hw/mmp_ctrl.h #define CLK_INT_DIV(div) (div) div 517 drivers/video/fbdev/mx3fb.c uint32_t div; div 568 drivers/video/fbdev/mx3fb.c div = clk_get_rate(ipu_clk) * 16 / pixel_clk; div 571 drivers/video/fbdev/mx3fb.c div = 0; div 574 drivers/video/fbdev/mx3fb.c if (div < 0x40) { /* Divider less than 4 */ div 577 drivers/video/fbdev/mx3fb.c div = 0x40; div 581 drivers/video/fbdev/mx3fb.c pixel_clk, div >> 4, (div & 7) * 125); div 590 drivers/video/fbdev/mx3fb.c mx3fb_write_reg(mx3fb, (((div / 8) - 1) << 22) | div, DI_DISP3_TIME_CONF); div 616 drivers/video/fbdev/omap/hwa742.c static unsigned long round_to_extif_ticks(unsigned long ps, int div) div 618 drivers/video/fbdev/omap/hwa742.c int bus_tick = hwa742.extif_clk_period * div; div 622 drivers/video/fbdev/omap/hwa742.c static int calc_reg_timing(unsigned long sysclk, int div) div 637 drivers/video/fbdev/omap/hwa742.c "extif_clk_div %d\n", systim, hwa742.extif_clk_period, div); div 641 drivers/video/fbdev/omap/hwa742.c t->clk_div = div; div 643 drivers/video/fbdev/omap/hwa742.c t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div); div 644 drivers/video/fbdev/omap/hwa742.c t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div); div 645 drivers/video/fbdev/omap/hwa742.c t->access_time = round_to_extif_ticks(t->re_on_time + 12200, div); div 646 drivers/video/fbdev/omap/hwa742.c t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div); div 647 drivers/video/fbdev/omap/hwa742.c t->re_off_time = round_to_extif_ticks(t->re_on_time + 16000, div); div 648 drivers/video/fbdev/omap/hwa742.c t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div); div 649 drivers/video/fbdev/omap/hwa742.c t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div); div 652 drivers/video/fbdev/omap/hwa742.c t->re_cycle_time = round_to_extif_ticks(2 * systim + 2000, div); div 668 drivers/video/fbdev/omap/hwa742.c static int calc_lut_timing(unsigned long sysclk, int div) div 684 drivers/video/fbdev/omap/hwa742.c "extif_clk_div %d\n", systim, hwa742.extif_clk_period, div); div 689 drivers/video/fbdev/omap/hwa742.c t->clk_div = div; div 692 drivers/video/fbdev/omap/hwa742.c t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div); div 693 drivers/video/fbdev/omap/hwa742.c t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div); div 695 drivers/video/fbdev/omap/hwa742.c 26000, div); div 696 drivers/video/fbdev/omap/hwa742.c t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div); div 698 drivers/video/fbdev/omap/hwa742.c 26000, div); div 699 drivers/video/fbdev/omap/hwa742.c t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div); div 700 drivers/video/fbdev/omap/hwa742.c t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div); div 703 drivers/video/fbdev/omap/hwa742.c t->re_cycle_time = round_to_extif_ticks(2000 + 4 * systim + 26000, div); div 722 drivers/video/fbdev/omap/hwa742.c int div; div 725 drivers/video/fbdev/omap/hwa742.c for (div = 1; div < max_clk_div; div++) { div 726 drivers/video/fbdev/omap/hwa742.c if (calc_reg_timing(sysclk, div) == 0) div 729 drivers/video/fbdev/omap/hwa742.c if (div >= max_clk_div) div 732 drivers/video/fbdev/omap/hwa742.c *extif_mem_div = div; div 734 drivers/video/fbdev/omap/hwa742.c for (div = 1; div < max_clk_div; div++) { div 735 drivers/video/fbdev/omap/hwa742.c if (calc_lut_timing(sysclk, div) == 0) div 739 drivers/video/fbdev/omap/hwa742.c if (div >= max_clk_div) div 125 drivers/video/fbdev/omap/omapfb.h int hs_pol_inv, int vs_pol_inv, int div); div 112 drivers/video/fbdev/omap/sossi.c static u32 ps_to_sossi_ticks(u32 ps, int div) div 114 drivers/video/fbdev/omap/sossi.c u32 clk_period = HZ_TO_PS(sossi.fck_hz) * div; div 122 drivers/video/fbdev/omap/sossi.c int div = t->clk_div; div 128 drivers/video/fbdev/omap/sossi.c reon = ps_to_sossi_ticks(t->re_on_time, div); div 133 drivers/video/fbdev/omap/sossi.c reoff = ps_to_sossi_ticks(t->re_off_time, div); div 142 drivers/video/fbdev/omap/sossi.c recyc = ps_to_sossi_ticks(t->re_cycle_time, div); div 153 drivers/video/fbdev/omap/sossi.c actim = ps_to_sossi_ticks(t->access_time, div); div 173 drivers/video/fbdev/omap/sossi.c int div = t->clk_div; div 179 drivers/video/fbdev/omap/sossi.c weon = ps_to_sossi_ticks(t->we_on_time, div); div 184 drivers/video/fbdev/omap/sossi.c weoff = ps_to_sossi_ticks(t->we_off_time, div); div 191 drivers/video/fbdev/omap/sossi.c wecyc = ps_to_sossi_ticks(t->we_cycle_time, div); div 208 drivers/video/fbdev/omap/sossi.c static void _set_timing(int div, int tw0, int tw1) div 214 drivers/video/fbdev/omap/sossi.c tw0 + 1, tw1 + 1, div); div 217 drivers/video/fbdev/omap/sossi.c clk_set_rate(sossi.fck, sossi.fck_hz / div); div 315 drivers/video/fbdev/omap/sossi.c int div = t->clk_div; div 319 drivers/video/fbdev/omap/sossi.c if (div <= 0 || div > 8) div 329 drivers/video/fbdev/omap/sossi.c t->tim[4] = div; div 383 drivers/video/fbdev/omap/sossi.c int hs_pol_inv, int vs_pol_inv, int div) div 388 drivers/video/fbdev/omap/sossi.c if (pin_cnt != 1 || div < 1 || div > 8) div 391 drivers/video/fbdev/omap/sossi.c hs = ps_to_sossi_ticks(hs_pulse_time, div); div 392 drivers/video/fbdev/omap/sossi.c vs = ps_to_sossi_ticks(vs_pulse_time, div); div 175 drivers/video/fbdev/pxa168fb.h #define CFG_SCLKCNT(div) ((div) << 24) /* 0xFF~0x2 */ div 336 drivers/video/fbdev/pxa168fb.h #define CLK_INT_DIV(div) (div) div 656 drivers/video/fbdev/pxafb.c int size, div = 1, pfor = NONSTD_TO_PFOR(ofb->fb.var.nonstd); div 665 drivers/video/fbdev/pxafb.c case OVERLAY_FORMAT_YUV444_PLANAR: div = 1; break; div 666 drivers/video/fbdev/pxafb.c case OVERLAY_FORMAT_YUV422_PLANAR: div = 2; break; div 667 drivers/video/fbdev/pxafb.c case OVERLAY_FORMAT_YUV420_PLANAR: div = 4; break; div 670 drivers/video/fbdev/pxafb.c start[2] = start[1] + size / div; div 672 drivers/video/fbdev/pxafb.c setup_frame_dma(ofb->fbi, DMA_OV2_Cb, -1, start[1], size / div); div 673 drivers/video/fbdev/pxafb.c setup_frame_dma(ofb->fbi, DMA_OV2_Cr, -1, start[2], size / div); div 1060 drivers/video/fbdev/s3c-fb.c u32 div; div 1062 drivers/video/fbdev/s3c-fb.c div = mode->left_margin + mode->hsync_len + mode->right_margin + div 1064 drivers/video/fbdev/s3c-fb.c div *= mode->upper_margin + mode->vsync_len + mode->lower_margin + div 1066 drivers/video/fbdev/s3c-fb.c div *= mode->refresh ? : 60; div 1068 drivers/video/fbdev/s3c-fb.c do_div(pixclk, div); div 101 drivers/video/fbdev/s3c2410fb.c unsigned long long div; div 108 drivers/video/fbdev/s3c2410fb.c div = (unsigned long long)clk * pixclk; div 109 drivers/video/fbdev/s3c2410fb.c div >>= 12; /* div / 2^12 */ div 110 drivers/video/fbdev/s3c2410fb.c do_div(div, 625 * 625UL * 625); /* div / 5^12 */ div 112 drivers/video/fbdev/s3c2410fb.c dprintk("pixclk %ld, divisor is %ld\n", pixclk, (long)div); div 113 drivers/video/fbdev/s3c2410fb.c return div; div 248 drivers/video/fbdev/vga16fb.c int mul, int div) div 262 drivers/video/fbdev/vga16fb.c pixclock = (pixclock * mul) / div; div 278 drivers/video/fbdev/vga16fb.c pixclock = (best->pixclock * div) / mul; div 186 drivers/watchdog/imgpdc_wdt.c u64 div; div 251 drivers/watchdog/imgpdc_wdt.c div = 1ULL << (PDC_WDT_CONFIG_DELAY_MASK + 1); div 252 drivers/watchdog/imgpdc_wdt.c do_div(div, clk_rate); div 253 drivers/watchdog/imgpdc_wdt.c pdc_wdt->wdt_dev.max_timeout = div; div 88 fs/jffs2/compr_rubin.c static void init_rubin(struct rubin_state *rs, int div, int *bits) div 95 fs/jffs2/compr_rubin.c rs->bit_divider = div; div 151 fs/jffs2/compr_rubin.c static void init_decode(struct rubin_state *rs, int div, int *bits) div 153 fs/jffs2/compr_rubin.c init_rubin(rs, div, bits); div 403 include/linux/clk-provider.h unsigned int div; div 604 include/linux/clk-provider.h unsigned int div; div 612 include/linux/clk-provider.h unsigned int mult, unsigned int div); div 616 include/linux/clk-provider.h unsigned int mult, unsigned int div); div 983 include/linux/clk-provider.h .div = _div, \ div 994 include/linux/clk-provider.h .div = _div, \ div 1009 include/linux/clk-provider.h .div = _div, \ div 1020 include/linux/clk-provider.h .div = _div, \ div 510 include/linux/cpufreq.h static inline unsigned long cpufreq_scale(unsigned long old, u_int div, div 515 include/linux/cpufreq.h do_div(result, div); div 520 include/linux/cpufreq.h result /= div; div 31 include/linux/jz4740-adc.h #define JZ_ADC_CONFIG_CLKDIV(div) ((div) << 5) div 146 include/linux/ktime.h extern s64 __ktime_divns(const ktime_t kt, s64 div); div 147 include/linux/ktime.h static inline s64 ktime_divns(const ktime_t kt, s64 div) div 153 include/linux/ktime.h BUG_ON(div < 0); div 154 include/linux/ktime.h if (__builtin_constant_p(div) && !(div >> 32)) { div 158 include/linux/ktime.h do_div(tmp, div); div 161 include/linux/ktime.h return __ktime_divns(kt, div); div 165 include/linux/ktime.h static inline s64 ktime_divns(const ktime_t kt, s64 div) div 171 include/linux/ktime.h WARN_ON(div < 0); div 172 include/linux/ktime.h return kt / div; div 44 include/linux/mfd/atmel-hlcdc.h #define ATMEL_HLCDC_CLKDIV(div) ((div - 2) << ATMEL_HLCDC_CLKDIV_SHFT) div 503 include/linux/mfd/db8500-prcmu.h int prcmu_config_clkout(u8 clkout, u8 source, u8 div); div 611 include/linux/mfd/db8500-prcmu.h static inline int prcmu_config_clkout(u8 clkout, u8 source, u8 div) div 260 include/linux/mfd/dbx500-prcmu.h int prcmu_config_clkout(u8 clkout, u8 source, u8 div); div 437 include/linux/mfd/dbx500-prcmu.h static inline int prcmu_config_clkout(u8 clkout, u8 source, u8 div) div 231 include/linux/mfd/ucb1x00.h static inline void ucb1x00_set_audio_divisor(struct ucb1x00 *ucb, unsigned int div) div 233 include/linux/mfd/ucb1x00.h mcp_set_audio_divisor(ucb->mcp, div); div 241 include/linux/mfd/ucb1x00.h static inline void ucb1x00_set_telecom_divisor(struct ucb1x00 *ucb, unsigned int div) div 243 include/linux/mfd/ucb1x00.h mcp_set_telecom_divisor(ucb->mcp, div); div 25 include/linux/platform_data/hwmon-s3c.h unsigned int div; div 34 include/linux/sh_clk.h #define SH_CLK_DIV_MSK(div) ((1 << (div)) - 1) div 118 include/sound/soc-dai.h int div_id, int div); div 182 include/sound/soc-dai.h int (*set_clkdiv)(struct snd_soc_dai *dai, int div_id, int div); div 381 kernel/locking/lockdep_proc.c s64 div; div 385 kernel/locking/lockdep_proc.c div = div_s64_rem(nr, 1000, &rem); div 386 kernel/locking/lockdep_proc.c snprintf(buf, bufsiz, "%lld.%02d", (long long)div, (int)rem/10); div 299 kernel/time/hrtimer.c s64 __ktime_divns(const ktime_t kt, s64 div) div 309 kernel/time/hrtimer.c while (div >> 32) { div 311 kernel/time/hrtimer.c div >>= 1; div 314 kernel/time/hrtimer.c do_div(tmp, (unsigned long) div); div 998 kernel/time/timekeeping.c static int scale64_check_overflow(u64 mult, u64 div, u64 *base) div 1002 kernel/time/timekeeping.c tmp = div64_u64_rem(*base, div, &rem); div 1010 kernel/time/timekeeping.c do_div(rem, div); div 15 net/mac80211/rc80211_minstrel.h #define MINSTREL_FRAC(val, div) (((val) << MINSTREL_SCALE) / div) div 523 net/packet/af_packet.c unsigned int mbits = 0, msec = 0, div = 0, tmo = 0; div 545 net/packet/af_packet.c div = ecmd.base.speed / 1000; div 552 net/packet/af_packet.c if (div) div 553 net/packet/af_packet.c mbits /= div; div 557 net/packet/af_packet.c if (div) div 242 net/wireless/wext-compat.c int i, div = 1000000; div 244 net/wireless/wext-compat.c div /= 10; div 245 net/wireless/wext-compat.c if (div <= 0) div 247 net/wireless/wext-compat.c return freq->m / div; div 89 sound/aoa/soundbus/i2sbus/interface.h # define I2S_SF_MCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_MCLKDIV_SHIFT)&I2S_SF_MCLKDIV_MASK) div 90 sound/aoa/soundbus/i2sbus/interface.h static inline int i2s_sf_mclkdiv(int div, int *out) div 94 sound/aoa/soundbus/i2sbus/interface.h switch(div) { div 100 sound/aoa/soundbus/i2sbus/interface.h if (div%2) return -1; div 101 sound/aoa/soundbus/i2sbus/interface.h d = div/2-1; div 104 sound/aoa/soundbus/i2sbus/interface.h *out |= I2S_SF_MCLKDIV_OTHER(div); div 116 sound/aoa/soundbus/i2sbus/interface.h # define I2S_SF_SCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_SCLKDIV_SHIFT)&I2S_SF_SCLKDIV_MASK) div 117 sound/aoa/soundbus/i2sbus/interface.h static inline int i2s_sf_sclkdiv(int div, int *out) div 121 sound/aoa/soundbus/i2sbus/interface.h switch(div) { div 125 sound/aoa/soundbus/i2sbus/interface.h if (div%2) return -1; div 126 sound/aoa/soundbus/i2sbus/interface.h d = div/2-1; div 128 sound/aoa/soundbus/i2sbus/interface.h *out |= I2S_SF_SCLKDIV_OTHER(div); div 48 sound/drivers/pcsp/pcsp.c int err, div, min_div, order; div 70 sound/drivers/pcsp/pcsp.c div = MAX_DIV / min_div; div 71 sound/drivers/pcsp/pcsp.c order = fls(div) - 1; div 42 sound/drivers/pcsp/pcsp.h #define PCSP_CALC_NS(div) ({ \ div 43 sound/drivers/pcsp/pcsp.h u64 __val = 1000000000ULL * (div); \ div 692 sound/hda/hdac_device.c #define HDA_RATE(base, mult, div) \ div 694 sound/hda/hdac_device.c (((div) - 1) << AC_FMT_DIV_SHIFT)) div 525 sound/pci/sonicvibes.c unsigned int div; div 528 sound/pci/sonicvibes.c div = 48000 / rate; div 529 sound/pci/sonicvibes.c if (div > 8) div 530 sound/pci/sonicvibes.c div = 8; div 531 sound/pci/sonicvibes.c if ((48000 / div) == rate) { /* use the alternate clock */ div 538 sound/pci/sonicvibes.c snd_sonicvibes_out1(sonic, SV_IREG_ADC_ALT_RATE, (div - 1) << 4); div 546 sound/pci/sonicvibes.c unsigned int rate, div, r, m, n; div 551 sound/pci/sonicvibes.c div = 48000 / rate; div 552 sound/pci/sonicvibes.c if (div > 8) div 553 sound/pci/sonicvibes.c div = 8; div 554 sound/pci/sonicvibes.c if ((48000 / div) == rate) { div 570 sound/pci/sonicvibes.c unsigned int div; div 573 sound/pci/sonicvibes.c div = (rate * 65536 + SV_FULLRATE / 2) / SV_FULLRATE; div 574 sound/pci/sonicvibes.c if (div > 65535) div 575 sound/pci/sonicvibes.c div = 65535; div 577 sound/pci/sonicvibes.c snd_sonicvibes_out1(sonic, SV_IREG_PCM_RATE_HIGH, div >> 8); div 578 sound/pci/sonicvibes.c snd_sonicvibes_out1(sonic, SV_IREG_PCM_RATE_LOW, div); div 103 sound/soc/atmel/atmel-i2s.c #define ATMEL_I2SC_MR_IMCKDIV(div) \ div 104 sound/soc/atmel/atmel-i2s.c (((div) << 16) & ATMEL_I2SC_MR_IMCKDIV_MASK) div 389 sound/soc/atmel/atmel_ssc_dai.c int div_id, int div) div 403 sound/soc/atmel/atmel_ssc_dai.c ssc_p->cmr_div = div; div 405 sound/soc/atmel/atmel_ssc_dai.c ssc_p->cmr_div = div; div 407 sound/soc/atmel/atmel_ssc_dai.c if (div != ssc_p->cmr_div) div 413 sound/soc/atmel/atmel_ssc_dai.c ssc_p->tcmr_period = div; div 418 sound/soc/atmel/atmel_ssc_dai.c ssc_p->rcmr_period = div; div 139 sound/soc/atmel/mchp-i2s-mcc.c #define MCHP_I2SMCC_MRA_IMCKDIV(div) \ div 140 sound/soc/atmel/mchp-i2s-mcc.c (((div) << 16) & MCHP_I2SMCC_MRA_IMCKDIV_MASK) div 150 sound/soc/atmel/mchp-i2s-mcc.c #define MCHP_I2SMCC_MRA_ISCKDIV(div) \ div 151 sound/soc/atmel/mchp-i2s-mcc.c (((div) << 24) & MCHP_I2SMCC_MRA_ISCKDIV_MASK) div 300 sound/soc/cirrus/ep93xx-i2s.c unsigned word_len, div, sdiv, lrdiv; div 333 sound/soc/cirrus/ep93xx-i2s.c div = clk_get_rate(info->mclk) / params_rate(params); div 335 sound/soc/cirrus/ep93xx-i2s.c if (div > (256 + 512) / 2) { div 339 sound/soc/cirrus/ep93xx-i2s.c if (div < (128 + 256) / 2) div 19 sound/soc/codecs/adau-utils.c unsigned int div; div 25 sound/soc/codecs/adau-utils.c div = 0; div 28 sound/soc/codecs/adau-utils.c div = DIV_ROUND_UP(freq_in, 13500000); div 29 sound/soc/codecs/adau-utils.c freq_in /= div; div 35 sound/soc/codecs/adau-utils.c div--; div 40 sound/soc/codecs/adau-utils.c div = 0; div 42 sound/soc/codecs/adau-utils.c if (n > 0xffff || m > 0xffff || div > 3 || r > 8 || r < 2) div 50 sound/soc/codecs/adau-utils.c regs[4] = (r << 3) | (div << 1); div 1036 sound/soc/codecs/adau1373.c unsigned int div; div 1047 sound/soc/codecs/adau1373.c div = 0; div 1050 sound/soc/codecs/adau1373.c div = 1; div 1053 sound/soc/codecs/adau1373.c div = 2; div 1056 sound/soc/codecs/adau1373.c div = 3; div 1059 sound/soc/codecs/adau1373.c div = 4; div 1062 sound/soc/codecs/adau1373.c div = 5; div 1065 sound/soc/codecs/adau1373.c div = 6; div 1071 sound/soc/codecs/adau1373.c adau1373_dai->enable_src = (div != 0); div 1075 sound/soc/codecs/adau1373.c (div << 2) | ADAU1373_BCLKDIV_64); div 463 sound/soc/codecs/adau17x1.c unsigned int val, div, dsp_div; div 486 sound/soc/codecs/adau17x1.c div = 0; div 490 sound/soc/codecs/adau17x1.c div = 1; div 494 sound/soc/codecs/adau17x1.c div = 2; div 498 sound/soc/codecs/adau17x1.c div = 3; div 502 sound/soc/codecs/adau17x1.c div = 4; div 506 sound/soc/codecs/adau17x1.c div = 5; div 510 sound/soc/codecs/adau17x1.c div = 6; div 518 sound/soc/codecs/adau17x1.c ADAU17X1_CONVERTER0_CONVSR_MASK, div); div 520 sound/soc/codecs/adau17x1.c regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div); div 1281 sound/soc/codecs/arizona.c int ref, div, refclk; div 1303 sound/soc/codecs/arizona.c div = 1; div 1304 sound/soc/codecs/arizona.c while (rates[ref] / div >= freq && div < 32) { div 1305 sound/soc/codecs/arizona.c if (rates[ref] / div == freq) { div 1311 sound/soc/codecs/arizona.c (div << div 1316 sound/soc/codecs/arizona.c div++; div 2155 sound/soc/codecs/arizona.c int refdiv, div; div 2158 sound/soc/codecs/arizona.c div = 1; div 2161 sound/soc/codecs/arizona.c div *= 2; div 2165 sound/soc/codecs/arizona.c if (div > ARIZONA_FLL_MAX_REFDIV) div 2200 sound/soc/codecs/arizona.c while (div <= ARIZONA_FLL_MAX_REFDIV) { div 2210 sound/soc/codecs/arizona.c Fref, refdiv, div, ratio); div 2236 sound/soc/codecs/arizona.c Fref, refdiv, div, ratio); div 2241 sound/soc/codecs/arizona.c div *= 2; div 2247 sound/soc/codecs/arizona.c Fref, refdiv, div, init_ratio); div 2258 sound/soc/codecs/arizona.c unsigned int target, div, gcd_fll; div 2264 sound/soc/codecs/arizona.c div = ARIZONA_FLL_MIN_OUTDIV; div 2265 sound/soc/codecs/arizona.c while (fll->fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) { div 2266 sound/soc/codecs/arizona.c div++; div 2267 sound/soc/codecs/arizona.c if (div > ARIZONA_FLL_MAX_OUTDIV) div 2270 sound/soc/codecs/arizona.c target = fll->fout * div / fll->vco_mult; div 2271 sound/soc/codecs/arizona.c cfg->outdiv = div; div 79 sound/soc/codecs/cx2072x.c unsigned int div; div 571 sound/soc/codecs/cx2072x.c unsigned int div = 8; div 576 sound/soc/codecs/cx2072x.c div = mclk_pre_div[i].div; div 580 sound/soc/codecs/cx2072x.c return div; div 688 sound/soc/codecs/cx2072x.c u64 div; div 842 sound/soc/codecs/cx2072x.c div = PLL_OUT_HZ_48; div 843 sound/soc/codecs/cx2072x.c mod = do_div(div, bclk_rate); div 849 sound/soc/codecs/cx2072x.c reg5.r.i2s_pcm_clk_div = (u32)div - 1; div 2464 sound/soc/codecs/madera.c int ref, div, refclk; div 2491 sound/soc/codecs/madera.c div = 2; div 2492 sound/soc/codecs/madera.c while ((rates[ref] / div >= freq) && (div <= 30)) { div 2493 sound/soc/codecs/madera.c if (rates[ref] / div == freq) { div 2497 sound/soc/codecs/madera.c val = (div << MADERA_OPCLK_DIV_SHIFT) | ref; div 2503 sound/soc/codecs/madera.c div += 2; div 2586 sound/soc/codecs/madera.c int div, div_inc, rate; div 2612 sound/soc/codecs/madera.c div = 1; div 2614 sound/soc/codecs/madera.c while (div <= 8) { div 2615 sound/soc/codecs/madera.c if (freq / div == rate && !(freq % div)) { div 2626 sound/soc/codecs/madera.c div *= 2; div 3479 sound/soc/codecs/madera.c int refdiv, div; div 3482 sound/soc/codecs/madera.c div = 1; div 3485 sound/soc/codecs/madera.c div *= 2; div 3489 sound/soc/codecs/madera.c if (div > MADERA_FLL_MAX_REFDIV) div 3530 sound/soc/codecs/madera.c while (div <= MADERA_FLL_MAX_REFDIV) { div 3559 sound/soc/codecs/madera.c div *= 2; div 632 sound/soc/codecs/nau8810.c int i, sclk, imclk = rate * 256, div = 0; div 648 sound/soc/codecs/nau8810.c div = i; div 651 sound/soc/codecs/nau8810.c "master clock prescaler %x for fs %d\n", div, rate); div 655 sound/soc/codecs/nau8810.c NAU8810_MCLKSEL_MASK, (div << NAU8810_MCLKSEL_SFT)); div 666 sound/soc/codecs/nau8822.c static int nau8822_config_clkdiv(struct snd_soc_dai *dai, int div, int rate) div 679 sound/soc/codecs/nau8822.c div = 0; div 685 sound/soc/codecs/nau8822.c div = i; div 688 sound/soc/codecs/nau8822.c div, rate); div 693 sound/soc/codecs/nau8822.c (div << NAU8822_MCLKSEL_SFT)); div 701 sound/soc/codecs/nau8822.c if (pll->mclk_scaler != div) { div 708 sound/soc/codecs/nau8822.c (div << NAU8822_MCLKSEL_SFT)); div 72 sound/soc/codecs/rl6231.c static const int div[] = {2, 3, 4, 6, 8, 12}; div 75 sound/soc/codecs/rl6231.c if (rate < 1000000 * div[0]) { div 80 sound/soc/codecs/rl6231.c for (i = 0; i < ARRAY_SIZE(div); i++) { div 81 sound/soc/codecs/rl6231.c if ((div[i] % 3) == 0) div 84 sound/soc/codecs/rl6231.c if (3072000 * div[i] >= rate) div 108 sound/soc/codecs/rl6231.c unsigned int max, unsigned int div) div 119 sound/soc/codecs/rl6231.c while (div % d != 0) div 142 sound/soc/codecs/rl6231.c unsigned int red, pll_out, in_t, out_t, div, div_t; div 170 sound/soc/codecs/rl6231.c div = find_best_div(freq_in, f_max, div_t); div 171 sound/soc/codecs/rl6231.c f_in = freq_in / div; div 172 sound/soc/codecs/rl6231.c f_out = freq_out / div; div 497 sound/soc/codecs/rt5514.c int div[] = {2, 3, 4, 8, 12, 16, 24, 32}; div 500 sound/soc/codecs/rt5514.c if (rate < 1000000 * div[0]) { div 505 sound/soc/codecs/rt5514.c for (i = 0; i < ARRAY_SIZE(div); i++) { div 507 sound/soc/codecs/rt5514.c if (3072000 * div[i] >= rate) div 1129 sound/soc/codecs/rt5668.c int target, const int div[], int size) div 1140 sound/soc/codecs/rt5668.c pr_info("div[%d]=%d\n", i, div[i]); div 1141 sound/soc/codecs/rt5668.c if (target * div[i] == rt5668->sysclk) div 1143 sound/soc/codecs/rt5668.c if (target * div[i + 1] > rt5668->sysclk) { div 1150 sound/soc/codecs/rt5668.c if (target * div[i] < rt5668->sysclk) div 1175 sound/soc/codecs/rt5668.c static const int div[] = {2, 4, 6, 8, 12, 16, 24, 32, 48, 64, 96, 128}; div 1177 sound/soc/codecs/rt5668.c idx = rt5668_div_sel(rt5668, 1500000, div, ARRAY_SIZE(div)); div 1192 sound/soc/codecs/rt5668.c static const int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48}; div 1202 sound/soc/codecs/rt5668.c idx = rt5668_div_sel(rt5668, ref, div, ARRAY_SIZE(div)); div 1155 sound/soc/codecs/rt5682.c int target, const int div[], int size) div 1166 sound/soc/codecs/rt5682.c pr_info("div[%d]=%d\n", i, div[i]); div 1167 sound/soc/codecs/rt5682.c if (target * div[i] == rt5682->sysclk) div 1169 sound/soc/codecs/rt5682.c if (target * div[i + 1] > rt5682->sysclk) { div 1176 sound/soc/codecs/rt5682.c if (target * div[i] < rt5682->sysclk) div 1201 sound/soc/codecs/rt5682.c static const int div[] = {2, 4, 6, 8, 12, 16, 24, 32, 48, 64, 96, 128}; div 1203 sound/soc/codecs/rt5682.c idx = rt5682_div_sel(rt5682, 1500000, div, ARRAY_SIZE(div)); div 294 sound/soc/codecs/tlv320aic32x4-clk.c struct clk_aic32x4 *div = to_clk_aic32x4(hw); div 296 sound/soc/codecs/tlv320aic32x4-clk.c return regmap_update_bits(div->regmap, div->reg, div 302 sound/soc/codecs/tlv320aic32x4-clk.c struct clk_aic32x4 *div = to_clk_aic32x4(hw); div 304 sound/soc/codecs/tlv320aic32x4-clk.c regmap_update_bits(div->regmap, div->reg, div 311 sound/soc/codecs/tlv320aic32x4-clk.c struct clk_aic32x4 *div = to_clk_aic32x4(hw); div 318 sound/soc/codecs/tlv320aic32x4-clk.c return regmap_update_bits(div->regmap, div->reg, div 337 sound/soc/codecs/tlv320aic32x4-clk.c struct clk_aic32x4 *div = to_clk_aic32x4(hw); div 341 sound/soc/codecs/tlv320aic32x4-clk.c regmap_read(div->regmap, div->reg, &val); div 1861 sound/soc/codecs/wm2200.c unsigned int div; div 1866 sound/soc/codecs/wm2200.c div = 1; div 1868 sound/soc/codecs/wm2200.c while ((Fref / div) > 13500000) { div 1869 sound/soc/codecs/wm2200.c div *= 2; div 1872 sound/soc/codecs/wm2200.c if (div > 8) { div 1882 sound/soc/codecs/wm2200.c Fref /= div; div 1885 sound/soc/codecs/wm2200.c div = 2; div 1886 sound/soc/codecs/wm2200.c while (Fout * div < 90000000) { div 1887 sound/soc/codecs/wm2200.c div++; div 1888 sound/soc/codecs/wm2200.c if (div > 64) { div 1894 sound/soc/codecs/wm2200.c target = Fout * div; div 1895 sound/soc/codecs/wm2200.c fll_div->fll_outdiv = div - 1; div 1681 sound/soc/codecs/wm5100.c unsigned int div; div 1686 sound/soc/codecs/wm5100.c div = 1; div 1688 sound/soc/codecs/wm5100.c while ((Fref / div) > 13500000) { div 1689 sound/soc/codecs/wm5100.c div *= 2; div 1692 sound/soc/codecs/wm5100.c if (div > 8) { div 1702 sound/soc/codecs/wm5100.c Fref /= div; div 1705 sound/soc/codecs/wm5100.c div = 2; div 1706 sound/soc/codecs/wm5100.c while (Fout * div < 90000000) { div 1707 sound/soc/codecs/wm5100.c div++; div 1708 sound/soc/codecs/wm5100.c if (div > 64) { div 1714 sound/soc/codecs/wm5100.c target = Fout * div; div 1715 sound/soc/codecs/wm5100.c fll_div->fll_outdiv = div - 1; div 786 sound/soc/codecs/wm8350.c static int wm8350_set_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div) div 795 sound/soc/codecs/wm8350.c snd_soc_component_write(component, WM8350_ADC_DIVIDER, val | div); div 800 sound/soc/codecs/wm8350.c snd_soc_component_write(component, WM8350_DAC_CLOCK_CONTROL, val | div); div 805 sound/soc/codecs/wm8350.c snd_soc_component_write(component, WM8350_CLOCK_CONTROL_1, val | div); div 810 sound/soc/codecs/wm8350.c snd_soc_component_write(component, WM8350_CLOCK_CONTROL_1, val | div); div 815 sound/soc/codecs/wm8350.c snd_soc_component_write(component, WM8350_CLOCK_CONTROL_1, val | div); div 820 sound/soc/codecs/wm8350.c snd_soc_component_write(component, WM8350_DAC_LR_RATE, val | div); div 825 sound/soc/codecs/wm8350.c snd_soc_component_write(component, WM8350_ADC_LR_RATE, val | div); div 962 sound/soc/codecs/wm8350.c int div; /* FLL_OUTDIV */ div 979 sound/soc/codecs/wm8350.c fll_div->div = 0x4; div 981 sound/soc/codecs/wm8350.c fll_div->div = 0x3; div 983 sound/soc/codecs/wm8350.c fll_div->div = 0x2; div 985 sound/soc/codecs/wm8350.c fll_div->div = 0x1; div 996 sound/soc/codecs/wm8350.c t1 = output * (1 << (fll_div->div + 1)); div 1046 sound/soc/codecs/wm8350.c freq_in, freq_out, fll_div.n, fll_div.k, fll_div.div, div 1053 sound/soc/codecs/wm8350.c fll_1 | (fll_div.div << 8) | 0x50); div 1044 sound/soc/codecs/wm8400.c int div_id, int div) div 1053 sound/soc/codecs/wm8400.c snd_soc_component_write(component, WM8400_CLOCKING_2, reg | div); div 1058 sound/soc/codecs/wm8400.c snd_soc_component_write(component, WM8400_CLOCKING_2, reg | div); div 1063 sound/soc/codecs/wm8400.c snd_soc_component_write(component, WM8400_CLOCKING_2, reg | div); div 1068 sound/soc/codecs/wm8400.c snd_soc_component_write(component, WM8400_CLOCKING_1, reg | div); div 350 sound/soc/codecs/wm8510.c int div_id, int div) div 358 sound/soc/codecs/wm8510.c snd_soc_component_write(component, WM8510_GPIO, reg | div); div 362 sound/soc/codecs/wm8510.c snd_soc_component_write(component, WM8510_CLOCK, reg | div); div 366 sound/soc/codecs/wm8510.c snd_soc_component_write(component, WM8510_ADC, reg | div); div 370 sound/soc/codecs/wm8510.c snd_soc_component_write(component, WM8510_DAC, reg | div); div 374 sound/soc/codecs/wm8510.c snd_soc_component_write(component, WM8510_CLOCK, reg | div); div 386 sound/soc/codecs/wm8580.c unsigned int div; div 413 sound/soc/codecs/wm8580.c if (target * post_table[i].div >= 90000000 && div 414 sound/soc/codecs/wm8580.c target * post_table[i].div <= 100000000) { div 417 sound/soc/codecs/wm8580.c target *= post_table[i].div; div 685 sound/soc/codecs/wm8580.c int div_id, int div) div 695 sound/soc/codecs/wm8580.c switch (div) { div 721 sound/soc/codecs/wm8580.c switch (div) { div 1022 sound/soc/codecs/wm8753.c int div_id, int div) div 1030 sound/soc/codecs/wm8753.c snd_soc_component_write(component, WM8753_CLOCK, reg | div); div 1034 sound/soc/codecs/wm8753.c snd_soc_component_write(component, WM8753_SRATE2, reg | div); div 1038 sound/soc/codecs/wm8753.c snd_soc_component_write(component, WM8753_SRATE2, reg | div); div 329 sound/soc/codecs/wm8804.c unsigned int div; div 356 sound/soc/codecs/wm8804.c tmp = target * post_table[i].div; div 361 sound/soc/codecs/wm8804.c target *= post_table[i].div; div 484 sound/soc/codecs/wm8804.c int div_id, int div) div 493 sound/soc/codecs/wm8804.c (div & 0x3) << 4); div 497 sound/soc/codecs/wm8804.c wm8804->mclk_div = div; div 690 sound/soc/codecs/wm8900.c unsigned int div; div 698 sound/soc/codecs/wm8900.c div = 1; div 700 sound/soc/codecs/wm8900.c div *= 2; div 707 sound/soc/codecs/wm8900.c if (div > 32) { div 710 sound/soc/codecs/wm8900.c div, Fref, Fout, target); div 714 sound/soc/codecs/wm8900.c fll_div->fllclk_div = div >> 2; div 822 sound/soc/codecs/wm8900.c int div_id, int div) div 829 sound/soc/codecs/wm8900.c WM8900_REG_CLOCKING1_BCLK_MASK, div); div 833 sound/soc/codecs/wm8900.c WM8900_REG_CLOCKING1_OPCLK_MASK, div); div 837 sound/soc/codecs/wm8900.c WM8900_LRC_MASK, div); div 841 sound/soc/codecs/wm8900.c WM8900_LRC_MASK, div); div 845 sound/soc/codecs/wm8900.c WM8900_REG_CLOCKING2_DAC_CLKDIV, div); div 849 sound/soc/codecs/wm8900.c WM8900_REG_CLOCKING2_ADC_CLKDIV, div); div 853 sound/soc/codecs/wm8900.c WM8900_REG_DACCTRL_AIF_LRCLKRATE, div); div 1331 sound/soc/codecs/wm8903.c int div; div 1398 sound/soc/codecs/wm8903.c int div; div 1514 sound/soc/codecs/wm8903.c clk_sys_ratios[0].div)) - fs); div 1518 sound/soc/codecs/wm8903.c clk_sys_ratios[i].div)) - fs); div 1542 sound/soc/codecs/wm8903.c clk_sys_ratios[clk_config].div); div 1570 sound/soc/codecs/wm8903.c aif2 |= bclk_divs[bclk_div].div; div 1260 sound/soc/codecs/wm8904.c int div; /* *10 due to .5s */ div 1375 sound/soc/codecs/wm8904.c cur_val = ((wm8904->sysclk_rate * 10) / bclk_divs[i].div) div 1384 sound/soc/codecs/wm8904.c wm8904->bclk = (wm8904->sysclk_rate * 10) / bclk_divs[best].div; div 1386 sound/soc/codecs/wm8904.c bclk_divs[best].div, wm8904->bclk); div 1610 sound/soc/codecs/wm8904.c unsigned int div; div 1614 sound/soc/codecs/wm8904.c div = 1; div 1616 sound/soc/codecs/wm8904.c while ((Fref / div) > 13500000) { div 1617 sound/soc/codecs/wm8904.c div *= 2; div 1620 sound/soc/codecs/wm8904.c if (div > 8) { div 1630 sound/soc/codecs/wm8904.c Fref /= div; div 1633 sound/soc/codecs/wm8904.c div = 4; div 1634 sound/soc/codecs/wm8904.c while (Fout * div < 90000000) { div 1635 sound/soc/codecs/wm8904.c div++; div 1636 sound/soc/codecs/wm8904.c if (div > 64) { div 1642 sound/soc/codecs/wm8904.c target = Fout * div; div 1643 sound/soc/codecs/wm8904.c fll_div->fll_outdiv = div - 1; div 633 sound/soc/codecs/wm8940.c int div_id, int div) div 642 sound/soc/codecs/wm8940.c ret = snd_soc_component_write(component, WM8940_CLOCK, reg | (div << 2)); div 646 sound/soc/codecs/wm8940.c ret = snd_soc_component_write(component, WM8940_CLOCK, reg | (div << 5)); div 650 sound/soc/codecs/wm8940.c ret = snd_soc_component_write(component, WM8940_GPIO, reg | (div << 4)); div 643 sound/soc/codecs/wm8955.c int div; div 649 sound/soc/codecs/wm8955.c div = WM8955_MCLKDIV2; div 652 sound/soc/codecs/wm8955.c div = 0; div 656 sound/soc/codecs/wm8955.c WM8955_MCLKDIV2, div); div 1241 sound/soc/codecs/wm8960.c int div_id, int div) div 1249 sound/soc/codecs/wm8960.c snd_soc_component_write(component, WM8960_CLOCK1, reg | div); div 1253 sound/soc/codecs/wm8960.c snd_soc_component_write(component, WM8960_CLOCK1, reg | div); div 1257 sound/soc/codecs/wm8960.c snd_soc_component_write(component, WM8960_PLL1, reg | div); div 1261 sound/soc/codecs/wm8960.c snd_soc_component_write(component, WM8960_CLOCK2, reg | div); div 1265 sound/soc/codecs/wm8960.c snd_soc_component_write(component, WM8960_ADDCTL1, reg | div); div 716 sound/soc/codecs/wm8961.c static int wm8961_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div) div 725 sound/soc/codecs/wm8961.c reg |= div; div 732 sound/soc/codecs/wm8961.c reg |= div; div 2736 sound/soc/codecs/wm8962.c unsigned int div; div 2741 sound/soc/codecs/wm8962.c div = 1; div 2743 sound/soc/codecs/wm8962.c while ((Fref / div) > 13500000) { div 2744 sound/soc/codecs/wm8962.c div *= 2; div 2747 sound/soc/codecs/wm8962.c if (div > 4) { div 2757 sound/soc/codecs/wm8962.c Fref /= div; div 2760 sound/soc/codecs/wm8962.c div = 2; div 2761 sound/soc/codecs/wm8962.c while (Fout * div < 90000000) { div 2762 sound/soc/codecs/wm8962.c div++; div 2763 sound/soc/codecs/wm8962.c if (div > 64) { div 2769 sound/soc/codecs/wm8962.c target = Fout * div; div 2770 sound/soc/codecs/wm8962.c fll_div->fll_outdiv = div - 1; div 358 sound/soc/codecs/wm8974.c int div_id, int div) div 366 sound/soc/codecs/wm8974.c snd_soc_component_write(component, WM8974_GPIO, reg | div); div 370 sound/soc/codecs/wm8974.c snd_soc_component_write(component, WM8974_CLOCK, reg | div); div 374 sound/soc/codecs/wm8974.c snd_soc_component_write(component, WM8974_CLOCK, reg | div); div 563 sound/soc/codecs/wm8978.c int div_id, int div) div 571 sound/soc/codecs/wm8978.c wm8978->f_opclk = div; div 591 sound/soc/codecs/wm8978.c if (div & ~0x1c) div 593 sound/soc/codecs/wm8978.c snd_soc_component_update_bits(component, WM8978_CLOCKING, 0x1c, div); div 599 sound/soc/codecs/wm8978.c dev_dbg(component->dev, "%s: ID %d, value %u\n", __func__, div_id, div); div 105 sound/soc/codecs/wm8983.c int div; div 725 sound/soc/codecs/wm8983.c tmp = (wm8983->sysclk / fs_ratios[i].div) * 10; div 195 sound/soc/codecs/wm8985.c int div; div 823 sound/soc/codecs/wm8985.c tmp = (wm8985->sysclk / fs_ratios[i].div) * 10; div 1030 sound/soc/codecs/wm8990.c int div_id, int div) div 1037 sound/soc/codecs/wm8990.c WM8990_MCLK_DIV_MASK, div); div 1041 sound/soc/codecs/wm8990.c WM8990_DAC_CLKDIV_MASK, div); div 1045 sound/soc/codecs/wm8990.c WM8990_ADC_CLKDIV_MASK, div); div 1049 sound/soc/codecs/wm8990.c WM8990_BCLK_DIV_MASK, div); div 1012 sound/soc/codecs/wm8991.c int div_id, int div) div 1021 sound/soc/codecs/wm8991.c snd_soc_component_write(component, WM8991_CLOCKING_2, reg | div); div 1026 sound/soc/codecs/wm8991.c snd_soc_component_write(component, WM8991_CLOCKING_2, reg | div); div 1031 sound/soc/codecs/wm8991.c snd_soc_component_write(component, WM8991_CLOCKING_2, reg | div); div 1036 sound/soc/codecs/wm8991.c snd_soc_component_write(component, WM8991_CLOCKING_1, reg | div); div 182 sound/soc/codecs/wm8993.c int div; /* *10 due to .5s */ div 387 sound/soc/codecs/wm8993.c unsigned int div; div 391 sound/soc/codecs/wm8993.c div = 1; div 393 sound/soc/codecs/wm8993.c while ((Fref / div) > 13500000) { div 394 sound/soc/codecs/wm8993.c div *= 2; div 397 sound/soc/codecs/wm8993.c if (div > 8) { div 407 sound/soc/codecs/wm8993.c Fref /= div; div 410 sound/soc/codecs/wm8993.c div = 0; div 413 sound/soc/codecs/wm8993.c div++; div 415 sound/soc/codecs/wm8993.c if (div > 7) { div 421 sound/soc/codecs/wm8993.c fll_div->fll_outdiv = div; div 1277 sound/soc/codecs/wm8993.c cur_val = ((wm8993->sysclk_rate * 10) / bclk_divs[i].div) div 1286 sound/soc/codecs/wm8993.c wm8993->bclk = (wm8993->sysclk_rate * 10) / bclk_divs[best].div; div 1288 sound/soc/codecs/wm8993.c bclk_divs[best].div, wm8993->bclk); div 1918 sound/soc/codecs/wm8996.c unsigned int div; div 1923 sound/soc/codecs/wm8996.c div = 1; div 1925 sound/soc/codecs/wm8996.c while ((Fref / div) > 13500000) { div 1926 sound/soc/codecs/wm8996.c div *= 2; div 1929 sound/soc/codecs/wm8996.c if (div > 8) { div 1939 sound/soc/codecs/wm8996.c Fref /= div; div 1952 sound/soc/codecs/wm8996.c div = 2; div 1953 sound/soc/codecs/wm8996.c while (Fout * div < 90000000) { div 1954 sound/soc/codecs/wm8996.c div++; div 1955 sound/soc/codecs/wm8996.c if (div > 64) { div 1961 sound/soc/codecs/wm8996.c target = Fout * div; div 1962 sound/soc/codecs/wm8996.c fll_div->fll_outdiv = div - 1; div 119 sound/soc/codecs/wm9081.c int div; /* *10 due to .5s */ div 467 sound/soc/codecs/wm9081.c unsigned int div; div 471 sound/soc/codecs/wm9081.c div = 1; div 472 sound/soc/codecs/wm9081.c while ((Fref / div) > 13500000) { div 473 sound/soc/codecs/wm9081.c div *= 2; div 475 sound/soc/codecs/wm9081.c if (div > 8) { div 481 sound/soc/codecs/wm9081.c fll_div->fll_clk_ref_div = div / 2; div 486 sound/soc/codecs/wm9081.c Fref /= div; div 489 sound/soc/codecs/wm9081.c div = 0; div 492 sound/soc/codecs/wm9081.c div++; div 494 sound/soc/codecs/wm9081.c if (div > 7) { div 500 sound/soc/codecs/wm9081.c fll_div->fll_outdiv = div; div 1090 sound/soc/codecs/wm9081.c cur_val = ((wm9081->sysclk_rate * 10) / bclk_divs[i].div) div 1099 sound/soc/codecs/wm9081.c wm9081->bclk = (wm9081->sysclk_rate * 10) / bclk_divs[best].div; div 1101 sound/soc/codecs/wm9081.c bclk_divs[best].div, wm9081->bclk); div 903 sound/soc/codecs/wm9713.c int div_id, int div) div 909 sound/soc/codecs/wm9713.c snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x0f00, div); div 912 sound/soc/codecs/wm9713.c snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x0002, div); div 915 sound/soc/codecs/wm9713.c snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x0004, div); div 918 sound/soc/codecs/wm9713.c snd_soc_component_update_bits(component, AC97_HANDSET_RATE, 0x7000, div); div 921 sound/soc/codecs/wm9713.c snd_soc_component_update_bits(component, AC97_CENTER_LFE_MASTER, 0x0e00, div); div 925 sound/soc/codecs/wm9713.c 0x007f, div | 0x60); div 929 sound/soc/codecs/wm9713.c 0x007f, div | 0x70); div 202 sound/soc/fsl/fsl_asrc.c static u32 fsl_asrc_cal_asrck_divisor(struct fsl_asrc_pair *pair, u32 div) div 207 sound/soc/fsl/fsl_asrc.c for (ps = 0; div > 8; ps++) div 208 sound/soc/fsl/fsl_asrc.c div >>= 1; div 210 sound/soc/fsl/fsl_asrc.c return ((div - 1) << ASRCDRi_AxCPi_WIDTH) | ps; div 269 sound/soc/fsl/fsl_asrc.c u32 clk_index[2], div[2]; div 329 sound/soc/fsl/fsl_asrc.c div[IN] = clk_get_rate(clk) / inrate; div 330 sound/soc/fsl/fsl_asrc.c if (div[IN] == 0) { div 340 sound/soc/fsl/fsl_asrc.c div[OUT] = clk_get_rate(clk) / IDEAL_RATIO_RATE; div 342 sound/soc/fsl/fsl_asrc.c div[OUT] = clk_get_rate(clk) / outrate; div 344 sound/soc/fsl/fsl_asrc.c if (div[OUT] == 0) { div 374 sound/soc/fsl/fsl_asrc.c indiv = fsl_asrc_cal_asrck_divisor(pair, div[IN]); div 375 sound/soc/fsl/fsl_asrc.c outdiv = fsl_asrc_cal_asrck_divisor(pair, div[OUT]); div 185 sound/soc/fsl/imx-ssi.c int div_id, int div) div 196 sound/soc/fsl/imx-ssi.c stccr |= div; div 200 sound/soc/fsl/imx-ssi.c stccr |= div; div 204 sound/soc/fsl/imx-ssi.c stccr |= SSI_STCCR_PM(div); div 208 sound/soc/fsl/imx-ssi.c stccr |= div; div 212 sound/soc/fsl/imx-ssi.c stccr |= div; div 216 sound/soc/fsl/imx-ssi.c stccr |= SSI_STCCR_PM(div); div 255 sound/soc/jz4740/jz4740-i2s.c int div; div 260 sound/soc/jz4740/jz4740-i2s.c div = clk_get_rate(i2s->clk_i2s) / (64 * params_rate(params)); div 282 sound/soc/jz4740/jz4740-i2s.c div_reg |= (div - 1) << I2SDIV_DV_SHIFT; div 289 sound/soc/jz4740/jz4740-i2s.c div_reg |= (div - 1) << I2SDIV_IDV_SHIFT; div 292 sound/soc/jz4740/jz4740-i2s.c div_reg |= (div - 1) << I2SDIV_DV_SHIFT; div 185 sound/soc/pxa/pxa-ssp.c static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div) div 191 sound/soc/pxa/pxa-ssp.c sscr0 |= ((div - 2)/2) << 8; /* 2..512 */ div 194 sound/soc/pxa/pxa-ssp.c sscr0 |= (div - 1) << 8; /* 1..4096 */ div 79 sound/soc/rockchip/rockchip_pdm.c unsigned int i, count, clk, div, rate; div 89 sound/soc/rockchip/rockchip_pdm.c div = sr / clkref[i].sr; div 90 sound/soc/rockchip/rockchip_pdm.c if ((div & (div - 1)) == 0) { div 72 sound/soc/samsung/h1940_uda1380.c int div; div 80 sound/soc/samsung/h1940_uda1380.c div = s3c24xx_i2s_get_clockrate() / (384 * rate); div 82 sound/soc/samsung/h1940_uda1380.c div++; div 110 sound/soc/samsung/h1940_uda1380.c S3C24XX_PRESCALE(div, div)); div 979 sound/soc/samsung/i2s.c int div_id, int div) div 987 sound/soc/samsung/i2s.c if ((any_active(i2s) && div && (get_bfs(i2s) != div)) div 988 sound/soc/samsung/i2s.c || (other && other->bfs && (other->bfs != div))) { div 994 sound/soc/samsung/i2s.c i2s->bfs = div; div 38 sound/soc/samsung/jive_wm8750.c struct s3c_i2sv2_rate_calc div; div 56 sound/soc/samsung/jive_wm8750.c s3c_i2sv2_iis_calc_rate(&div, NULL, params_rate(params), div 65 sound/soc/samsung/jive_wm8750.c ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C2412_DIV_RCLK, div.fs_div); div 70 sound/soc/samsung/jive_wm8750.c div.clk_div - 1); div 385 sound/soc/samsung/pcm.c int div_id, int div) div 391 sound/soc/samsung/pcm.c pcm->sclk_per_fs = div; div 153 sound/soc/samsung/rx1950_uda1380.c int div; div 163 sound/soc/samsung/rx1950_uda1380.c div = s3c24xx_i2s_get_clockrate() / (256 * rate); div 165 sound/soc/samsung/rx1950_uda1380.c div++; div 171 sound/soc/samsung/rx1950_uda1380.c div = 1; div 199 sound/soc/samsung/rx1950_uda1380.c S3C24XX_PRESCALE(div, div)); div 444 sound/soc/samsung/s3c-i2s-v2.c int div_id, int div) div 449 sound/soc/samsung/s3c-i2s-v2.c pr_debug("%s(%p, %d, %d)\n", __func__, cpu_dai, div_id, div); div 453 sound/soc/samsung/s3c-i2s-v2.c switch (div) { div 455 sound/soc/samsung/s3c-i2s-v2.c div = S3C2412_IISMOD_BCLK_16FS; div 459 sound/soc/samsung/s3c-i2s-v2.c div = S3C2412_IISMOD_BCLK_32FS; div 463 sound/soc/samsung/s3c-i2s-v2.c div = S3C2412_IISMOD_BCLK_24FS; div 467 sound/soc/samsung/s3c-i2s-v2.c div = S3C2412_IISMOD_BCLK_48FS; div 476 sound/soc/samsung/s3c-i2s-v2.c writel(reg | div, i2s->regs + S3C2412_IISMOD); div 482 sound/soc/samsung/s3c-i2s-v2.c switch (div) { div 484 sound/soc/samsung/s3c-i2s-v2.c div = S3C2412_IISMOD_RCLK_256FS; div 488 sound/soc/samsung/s3c-i2s-v2.c div = S3C2412_IISMOD_RCLK_384FS; div 492 sound/soc/samsung/s3c-i2s-v2.c div = S3C2412_IISMOD_RCLK_512FS; div 496 sound/soc/samsung/s3c-i2s-v2.c div = S3C2412_IISMOD_RCLK_768FS; div 505 sound/soc/samsung/s3c-i2s-v2.c writel(reg | div, i2s->regs + S3C2412_IISMOD); div 510 sound/soc/samsung/s3c-i2s-v2.c if (div >= 0) { div 511 sound/soc/samsung/s3c-i2s-v2.c writel((div << 8) | S3C2412_IISPSR_PSREN, div 561 sound/soc/samsung/s3c-i2s-v2.c unsigned int div; div 581 sound/soc/samsung/s3c-i2s-v2.c div = fsclk / rate; div 584 sound/soc/samsung/s3c-i2s-v2.c div++; div 586 sound/soc/samsung/s3c-i2s-v2.c if (div <= 1) div 589 sound/soc/samsung/s3c-i2s-v2.c actual = clkrate / (fsdiv * div); div 593 sound/soc/samsung/s3c-i2s-v2.c fsdiv, div, actual, deviation); div 599 sound/soc/samsung/s3c-i2s-v2.c best_div = div; div 301 sound/soc/samsung/s3c24xx-i2s.c int div_id, int div) div 308 sound/soc/samsung/s3c24xx-i2s.c writel(reg | div, s3c24xx_i2s.regs + S3C2410_IISMOD); div 312 sound/soc/samsung/s3c24xx-i2s.c writel(reg | div, s3c24xx_i2s.regs + S3C2410_IISMOD); div 315 sound/soc/samsung/s3c24xx-i2s.c writel(div, s3c24xx_i2s.regs + S3C2410_IISPSR); div 129 sound/soc/samsung/s3c24xx_uda134x.c unsigned int div; div 149 sound/soc/samsung/s3c24xx_uda134x.c div = 1; div 152 sound/soc/samsung/s3c24xx_uda134x.c div = bi % 33; div 162 sound/soc/samsung/s3c24xx_uda134x.c div, clk, err); div 185 sound/soc/samsung/s3c24xx_uda134x.c S3C24XX_PRESCALE(div, div)); div 239 sound/soc/sh/fsi.c struct clk *div; div 731 sound/soc/sh/fsi.c int div, div 740 sound/soc/sh/fsi.c clock->div = NULL; div 776 sound/soc/sh/fsi.c if (div) { div 777 sound/soc/sh/fsi.c clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb"); div 778 sound/soc/sh/fsi.c if (IS_ERR(clock->div)) { div 782 sound/soc/sh/fsi.c if (clock->div == clock->own) { div 821 sound/soc/sh/fsi.c clk_enable(clock->div); div 840 sound/soc/sh/fsi.c clk_disable(clock->div); div 949 sound/soc/sh/fsi.c struct clk *div = fsi->clock.div; div 1019 sound/soc/sh/fsi.c ret = clk_set_rate(div, clk_round_rate(div, best_act)); div 1026 sound/soc/sh/fsi.c clk_get_rate(ick), clk_get_rate(div)); div 65 sound/soc/sh/rcar/adg.c static u32 rsnd_adg_calculate_rbgx(unsigned long div) div 69 sound/soc/sh/rcar/adg.c if (!div) div 74 sound/soc/sh/rcar/adg.c if (0 == (div % ratio)) div 75 sound/soc/sh/rcar/adg.c return (u32)((i << 8) | ((div / ratio) - 1)); div 114 sound/soc/sh/rcar/adg.c int idx, sel, div, step; div 135 sound/soc/sh/rcar/adg.c for (div = 2; div <= 98304; div += step) { div 136 sound/soc/sh/rcar/adg.c diff = abs(target_rate - sel_rate[sel] / div); div 150 sound/soc/sh/rcar/adg.c div += step; div 412 sound/soc/sh/rcar/adg.c u32 rate, div; div 486 sound/soc/sh/rcar/adg.c div = 6; div 488 sound/soc/sh/rcar/adg.c div = rate / req_441kHz_rate; div 489 sound/soc/sh/rcar/adg.c rbgx = rsnd_adg_calculate_rbgx(div); div 492 sound/soc/sh/rcar/adg.c adg->rbga_rate_for_441khz = rate / div; div 502 sound/soc/sh/rcar/adg.c div = 6; div 504 sound/soc/sh/rcar/adg.c div = rate / req_48kHz_rate; div 505 sound/soc/sh/rcar/adg.c rbgx = rsnd_adg_calculate_rbgx(div); div 508 sound/soc/sh/rcar/adg.c adg->rbgb_rate_for_48khz = rate / div; div 222 sound/soc/sh/ssi.c static int ssi_set_clkdiv(struct snd_soc_dai *dai, int did, int div) div 230 sound/soc/sh/ssi.c switch (div) { div 238 sound/soc/sh/ssi.c pr_debug("ssi: invalid sck divider %d\n", div); div 43 sound/soc/soc-dai.c int div_id, int div) div 46 sound/soc/soc-dai.c return dai->driver->ops->set_clkdiv(dai, div_id, div); div 427 sound/soc/stm/stm32_i2s.c unsigned int tmp, div, real_div, nb_bits, frame_len; div 472 sound/soc/stm/stm32_i2s.c div = tmp >> 1; div 474 sound/soc/stm/stm32_i2s.c cgfr = I2S_CGFR_I2SDIV_SET(div) | (odd << I2S_CGFR_ODD_SHIFT); div 477 sound/soc/stm/stm32_i2s.c real_div = ((2 * div) + odd); div 481 sound/soc/stm/stm32_i2s.c div, odd, real_div); div 483 sound/soc/stm/stm32_i2s.c if (((div == 1) && odd) || (div > I2S_CGFR_I2SDIV_MAX)) { div 488 sound/soc/stm/stm32_i2s.c if (!div && !odd) div 318 sound/soc/stm/stm32_sai_sub.c int div; div 320 sound/soc/stm/stm32_sai_sub.c div = DIV_ROUND_CLOSEST(input_rate, output_rate); div 321 sound/soc/stm/stm32_sai_sub.c if (div > SAI_XCR1_MCKDIV_MAX(version)) { div 322 sound/soc/stm/stm32_sai_sub.c dev_err(&sai->pdev->dev, "Divider %d out of range\n", div); div 325 sound/soc/stm/stm32_sai_sub.c dev_dbg(&sai->pdev->dev, "SAI divider %d\n", div); div 327 sound/soc/stm/stm32_sai_sub.c if (input_rate % div) div 330 sound/soc/stm/stm32_sai_sub.c output_rate, input_rate / div); div 332 sound/soc/stm/stm32_sai_sub.c return div; div 336 sound/soc/stm/stm32_sai_sub.c unsigned int div) div 341 sound/soc/stm/stm32_sai_sub.c if (div > SAI_XCR1_MCKDIV_MAX(version)) { div 342 sound/soc/stm/stm32_sai_sub.c dev_err(&sai->pdev->dev, "Divider %d out of range\n", div); div 347 sound/soc/stm/stm32_sai_sub.c cr1 = SAI_XCR1_MCKDIV_SET(div); div 379 sound/soc/stm/stm32_sai_sub.c int div; div 381 sound/soc/stm/stm32_sai_sub.c div = stm32_sai_get_clk_div(sai, *prate, rate); div 382 sound/soc/stm/stm32_sai_sub.c if (div < 0) div 383 sound/soc/stm/stm32_sai_sub.c return div; div 385 sound/soc/stm/stm32_sai_sub.c mclk->freq = *prate / div; div 403 sound/soc/stm/stm32_sai_sub.c int div, ret; div 405 sound/soc/stm/stm32_sai_sub.c div = stm32_sai_get_clk_div(sai, parent_rate, rate); div 406 sound/soc/stm/stm32_sai_sub.c if (div < 0) div 407 sound/soc/stm/stm32_sai_sub.c return div; div 409 sound/soc/stm/stm32_sai_sub.c ret = stm32_sai_set_clk_div(sai, div); div 991 sound/soc/stm/stm32_sai_sub.c int div = 0, cr1 = 0; div 1015 sound/soc/stm/stm32_sai_sub.c div = stm32_sai_get_clk_div(sai, sai_clk_rate, div 1017 sound/soc/stm/stm32_sai_sub.c if (div < 0) div 1018 sound/soc/stm/stm32_sai_sub.c return div; div 1031 sound/soc/stm/stm32_sai_sub.c div = stm32_sai_get_clk_div(sai, sai_clk_rate, div 1033 sound/soc/stm/stm32_sai_sub.c if (div < 0) div 1034 sound/soc/stm/stm32_sai_sub.c return div; div 1051 sound/soc/stm/stm32_sai_sub.c div = stm32_sai_get_clk_div(sai, sai_clk_rate, div 1053 sound/soc/stm/stm32_sai_sub.c if (div < 0) div 1054 sound/soc/stm/stm32_sai_sub.c return div; div 1058 sound/soc/stm/stm32_sai_sub.c div = stm32_sai_get_clk_div(sai, sai_clk_rate, div 1060 sound/soc/stm/stm32_sai_sub.c if (div < 0) div 1061 sound/soc/stm/stm32_sai_sub.c return div; div 1066 sound/soc/stm/stm32_sai_sub.c return stm32_sai_set_clk_div(sai, div); div 185 sound/soc/sunxi/sun4i-i2s.c u8 div; div 190 sound/soc/sunxi/sun4i-i2s.c { .div = 2, .val = 0 }, div 191 sound/soc/sunxi/sun4i-i2s.c { .div = 4, .val = 1 }, div 192 sound/soc/sunxi/sun4i-i2s.c { .div = 6, .val = 2 }, div 193 sound/soc/sunxi/sun4i-i2s.c { .div = 8, .val = 3 }, div 194 sound/soc/sunxi/sun4i-i2s.c { .div = 12, .val = 4 }, div 195 sound/soc/sunxi/sun4i-i2s.c { .div = 16, .val = 5 }, div 200 sound/soc/sunxi/sun4i-i2s.c { .div = 1, .val = 0 }, div 201 sound/soc/sunxi/sun4i-i2s.c { .div = 2, .val = 1 }, div 202 sound/soc/sunxi/sun4i-i2s.c { .div = 4, .val = 2 }, div 203 sound/soc/sunxi/sun4i-i2s.c { .div = 6, .val = 3 }, div 204 sound/soc/sunxi/sun4i-i2s.c { .div = 8, .val = 4 }, div 205 sound/soc/sunxi/sun4i-i2s.c { .div = 12, .val = 5 }, div 206 sound/soc/sunxi/sun4i-i2s.c { .div = 16, .val = 6 }, div 207 sound/soc/sunxi/sun4i-i2s.c { .div = 24, .val = 7 }, div 212 sound/soc/sunxi/sun4i-i2s.c { .div = 1, .val = 1 }, div 213 sound/soc/sunxi/sun4i-i2s.c { .div = 2, .val = 2 }, div 214 sound/soc/sunxi/sun4i-i2s.c { .div = 4, .val = 3 }, div 215 sound/soc/sunxi/sun4i-i2s.c { .div = 6, .val = 4 }, div 216 sound/soc/sunxi/sun4i-i2s.c { .div = 8, .val = 5 }, div 217 sound/soc/sunxi/sun4i-i2s.c { .div = 12, .val = 6 }, div 218 sound/soc/sunxi/sun4i-i2s.c { .div = 16, .val = 7 }, div 219 sound/soc/sunxi/sun4i-i2s.c { .div = 24, .val = 8 }, div 220 sound/soc/sunxi/sun4i-i2s.c { .div = 32, .val = 9 }, div 221 sound/soc/sunxi/sun4i-i2s.c { .div = 48, .val = 10 }, div 222 sound/soc/sunxi/sun4i-i2s.c { .div = 64, .val = 11 }, div 223 sound/soc/sunxi/sun4i-i2s.c { .div = 96, .val = 12 }, div 224 sound/soc/sunxi/sun4i-i2s.c { .div = 128, .val = 13 }, div 225 sound/soc/sunxi/sun4i-i2s.c { .div = 176, .val = 14 }, div 226 sound/soc/sunxi/sun4i-i2s.c { .div = 192, .val = 15 }, div 246 sound/soc/sunxi/sun4i-i2s.c int div = parent_rate / sampling_rate / word_size / channels; div 252 sound/soc/sunxi/sun4i-i2s.c if (bdiv->div == div) div 264 sound/soc/sunxi/sun4i-i2s.c int div = parent_rate / mclk_rate; div 270 sound/soc/sunxi/sun4i-i2s.c if (mdiv->div == div) div 252 sound/soc/sunxi/sun8i-codec.c u8 div; div 257 sound/soc/sunxi/sun8i-codec.c { .div = 1, .val = 0 }, div 258 sound/soc/sunxi/sun8i-codec.c { .div = 2, .val = 1 }, div 259 sound/soc/sunxi/sun8i-codec.c { .div = 4, .val = 2 }, div 260 sound/soc/sunxi/sun8i-codec.c { .div = 6, .val = 3 }, div 261 sound/soc/sunxi/sun8i-codec.c { .div = 8, .val = 4 }, div 262 sound/soc/sunxi/sun8i-codec.c { .div = 12, .val = 5 }, div 263 sound/soc/sunxi/sun8i-codec.c { .div = 16, .val = 6 }, div 264 sound/soc/sunxi/sun8i-codec.c { .div = 24, .val = 7 }, div 265 sound/soc/sunxi/sun8i-codec.c { .div = 32, .val = 8 }, div 266 sound/soc/sunxi/sun8i-codec.c { .div = 48, .val = 9 }, div 267 sound/soc/sunxi/sun8i-codec.c { .div = 64, .val = 10 }, div 268 sound/soc/sunxi/sun8i-codec.c { .div = 96, .val = 11 }, div 269 sound/soc/sunxi/sun8i-codec.c { .div = 128, .val = 12 }, div 270 sound/soc/sunxi/sun8i-codec.c { .div = 192, .val = 13 }, div 278 sound/soc/sunxi/sun8i-codec.c unsigned int div = clk_rate / rate / word_size / 2; div 284 sound/soc/sunxi/sun8i-codec.c unsigned int diff = abs(bdiv->div - div); div 298 sound/soc/sunxi/sun8i-codec.c unsigned int div = word_size * channels; div 300 sound/soc/sunxi/sun8i-codec.c if (div < 16 || div > 256) div 303 sound/soc/sunxi/sun8i-codec.c return ilog2(div) - 4; div 365 sound/soc/ti/davinci-i2s.c int div_id, int div) div 372 sound/soc/ti/davinci-i2s.c dev->clk_div = div; div 607 sound/soc/ti/davinci-mcasp.c int div, bool explicit) div 613 sound/soc/ti/davinci-mcasp.c AHCLKXDIV(div - 1), AHCLKXDIV_MASK); div 615 sound/soc/ti/davinci-mcasp.c AHCLKRDIV(div - 1), AHCLKRDIV_MASK); div 620 sound/soc/ti/davinci-mcasp.c ACLKXDIV(div - 1), ACLKXDIV_MASK); div 622 sound/soc/ti/davinci-mcasp.c ACLKRDIV(div - 1), ACLKRDIV_MASK); div 624 sound/soc/ti/davinci-mcasp.c mcasp->bclk_div = div; div 638 sound/soc/ti/davinci-mcasp.c mcasp->slot_width = div / mcasp->tdm_slots; div 639 sound/soc/ti/davinci-mcasp.c if (div % mcasp->tdm_slots) div 642 sound/soc/ti/davinci-mcasp.c __func__, div, mcasp->tdm_slots); div 654 sound/soc/ti/davinci-mcasp.c int div) div 658 sound/soc/ti/davinci-mcasp.c return __davinci_mcasp_set_clkdiv(mcasp, div_id, div, 1); div 1081 sound/soc/ti/davinci-mcasp.c int div = sysclk_freq / bclk_freq; div 1086 sound/soc/ti/davinci-mcasp.c if (div > (ACLKXDIV_MASK + 1)) { div 1088 sound/soc/ti/davinci-mcasp.c aux_div = div / (ACLKXDIV_MASK + 1); div 1089 sound/soc/ti/davinci-mcasp.c if (div % (ACLKXDIV_MASK + 1)) div 1093 sound/soc/ti/davinci-mcasp.c div = sysclk_freq / bclk_freq; div 1102 sound/soc/ti/davinci-mcasp.c if (div == 0 || div 1103 sound/soc/ti/davinci-mcasp.c ((sysclk_freq / div) - bclk_freq) > div 1104 sound/soc/ti/davinci-mcasp.c (bclk_freq - (sysclk_freq / (div+1)))) { div 1105 sound/soc/ti/davinci-mcasp.c div++; div 1109 sound/soc/ti/davinci-mcasp.c error_ppm = (div*1000000 + (int)div64_long(1000000LL*rem, div 1110 sound/soc/ti/davinci-mcasp.c (int)bclk_freq)) / div - 1000000; div 1117 sound/soc/ti/davinci-mcasp.c __davinci_mcasp_set_clkdiv(mcasp, MCASP_CLKDIV_BCLK, div, 0); div 938 sound/soc/ti/omap-mcbsp.c unsigned int format, div, framesize, master; div 1047 sound/soc/ti/omap-mcbsp.c div = mcbsp->clk_div ? mcbsp->clk_div : 1; div 1048 sound/soc/ti/omap-mcbsp.c framesize = (mcbsp->in_freq / div) / params_rate(params); div 1195 sound/soc/ti/omap-mcbsp.c int div_id, int div) div 1203 sound/soc/ti/omap-mcbsp.c mcbsp->clk_div = div; div 1205 sound/soc/ti/omap-mcbsp.c regs->srgr1 |= CLKGDV(div - 1); div 132 sound/soc/uniphier/aio-cpu.c int div[] = { 2, 3, 1, 3, }; div 140 sound/soc/uniphier/aio-cpu.c if (pll->freq * mul[i] / div[i] == freq) div 26 sound/soc/xilinx/xlnx_i2s.c int div_id, int div) div 30 sound/soc/xilinx/xlnx_i2s.c if (!div || (div & ~I2S_I2STIM_VALID_MASK)) div 33 sound/soc/xilinx/xlnx_i2s.c writel(div, base + I2S_I2STIM_OFFSET); div 105 tools/bpf/bpf_exp.y | div div 374 tools/bpf/bpf_exp.y div div 5521 tools/lib/traceevent/event-parse.c int div = 0; div 5528 tools/lib/traceevent/event-parse.c div = atoi(divstr + 1); div 5530 tools/lib/traceevent/event-parse.c if (div) { div 5531 tools/lib/traceevent/event-parse.c time += div / 2; div 5532 tools/lib/traceevent/event-parse.c time /= div;