dist_base 44 arch/arm/mach-ux500/pm.c static void __iomem *dist_base; dist_base 96 arch/arm/mach-ux500/pm.c pr = readl_relaxed(dist_base + GIC_DIST_PENDING_SET + i * 4); dist_base 97 arch/arm/mach-ux500/pm.c er = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); dist_base 149 arch/arm/mach-ux500/pm.c er = readl_relaxed(dist_base + dist_base 188 arch/arm/mach-ux500/pm.c dist_base = of_iomap(np, 0); dist_base 190 arch/arm/mach-ux500/pm.c if (!dist_base) { dist_base 46 drivers/irqchip/irq-gic-v3.c void __iomem *dist_base; dist_base 158 drivers/irqchip/irq-gic-v3.c return gic_data.dist_base; dist_base 183 drivers/irqchip/irq-gic-v3.c gic_do_wait_for_rwp(gic_data.dist_base); dist_base 303 drivers/irqchip/irq-gic-v3.c base = gic_data.dist_base; dist_base 321 drivers/irqchip/irq-gic-v3.c base = gic_data.dist_base; dist_base 547 drivers/irqchip/irq-gic-v3.c base = gic_data.dist_base; dist_base 716 drivers/irqchip/irq-gic-v3.c void __iomem *base = gic_data.dist_base; dist_base 874 drivers/irqchip/irq-gic-v3.c return readl_relaxed(gic_data.dist_base + GICD_CTLR) & GICD_CTLR_DS; dist_base 1002 drivers/irqchip/irq-gic-v3.c !!(readl_relaxed(gic_data.dist_base + GICD_TYPER) & GICD_TYPER_LPIS) && dist_base 1513 drivers/irqchip/irq-gic-v3.c static int __init gic_init_bases(void __iomem *dist_base, dist_base 1529 drivers/irqchip/irq-gic-v3.c gic_data.dist_base = dist_base; dist_base 1537 drivers/irqchip/irq-gic-v3.c typer = readl_relaxed(gic_data.dist_base + GICD_TYPER); dist_base 1540 drivers/irqchip/irq-gic-v3.c gic_enable_quirks(readl_relaxed(gic_data.dist_base + GICD_IIDR), dist_base 1595 drivers/irqchip/irq-gic-v3.c static int __init gic_validate_dist_version(void __iomem *dist_base) dist_base 1597 drivers/irqchip/irq-gic-v3.c u32 reg = readl_relaxed(dist_base + GICD_PIDR2) & GIC_PIDR2_ARCH_MASK; dist_base 1727 drivers/irqchip/irq-gic-v3.c void __iomem *dist_base; dist_base 1733 drivers/irqchip/irq-gic-v3.c dist_base = of_iomap(node, 0); dist_base 1734 drivers/irqchip/irq-gic-v3.c if (!dist_base) { dist_base 1739 drivers/irqchip/irq-gic-v3.c err = gic_validate_dist_version(dist_base); dist_base 1774 drivers/irqchip/irq-gic-v3.c err = gic_init_bases(dist_base, rdist_regs, nr_redist_regions, dist_base 1791 drivers/irqchip/irq-gic-v3.c iounmap(dist_base); dist_base 1800 drivers/irqchip/irq-gic-v3.c void __iomem *dist_base; dist_base 1845 drivers/irqchip/irq-gic-v3.c u32 reg = readl_relaxed(acpi_data.dist_base + GICD_PIDR2) & GIC_PIDR2_ARCH_MASK; dist_base 2050 drivers/irqchip/irq-gic-v3.c acpi_data.dist_base = ioremap(dist->base_address, dist_base 2052 drivers/irqchip/irq-gic-v3.c if (!acpi_data.dist_base) { dist_base 2057 drivers/irqchip/irq-gic-v3.c err = gic_validate_dist_version(acpi_data.dist_base); dist_base 2060 drivers/irqchip/irq-gic-v3.c acpi_data.dist_base); dist_base 2081 drivers/irqchip/irq-gic-v3.c err = gic_init_bases(acpi_data.dist_base, acpi_data.redist_regs, dist_base 2101 drivers/irqchip/irq-gic-v3.c iounmap(acpi_data.dist_base); dist_base 70 drivers/irqchip/irq-gic.c union gic_base dist_base; dist_base 140 drivers/irqchip/irq-gic.c return data->get_base(&data->dist_base); dist_base 154 drivers/irqchip/irq-gic.c #define gic_data_dist_base(d) ((d)->dist_base.common_base) dist_base 516 drivers/irqchip/irq-gic.c void __iomem *dist_base = gic_data_dist_base(gic); dist_base 546 drivers/irqchip/irq-gic.c gic_cpu_config(dist_base, 32, NULL); dist_base 580 drivers/irqchip/irq-gic.c void __iomem *dist_base; dist_base 587 drivers/irqchip/irq-gic.c dist_base = gic_data_dist_base(gic); dist_base 589 drivers/irqchip/irq-gic.c if (!dist_base) dist_base 594 drivers/irqchip/irq-gic.c readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4); dist_base 598 drivers/irqchip/irq-gic.c readl_relaxed(dist_base + GIC_DIST_TARGET + i * 4); dist_base 602 drivers/irqchip/irq-gic.c readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); dist_base 606 drivers/irqchip/irq-gic.c readl_relaxed(dist_base + GIC_DIST_ACTIVE_SET + i * 4); dist_base 620 drivers/irqchip/irq-gic.c void __iomem *dist_base; dist_base 626 drivers/irqchip/irq-gic.c dist_base = gic_data_dist_base(gic); dist_base 628 drivers/irqchip/irq-gic.c if (!dist_base) dist_base 631 drivers/irqchip/irq-gic.c writel_relaxed(GICD_DISABLE, dist_base + GIC_DIST_CTRL); dist_base 635 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_CONFIG + i * 4); dist_base 639 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_PRI + i * 4); dist_base 643 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_TARGET + i * 4); dist_base 647 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_ENABLE_CLEAR + i * 4); dist_base 649 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_ENABLE_SET + i * 4); dist_base 654 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_ACTIVE_CLEAR + i * 4); dist_base 656 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_ACTIVE_SET + i * 4); dist_base 659 drivers/irqchip/irq-gic.c writel_relaxed(GICD_ENABLE, dist_base + GIC_DIST_CTRL); dist_base 666 drivers/irqchip/irq-gic.c void __iomem *dist_base; dist_base 672 drivers/irqchip/irq-gic.c dist_base = gic_data_dist_base(gic); dist_base 675 drivers/irqchip/irq-gic.c if (!dist_base || !cpu_base) dist_base 680 drivers/irqchip/irq-gic.c ptr[i] = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); dist_base 684 drivers/irqchip/irq-gic.c ptr[i] = readl_relaxed(dist_base + GIC_DIST_ACTIVE_SET + i * 4); dist_base 688 drivers/irqchip/irq-gic.c ptr[i] = readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4); dist_base 696 drivers/irqchip/irq-gic.c void __iomem *dist_base; dist_base 702 drivers/irqchip/irq-gic.c dist_base = gic_data_dist_base(gic); dist_base 705 drivers/irqchip/irq-gic.c if (!dist_base || !cpu_base) dist_base 711 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_ENABLE_CLEAR + i * 4); dist_base 712 drivers/irqchip/irq-gic.c writel_relaxed(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4); dist_base 718 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_ACTIVE_CLEAR + i * 4); dist_base 719 drivers/irqchip/irq-gic.c writel_relaxed(ptr[i], dist_base + GIC_DIST_ACTIVE_SET + i * 4); dist_base 724 drivers/irqchip/irq-gic.c writel_relaxed(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4); dist_base 728 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_PRI + i * 4); dist_base 886 drivers/irqchip/irq-gic.c void __iomem *dist_base; dist_base 892 drivers/irqchip/irq-gic.c dist_base = gic_data_dist_base(&gic_data[gic_nr]); dist_base 893 drivers/irqchip/irq-gic.c if (!dist_base) dist_base 912 drivers/irqchip/irq-gic.c val = readl_relaxed(dist_base + GIC_DIST_TARGET + i * 4); dist_base 917 drivers/irqchip/irq-gic.c writel_relaxed(val, dist_base + GIC_DIST_TARGET + i*4); dist_base 935 drivers/irqchip/irq-gic.c val = readl_relaxed(dist_base + GIC_DIST_SGI_PENDING_SET + i); dist_base 938 drivers/irqchip/irq-gic.c writel_relaxed(val, dist_base + GIC_DIST_SGI_PENDING_CLEAR + i); dist_base 942 drivers/irqchip/irq-gic.c dist_base + GIC_DIST_SOFTINT); dist_base 1106 drivers/irqchip/irq-gic.c gic->dist_base.percpu_base = alloc_percpu(void __iomem *); dist_base 1108 drivers/irqchip/irq-gic.c if (WARN_ON(!gic->dist_base.percpu_base || dist_base 1118 drivers/irqchip/irq-gic.c *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base 1130 drivers/irqchip/irq-gic.c gic->dist_base.common_base = gic->raw_dist_base; dist_base 1187 drivers/irqchip/irq-gic.c free_percpu(gic->dist_base.percpu_base); dist_base 1237 drivers/irqchip/irq-gic.c void __init gic_init(void __iomem *dist_base, void __iomem *cpu_base) dist_base 1248 drivers/irqchip/irq-gic.c gic->raw_dist_base = dist_base; dist_base 53 drivers/irqchip/irq-hip04.c void __iomem *dist_base; dist_base 74 drivers/irqchip/irq-hip04.c return hip04_data->dist_base; dist_base 216 drivers/irqchip/irq-hip04.c void __iomem *base = intc->dist_base; dist_base 237 drivers/irqchip/irq-hip04.c void __iomem *base = intc->dist_base; dist_base 256 drivers/irqchip/irq-hip04.c void __iomem *dist_base = intc->dist_base; dist_base 276 drivers/irqchip/irq-hip04.c gic_cpu_config(dist_base, 32, NULL); dist_base 301 drivers/irqchip/irq-hip04.c writel_relaxed(map << 8 | irq, hip04_data.dist_base + GIC_DIST_SOFTINT); dist_base 370 drivers/irqchip/irq-hip04.c hip04_data.dist_base = of_iomap(node, 0); dist_base 371 drivers/irqchip/irq-hip04.c WARN(!hip04_data.dist_base, "fail to map hip04 intc dist registers\n"); dist_base 387 drivers/irqchip/irq-hip04.c nr_irqs = readl_relaxed(hip04_data.dist_base + GIC_DIST_CTR) & 0x1f; dist_base 289 virt/kvm/arm/vgic/vgic-v2.c static bool vgic_v2_check_base(gpa_t dist_base, gpa_t cpu_base) dist_base 291 virt/kvm/arm/vgic/vgic-v2.c if (dist_base + KVM_VGIC_V2_DIST_SIZE < dist_base) dist_base 296 virt/kvm/arm/vgic/vgic-v2.c if (dist_base + KVM_VGIC_V2_DIST_SIZE <= cpu_base) dist_base 298 virt/kvm/arm/vgic/vgic-v2.c if (cpu_base + KVM_VGIC_V2_CPU_SIZE <= dist_base)