display_pstate_change_enable  395 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h 					i, data->display_pstate_change_enable[i]);
display_pstate_change_enable 1283 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		data->display_pstate_change_enable[k] = 0;
display_pstate_change_enable 1393 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 								data->display_pstate_change_enable[k] = 1;
display_pstate_change_enable 1407 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 								data->display_pstate_change_enable[k] = 1;
display_pstate_change_enable 1419 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		if (data->enable[k] == 1 && data->display_pstate_change_enable[k] == 1) {
display_pstate_change_enable 1441 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		if (data->enable[i] == 1 && data->display_pstate_change_enable[i] == 0 && bw_mtn(data->v_blank_dram_speed_change_margin[i], bw_int_to_fixed(0))) {
display_pstate_change_enable 1863 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				if (data->display_pstate_change_enable[i] == 1) {
display_pstate_change_enable 1875 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				if (data->display_pstate_change_enable[i] == 1) {
display_pstate_change_enable  372 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h 	bool display_pstate_change_enable[maximum_number_of_surfaces];