dispclk_required_without_ramping  465 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h 					i, bw_fixed_to_int(data->dispclk_required_without_ramping[i]));
dispclk_required_without_ramping 1701 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			data->dispclk_required_without_ramping[i] = bw_mul(data->downspread_factor, bw_max2(bw_mul(data->pixel_rate[i], data->scaler_limits_factor), bw_mul(dceip->display_pipe_throughput_factor, data->display_pipe_pixel_throughput)));
dispclk_required_without_ramping 1712 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 			if (bw_ltn(data->total_dispclk_required_without_ramping, data->dispclk_required_without_ramping[i])) {
dispclk_required_without_ramping 1713 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 				data->total_dispclk_required_without_ramping = data->dispclk_required_without_ramping[i];
dispclk_required_without_ramping  416 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h 	struct bw_fixed dispclk_required_without_ramping[maximum_number_of_surfaces];