dispclk_dppclk_ratio 1030 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->dispclk_dppclk_ratio = 1;
dispclk_dppclk_ratio 1034 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->dispclk_dppclk_ratio = 2;
dispclk_dppclk_ratio 1038 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->dpp_per_plane[k] = v->dpp_per_plane_per_ratio[v->dispclk_dppclk_ratio - 1][k];
dispclk_dppclk_ratio 1206 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dispclk_with_ramping =dcn_bw_max2(v->dispclk_with_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k] / v->dpp_per_plane[k]) * (1.0 + v->downspreading / 100.0) * (1.0 + v->dispclk_ramping_margin / 100.0));
dispclk_dppclk_ratio 1207 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dispclk_without_ramping =dcn_bw_max2(v->dispclk_without_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k] / v->dpp_per_plane[k]) * (1.0 + v->downspreading / 100.0));
dispclk_dppclk_ratio 1210 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dispclk_with_ramping =dcn_bw_max2(v->dispclk_with_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k]) * (1.0 + v->downspreading / 100.0) * (1.0 + v->dispclk_ramping_margin / 100.0));
dispclk_dppclk_ratio 1211 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->dispclk_without_ramping =dcn_bw_max2(v->dispclk_without_ramping,dcn_bw_max2(v->dppclk_using_single_dpp / v->dpp_per_plane[k] * v->dispclk_dppclk_ratio, v->pixel_clock[k]) * (1.0 + v->downspreading / 100.0));
dispclk_dppclk_ratio 1223 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->dppclk = v->dispclk / v->dispclk_dppclk_ratio;
dispclk_dppclk_ratio 1148 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 				v->dispclk_dppclk_ratio;
dispclk_dppclk_ratio  220 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	int dispclk_dppclk_ratio;