dispclk 472 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c u32 dispclk) dispclk 493 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v5.usPixelClock = cpu_to_le16(dispclk); dispclk 500 drivers/gpu/drm/amd/amdgpu/atombios_crtc.c args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk); dispclk 39 drivers/gpu/drm/amd/amdgpu/atombios_crtc.h u32 dispclk); dispclk 332 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] dispclk: %d", bw_fixed_to_int(data->dispclk)); dispclk 1745 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->dispclk = data->total_dispclk_required_with_ramping_with_request_bandwidth; dispclk 1748 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->dispclk = vbios->high_voltage_max_dispclk; dispclk 1751 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->dispclk = data->total_dispclk_required_without_ramping_with_request_bandwidth; dispclk 1764 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c else if (bw_equ(bw_int_to_fixed(yclk_message), vbios->low_yclk) && sclk_message == bw_def_low && bw_ltn(data->dispclk, vbios->low_voltage_max_dispclk)) { dispclk 1767 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c else if ((bw_equ(bw_int_to_fixed(yclk_message), vbios->low_yclk) || bw_equ(bw_int_to_fixed(yclk_message), vbios->mid_yclk)) && (sclk_message == bw_def_low || sclk_message == bw_def_mid) && bw_ltn(data->dispclk, vbios->mid_voltage_max_dispclk)) { dispclk 1770 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c else if ((bw_equ(bw_int_to_fixed(yclk_message), vbios->low_yclk) || bw_equ(bw_int_to_fixed(yclk_message), vbios->mid_yclk) || bw_equ(bw_int_to_fixed(yclk_message), vbios->high_yclk)) && (sclk_message == bw_def_low || sclk_message == bw_def_mid || sclk_message == bw_def_high) && bw_leq(data->dispclk, vbios->high_voltage_max_dispclk)) { dispclk 1797 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_div((bw_add(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), vbios->blackout_duration), bw_sub(bw_div(bw_mul(bw_mul(bw_mul((bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level])), data->dispclk), bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), data->adjusted_data_buffer_size[k]))), (bw_sub(bw_div(bw_mul(bw_mul(data->dispclk, bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]))))); dispclk 1803 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_div((bw_add(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), vbios->blackout_duration), bw_sub(bw_div(bw_mul(bw_mul(bw_mul((bw_add(bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level]), data->mcifwr_burst_time[data->y_clk_level][data->sclk_level])), data->dispclk), bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), data->adjusted_data_buffer_size[k]))), (bw_sub(bw_div(bw_mul(bw_mul(data->dispclk, bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]))))); dispclk 1838 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->sclk_deep_sleep = bw_max2(bw_div(bw_mul(data->dispclk, bw_frc_to_fixed(115, 100)), data->min_pixels_per_data_fifo_entry), data->total_read_request_bandwidth); dispclk 1850 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->chunk_request_time = bw_add(data->chunk_request_time, (bw_div((bw_div(bw_int_to_fixed(pixels_per_chunk * data->bytes_per_pixel[i]), data->useful_bytes_per_request[i])), bw_min2(sclk[data->sclk_level], bw_div(data->dispclk, bw_int_to_fixed(2)))))); dispclk 1857 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->line_source_pixels_transfer_time = bw_max2(bw_div(bw_div(data->src_pixels_for_first_output_pixel[i], dceip->lb_write_pixels_per_dispclk), (bw_div(data->dispclk, dceip->display_pipe_throughput_factor))), bw_sub(bw_div(bw_div(data->src_pixels_for_last_output_pixel[i], dceip->lb_write_pixels_per_dispclk), (bw_div(data->dispclk, dceip->display_pipe_throughput_factor))), data->active_time[i])); dispclk 3066 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c bw_fixed_to_int(bw_mul(data->dispclk, dispclk 1215 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk = v->dispclk_without_ramping; dispclk 1218 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk = v->max_dispclk[number_of_states]; dispclk 1221 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dispclk = v->dispclk_with_ramping; dispclk 1223 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dppclk = v->dispclk / v->dispclk_dppclk_ratio; dispclk 1643 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dstx_after_scaler = 90.0 * v->pixel_clock[k] / v->dppclk + 42.0 * v->pixel_clock[k] / v->dispclk; dispclk 1654 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->total_repeater_delay_time = v->max_inter_dcn_tile_repeaters * (2.0 / v->dppclk + 3.0 / v->dispclk); dispclk 481 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input.clks_cfg.dispclk_mhz = v->dispclk; dispclk 1137 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c context->bw_ctx.bw.dcn.clk.dispclk_khz = (int)(v->dispclk * 1000); dispclk 201 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c regs_and_bypass->dispclk = internal.CLK1_CLK0_CURRENT_CNT / 10; dispclk 240 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c regs_and_bypass->dispclk, dispclk 332 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h struct bw_fixed dispclk; dispclk 435 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h float dispclk; dispclk 88 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h uint32_t dispclk; dispclk 775 drivers/gpu/drm/radeon/atombios_crtc.c u32 dispclk) dispclk 796 drivers/gpu/drm/radeon/atombios_crtc.c args.v5.usPixelClock = cpu_to_le16(dispclk); dispclk 803 drivers/gpu/drm/radeon/atombios_crtc.c args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk);