disp_parent_names  200 drivers/clk/mmp/clk-of-mmp2.c static const char *disp_parent_names[] = {"pll1", "pll1_16", "pll2", "vctcxo"};
disp_parent_names  213 drivers/clk/mmp/clk-of-mmp2.c 	{MMP2_CLK_DISP0_MUX, "disp0_mux", disp_parent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP0, 6, 2, 0, &disp0_lock},
disp_parent_names  214 drivers/clk/mmp/clk-of-mmp2.c 	{MMP2_CLK_DISP1_MUX, "disp1_mux", disp_parent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP1, 6, 2, 0, &disp1_lock},
disp_parent_names  183 drivers/clk/mmp/clk-of-pxa168.c static const char *disp_parent_names[] = {"pll1_2", "pll1_12"};
disp_parent_names  192 drivers/clk/mmp/clk-of-pxa168.c 	{0, "disp0_mux", disp_parent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP0, 6, 1, 0, &disp0_lock},
disp_parent_names  189 drivers/clk/mmp/clk-of-pxa910.c static const char *disp_parent_names[] = {"pll1_2", "pll1_12"};
disp_parent_names  198 drivers/clk/mmp/clk-of-pxa910.c 	{0, "disp0_mux", disp_parent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP0, 6, 1, 0, &disp0_lock},