disp_int_cont4   7308 drivers/gpu/drm/radeon/cik.c 	rdev->irq.stat_regs.cik.disp_int_cont4 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE4);
disp_int_cont4   7368 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT)
disp_int_cont4   7370 drivers/gpu/drm/radeon/cik.c 		if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT)
disp_int_cont4   7398 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_INTERRUPT) {
disp_int_cont4   7428 drivers/gpu/drm/radeon/cik.c 	if (rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_RX_INTERRUPT) {
disp_int_cont4   7719 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT))
disp_int_cont4   7729 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT;
disp_int_cont4   7734 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT))
disp_int_cont4   7737 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VLINE_INTERRUPT;
disp_int_cont4   7825 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_INTERRUPT))
disp_int_cont4   7828 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont4 &= ~DC_HPD5_INTERRUPT;
disp_int_cont4   7879 drivers/gpu/drm/radeon/cik.c 				if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_RX_INTERRUPT))
disp_int_cont4   7882 drivers/gpu/drm/radeon/cik.c 				rdev->irq.stat_regs.cik.disp_int_cont4 &= ~DC_HPD5_RX_INTERRUPT;
disp_int_cont4    774 drivers/gpu/drm/radeon/radeon.h 	u32 disp_int_cont4;