dir0_lsn          193 arch/x86/kernel/cpu/cyrix.c 	unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0;
dir0_lsn          214 arch/x86/kernel/cpu/cyrix.c 	dir0_lsn = dir0 & 0xf;                /* model or clock multiplier */
dir0_lsn          230 arch/x86/kernel/cpu/cyrix.c 		p = Cx486_name[dir0_lsn & 7];
dir0_lsn          234 arch/x86/kernel/cpu/cyrix.c 		p = (dir0_lsn & 8) ? Cx486D_name[dir0_lsn & 5]
dir0_lsn          235 arch/x86/kernel/cpu/cyrix.c 			: Cx486S_name[dir0_lsn & 3];
dir0_lsn          239 arch/x86/kernel/cpu/cyrix.c 		Cx86_cb[2] = cyrix_model_mult1[dir0_lsn & 5];
dir0_lsn          245 arch/x86/kernel/cpu/cyrix.c 		Cx86_cb[2] = cyrix_model_mult1[dir0_lsn & 5];
dir0_lsn          312 arch/x86/kernel/cpu/cyrix.c 			Cx86_cb[2] = (dir0_lsn & 1) ? '3' : '4';
dir0_lsn          327 arch/x86/kernel/cpu/cyrix.c 		tmp = (!(dir0_lsn & 7) || dir0_lsn & 1) ? 2 : 0;
dir0_lsn          328 arch/x86/kernel/cpu/cyrix.c 		Cx86_cb[tmp] = cyrix_model_mult2[dir0_lsn & 7];
dir0_lsn          337 arch/x86/kernel/cpu/cyrix.c 		switch (dir0_lsn) {