dim3               60 arch/alpha/include/asm/core_titan.h 	titan_64	dim3;
dim3               60 arch/alpha/include/asm/core_tsunami.h 	tsunami_64	dim3;
dim3               55 arch/alpha/kernel/sys_dp264.c 	volatile unsigned long *dim0, *dim1, *dim2, *dim3;
dim3               72 arch/alpha/kernel/sys_dp264.c 	dim3 = &cchip->dim3.csr;
dim3               76 arch/alpha/kernel/sys_dp264.c 	if (!cpu_possible(3)) dim3 = &dummy;
dim3               81 arch/alpha/kernel/sys_dp264.c 	*dim3 = mask3;
dim3               86 arch/alpha/kernel/sys_dp264.c 	*dim3;
dim3               92 arch/alpha/kernel/sys_dp264.c 	else dimB = &cchip->dim3.csr;
dim3               69 arch/alpha/kernel/sys_titan.c 	volatile unsigned long *dim0, *dim1, *dim2, *dim3;
dim3               87 arch/alpha/kernel/sys_titan.c 	dim3 = &cchip->dim3.csr;
dim3               91 arch/alpha/kernel/sys_titan.c 	if (!cpumask_test_cpu(3, &cpm)) dim3 = &dummy;
dim3               96 arch/alpha/kernel/sys_titan.c 	*dim3 = mask3;
dim3              101 arch/alpha/kernel/sys_titan.c 	*dim3;
dim3              107 arch/alpha/kernel/sys_titan.c 	else if (bcpu == 3) dimB = &cchip->dim3.csr;