dig_hotplug_reg 1537 drivers/gpu/drm/i915/i915_irq.c u32 hotplug_trigger, u32 dig_hotplug_reg, dig_hotplug_reg 1551 drivers/gpu/drm/i915/i915_irq.c if (long_pulse_detect(pin, dig_hotplug_reg)) dig_hotplug_reg 1556 drivers/gpu/drm/i915/i915_irq.c hotplug_trigger, dig_hotplug_reg, *pin_mask, *long_mask); dig_hotplug_reg 2109 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0; dig_hotplug_reg 2117 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG); dig_hotplug_reg 2123 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg &= ~mask; dig_hotplug_reg 2126 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg); dig_hotplug_reg 2131 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd, dig_hotplug_reg 2275 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg; dig_hotplug_reg 2277 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_DDI); dig_hotplug_reg 2278 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(SHOTPLUG_CTL_DDI, dig_hotplug_reg); dig_hotplug_reg 2282 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, pins, dig_hotplug_reg 2287 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg; dig_hotplug_reg 2289 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_TC); dig_hotplug_reg 2290 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(SHOTPLUG_CTL_TC, dig_hotplug_reg); dig_hotplug_reg 2294 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, pins, dig_hotplug_reg 2312 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg; dig_hotplug_reg 2314 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_DDI); dig_hotplug_reg 2315 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(SHOTPLUG_CTL_DDI, dig_hotplug_reg); dig_hotplug_reg 2319 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd_tgp, dig_hotplug_reg 2324 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg; dig_hotplug_reg 2326 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_TC); dig_hotplug_reg 2327 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(SHOTPLUG_CTL_TC, dig_hotplug_reg); dig_hotplug_reg 2331 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd_tgp, dig_hotplug_reg 2350 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg; dig_hotplug_reg 2352 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG); dig_hotplug_reg 2353 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg); dig_hotplug_reg 2356 drivers/gpu/drm/i915/i915_irq.c hotplug_trigger, dig_hotplug_reg, hpd_spt, dig_hotplug_reg 2361 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg; dig_hotplug_reg 2363 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG2); dig_hotplug_reg 2364 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(PCH_PORT_HOTPLUG2, dig_hotplug_reg); dig_hotplug_reg 2367 drivers/gpu/drm/i915/i915_irq.c hotplug2_trigger, dig_hotplug_reg, hpd_spt, dig_hotplug_reg 2382 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0; dig_hotplug_reg 2384 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL); dig_hotplug_reg 2385 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg); dig_hotplug_reg 2388 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd, dig_hotplug_reg 2560 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0; dig_hotplug_reg 2562 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG); dig_hotplug_reg 2563 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg); dig_hotplug_reg 2566 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd, dig_hotplug_reg 2589 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg; dig_hotplug_reg 2591 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(GEN11_TC_HOTPLUG_CTL); dig_hotplug_reg 2592 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(GEN11_TC_HOTPLUG_CTL, dig_hotplug_reg); dig_hotplug_reg 2595 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd, long_pulse_detect); dig_hotplug_reg 2599 drivers/gpu/drm/i915/i915_irq.c u32 dig_hotplug_reg; dig_hotplug_reg 2601 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg = I915_READ(GEN11_TBT_HOTPLUG_CTL); dig_hotplug_reg 2602 drivers/gpu/drm/i915/i915_irq.c I915_WRITE(GEN11_TBT_HOTPLUG_CTL, dig_hotplug_reg); dig_hotplug_reg 2605 drivers/gpu/drm/i915/i915_irq.c dig_hotplug_reg, hpd, long_pulse_detect);