dhwb              156 arch/xtensa/include/asm/cacheasm.h 	__loop_cache_range \ar \as \at dhwb XCHAL_DCACHE_LINEWIDTH
dhwb              193 arch/xtensa/include/asm/cacheasm.h 	__loop_cache_page \ar \as dhwb XCHAL_DCACHE_LINEWIDTH 1020